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/////////////////////////////////////////////////////////////////////
////  Author: Liwei                                              ////
////                                                             ////
////                                                             ////
////  If you encountered any problem, please contact :           ////
////  Email: mcupro@yahoo.com.hk or mcupro@opencores.org         ////
////                                                             ////
////  Downloaded from:                                           ////
////     http://www.opencores.org/pdownloads.cgi/list/mips789    ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2006-2007 Liwei                               ////
////                         mcupro@yahoo.com.hk                 ////
////                                                             ////
////                                                             ////
//// This source file may be used and distributed freely without ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and any derivative work contains the  ////
//// original copyright notice and the associated disclaimer.    ////
////                                                             ////
//// Please let the author know if it is used                    ////
//// for commercial purpose.                                     ////
////                                                             ////
////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
//// POSSIBILITY OF SUCH DAMAGE.                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
////                                                             ////
//// Date of Creation: 2007.8.1                                  ////
////                                                             ////
//// Version: 0.0.1                                              ////
////                                                             ////
//// Description:                                                ////
////                                                             ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Change log:                                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
 
 
 
`define MUXA_PC 1
`define MUXA_RS 2
`define MUXA_EXT 3
`define MUXA_SPC 0
`define MUXA_NOP 0
 
`define MUXB_RT 1
`define MUXB_EXT 2
`define MUXB_NOP 0
 
 
`define FW_ALU 3'b001
`define FW_MEM 3'b010
`define FW_NOP 3'b100
 
 
module alu_muxa(
        input [31:0]spc,
        input [31:0]pc,
        input [31:0]fw_mem,
        input [31:0]rs,
        input [31:0]fw_alu,
        input [31:0]ext,
        input [1:0] ctl,
        input [2:0] fw_ctl,
        output reg [31:0]a_o
    );
 
    always @(*)
    begin
        case (ctl)
            `MUXA_RS:   a_o = (fw_ctl ==`FW_ALU )?fw_alu:(fw_ctl==`FW_MEM)?fw_mem:rs;
            `MUXA_PC:   a_o = pc;
            `MUXA_EXT:  a_o = ext;
            `MUXA_SPC:  a_o = spc;
            default :   a_o = rs;
        endcase
    end
endmodule
 
module alu_muxb(
        input [31:0] rt,
        input [31:0]fw_alu,
        input [31:0]fw_mem,
        input [31:0]ext ,
        input [1:0]ctl ,
        input [2:0]fw_ctl ,
        output reg [31:0] b_o
    );
    always@(*)
    case (ctl)
        `MUXB_RT :b_o = (fw_ctl ==`FW_ALU )?fw_alu:(fw_ctl==`FW_MEM)?fw_mem:rt;
        `MUXB_EXT :     b_o=ext;
        default b_o=rt;
    endcase
endmodule

Line No.	Rev	Author	Line
1	2	mcupro	`/////////////////////////////////////////////////////////////////////`
2			`//// Author: Liwei ////`
3			`//// ////`
4			`//// ////`
5			`//// If you encountered any problem, please contact : ////`
6			`//// Email: mcupro@yahoo.com.hk or mcupro@opencores.org ////`
7			`//// ////`
8			`//// Downloaded from: ////`
9			`//// http://www.opencores.org/pdownloads.cgi/list/mips789 ////`
10			`/////////////////////////////////////////////////////////////////////`
11			`//// ////`
12			`//// Copyright (C) 2006-2007 Liwei ////`
13			`//// mcupro@yahoo.com.hk ////`
14			`//// ////`
15			`//// ////`
16			`//// This source file may be used and distributed freely without ////`
17			`//// restriction provided that this copyright statement is not ////`
18			`//// removed from the file and any derivative work contains the ////`
19			`//// original copyright notice and the associated disclaimer. ////`
20			`//// ////`
21			`//// Please let the author know if it is used ////`
22			`//// for commercial purpose. ////`
23			`//// ////`
24			//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
25			`//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////`
26			`//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////`
27			`//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////`
28			`//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////`
29			`//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////`
30			`//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////`
31			`//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////`
32			`//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////`
33			`//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////`
34			`//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////`
35			`//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////`
36			`//// POSSIBILITY OF SUCH DAMAGE. ////`
37			`//// ////`
38			`/////////////////////////////////////////////////////////////////////`
39			`//// ////`
40			`//// ////`
41			`//// Date of Creation: 2007.8.1 ////`
42			`//// ////`
43			`//// Version: 0.0.1 ////`
44			`//// ////`
45			`//// Description: ////`
46			`//// ////`
47			`//// ////`
48			`/////////////////////////////////////////////////////////////////////`
49			`//// ////`
50			`//// Change log: ////`
51			`//// ////`
52			`/////////////////////////////////////////////////////////////////////`
53
54
55
56			`define MUXA_PC 1
57			`define MUXA_RS 2
58			`define MUXA_EXT 3
59			`define MUXA_SPC 0
60			`define MUXA_NOP 0
61
62			`define MUXB_RT 1
63			`define MUXB_EXT 2
64			`define MUXB_NOP 0
65
66
67			`define FW_ALU 3'b001
68			`define FW_MEM 3'b010
69			`define FW_NOP 3'b100
70
71
72			`module alu_muxa(`
73			`input [31:0]spc,`
74			`input [31:0]pc,`
75			`input [31:0]fw_mem,`
76			`input [31:0]rs,`
77			`input [31:0]fw_alu,`
78			`input [31:0]ext,`
79			`input [1:0] ctl,`
80			`input [2:0] fw_ctl,`
81			`output reg [31:0]a_o`
82			`);`
83
84			`always @(*)`
85			`begin`
86			`case (ctl)`
87			`MUXA_RS: a_o = (fw_ctl ==`FW_ALU )?fw_alu:(fw_ctl==`FW_MEM)?fw_mem:rs;
88			`MUXA_PC: a_o = pc;
89			`MUXA_EXT: a_o = ext;
90			`MUXA_SPC: a_o = spc;
91			`default : a_o = rs;`
92			`endcase`
93			`end`
94			`endmodule`
95
96			`module alu_muxb(`
97			`input [31:0] rt,`
98			`input [31:0]fw_alu,`
99			`input [31:0]fw_mem,`
100			`input [31:0]ext ,`
101			`input [1:0]ctl ,`
102			`input [2:0]fw_ctl ,`
103			`output reg [31:0] b_o`
104			`);`
105			`always@(*)`
106			`case (ctl)`
107			`MUXB_RT :b_o = (fw_ctl ==`FW_ALU )?fw_alu:(fw_ctl==`FW_MEM)?fw_mem:rt;
108			`MUXB_EXT : b_o=ext;
109			`default b_o=rt;`
110			`endcase`
111			`endmodule`

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[/] [mips789/] [branches/] [mcupro/] [verilog/] [mips_core/] [alu_mux.v] - Blame information for rev 51