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[/] [mips789/] [branches/] [mcupro/] [verilog/] [mips_core/] [cal_cpi.v] - Blame information for rev 51

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1 2 mcupro
/////////////////////////////////////////////////////////////////////
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////  Author: Liwei                                              ////
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////                                                             ////
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////                                                             ////
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////  If you encountered any problem, please contact :           ////
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////  Email: mcupro@yahoo.com.hk or mcupro@opencores.org         ////
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////                                                             ////
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////  Downloaded from:                                           ////
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////     http://www.opencores.org/pdownloads.cgi/list/mips789    ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2006-2007 Liwei                               ////
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////                         mcupro@yahoo.com.hk                 ////
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////                                                             ////
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////                                                             ////
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//// This source file may be used and distributed freely without ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and any derivative work contains the  ////
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//// original copyright notice and the associated disclaimer.    ////
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////                                                             ////
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//// Please let the author know if it is used                    ////
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//// for commercial purpose.                                     ////
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////                                                             ////
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////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
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//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
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//// POSSIBILITY OF SUCH DAMAGE.                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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////                                                             ////
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//// Date of Creation: 2007.8.1                                  ////
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////                                                             ////
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//// Version: 0.0.1                                              ////
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////                                                             ////
45 4 mcupro
//// Description:  For simulations only to calculate the CPI     ////
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////                     Cycles Per Instruction                   ////
47 2 mcupro
////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Change log:                                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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module cal_cpi (
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        input clk,
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        input rst,
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        input is_nop,
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        output reg [100:0] ins_no,
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        output reg [100:0] clk_no);
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    always @(posedge clk or negedge rst )
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        if (~rst )clk_no=0;
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        else
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            clk_no = 1+clk_no;
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    always @(posedge clk or negedge rst)
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        if (~rst )ins_no=0;
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        else if (~is_nop)
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            ins_no = 1+ins_no;
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endmodule

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