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1 2 mcupro
/////////////////////////////////////////////////////////////////////
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////  Author: Liwei                                              ////
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////                                                             ////
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////                                                             ////
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////  If you encountered any problem, please contact :           ////
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////  Email: mcupro@yahoo.com.hk or mcupro@opencores.org         ////
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////                                                             ////
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////  Downloaded from:                                           ////
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////     http://www.opencores.org/pdownloads.cgi/list/mips789    ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2006-2007 Liwei                               ////
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////                         mcupro@yahoo.com.hk                 ////
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////                                                             ////
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////                                                             ////
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//// This source file may be used and distributed freely without ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and any derivative work contains the  ////
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//// original copyright notice and the associated disclaimer.    ////
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////                                                             ////
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//// Please let the author know if it is used                    ////
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//// for commercial purpose.                                     ////
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////                                                             ////
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////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
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//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
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//// POSSIBILITY OF SUCH DAMAGE.                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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////                                                             ////
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//// Date of Creation: 2007.8.1                                  ////
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////                                                             ////
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//// Version: 0.0.1                                              ////
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////                                                             ////
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//// Description:                                                ////
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////                                                             ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Change log:                                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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`define EXT_SIGN              1
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`define EXT_UNSIGN            2
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`define EXT_J                 3
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`define EXT_B                 4
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`define EXT_SA                5
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`define EXT_S2H               6
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`define EXT_NOP               0
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module ext(
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    input [31:0] ins_i ,
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    output reg [31:0] res ,
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    input [2:0]ctl);
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    wire [25:0] instr25_0;
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    assign instr25_0 = ins_i[25:0] ;
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    wire[15:0] sign = {instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15],instr25_0[15]}   ;
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    always @ (*)
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    case (ctl)
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        `EXT_SIGN    :res ={sign,instr25_0[15:0]};//sign
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        `EXT_UNSIGN  :res ={16'b0,instr25_0[15:0]};//zeroext
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        `EXT_J       :res ={4'b0,instr25_0[25:0],2'b0};//jmp
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        `EXT_B       :res ={sign[13:0],instr25_0[15:0],2'B0};//brach
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        `EXT_SA      :res ={27'b0,instr25_0[10:6]} ;//sll,srl
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        `EXT_S2H     :res ={instr25_0[15:0],16'B0};//shift to high
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        default: res=0;
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    endcase
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endmodule

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