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[/] [mips789/] [tags/] [arelease/] [rtl/] [verilog/] [mips_core.v] - Blame information for rev 10

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1 10 mcupro
`include "include.h"
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module mips_core (
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        clk,irq_i,rst,cop_dout,irq_addr,
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        zz_din,zz_ins_i,iack_o,cop_addr_o,
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        cop_data_o,cop_mem_ctl_o,zz_addr_o,
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        zz_dout,zz_pc_o,zz_wr_en_o
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    );
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    input clk;
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    wire clk;
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    input irq_i;
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    wire irq_i;
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    input rst;
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    wire rst;
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    input [31:0] cop_dout;
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    wire [31:0] cop_dout;
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    input [31:0] irq_addr;
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    wire [31:0] irq_addr;
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    input [31:0] zz_din;
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    wire [31:0] zz_din;
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    input [31:0] zz_ins_i;
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    wire [31:0] zz_ins_i;
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    output [31:0] zz_addr_o;
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    wire [31:0] zz_addr_o;
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    output [31:0] zz_dout;
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    wire [31:0] zz_dout;
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    output [31:0] zz_pc_o;
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    wire [31:0] zz_pc_o;
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    output [3:0] zz_wr_en_o;
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    wire [3:0] zz_wr_en_o;
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    output iack_o;
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    wire iack_o;
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    output [31:0] cop_addr_o;
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    wire [31:0] cop_addr_o;
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    output [31:0] cop_data_o;
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    wire [31:0] cop_data_o;
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    output [3:0] cop_mem_ctl_o;
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    wire [3:0] cop_mem_ctl_o;
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    wire NET1375;
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    wire NET1572;
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    wire NET1606;
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    wire NET1640;
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    wire NET21531;
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    wire NET457;
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    wire NET767;
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    wire [2:0] BUS109;
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    wire [2:0] BUS1158;
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    wire [2:0] BUS117;
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    wire [2:0] BUS1196;
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    wire [31:0] BUS15471;
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    wire [4:0] BUS1724;
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    wire [4:0] BUS1726;
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    wire [4:0] BUS18211;
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    wire [2:0] BUS197;
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    wire [2:0] BUS2140;
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    wire [2:0] BUS2156;
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    wire [31:0] BUS22401;
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    wire [31:0] BUS24839;
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    wire [31:0] BUS27031;
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    wire [2:0] BUS271;
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    wire [31:0] BUS28013;
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    wire [1:0] BUS371;
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    wire [31:0] BUS422;
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    wire [1:0] BUS5832;
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    wire [1:0] BUS5840;
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    wire [3:0] BUS5985;
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    wire [2:0] BUS5993;
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    wire [4:0] BUS6275;
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    wire [31:0] BUS7101;
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    wire [31:0] BUS7117;
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    wire [31:0] BUS7160;
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    wire [31:0] BUS7219;
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    wire [31:0] BUS7231;
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    wire [4:0] BUS748;
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    wire [4:0] BUS756;
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    wire [4:0] BUS775;
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    wire [31:0] BUS7772;
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    wire [31:0] BUS7780;
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    wire [31:0] BUS9589;
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    wire [31:0] BUS9884;
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    mem_module MEM_CTL
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               (
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                   .Zz_addr(zz_addr_o),
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                   .Zz_dout(zz_dout),
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                   .Zz_wr_en(zz_wr_en_o),
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                   .clk(clk),
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                   .din(BUS9884),
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                   .dmem_addr_i(BUS9589),
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                   .dmem_ctl(BUS5985),
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                   .dout(BUS22401),
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                   .zZ_din(zz_din)
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               );
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    assign NET21531 = NET1572 | iack_o;
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    rf_stage iRF_stage
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             (
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                 .clk(clk),
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                 .cmp_ctl_i(BUS109),
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                 .ext_ctl_i(BUS117),
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                 .ext_o(BUS7219),
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                 .fw_alu_i(cop_addr_o),
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                 .fw_cmp_rs(BUS2140),
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                 .fw_cmp_rt(BUS2156),
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                 .fw_mem_i(BUS15471),
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                 .iack_o(iack_o),
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                 .id2ra_ctl_clr_o(NET1606),
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                 .id2ra_ctl_cls_o(NET1572),
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                 .id_cmd(BUS197),
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                 .ins_i(zz_ins_i),
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                 .irq_addr_i(irq_addr),
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                 .irq_i(irq_i),
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                 .pc_gen_ctl(BUS271),
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                 .pc_i(BUS27031),
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                 .pc_next(zz_pc_o),
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                 .ra2ex_ctl_clr_o(NET1640),
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                 .rd_index_o(BUS775),
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                 .rd_sel_i(BUS371),
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                 .rs_n_o(BUS748),
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                 .rs_o(BUS24839),
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                 .rst_i(rst),
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                 .rt_n_o(BUS756),
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                 .rt_o(BUS7160),
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                 .wb_addr_i(BUS18211),
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                 .wb_din_i(BUS15471),
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                 .wb_we_i(NET1375),
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                 .zz_spc_i(BUS28013)
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             );
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135
 
136
 
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    exec_stage iexec_stage
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               (
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                   .alu_func(BUS6275),
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                   .alu_ur_o(BUS9589),
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                   .clk(clk),
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                   .dmem_data_ur_o(BUS9884),
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                   .dmem_fw_ctl(BUS5993),
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                   .ext_i(BUS7231),
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                   .fw_alu(cop_addr_o),
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                   .fw_dmem(BUS15471),
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                   .muxa_ctl_i(BUS5832),
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                   .muxa_fw_ctl(BUS1158),
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                   .muxb_ctl_i(BUS5840),
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                   .muxb_fw_ctl(BUS1196),
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                   .pc_i(BUS27031),
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                   .rs_i(BUS7101),
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                   .rst(rst),
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                   .rt_i(BUS7117),
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                   .spc_cls_i(NET21531),
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                   .zz_spc_o(BUS28013)
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               );
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159
 
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    r32_reg alu_pass0
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            (
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                .clk(clk),
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                .r32_i(BUS9589),
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                .r32_o(cop_addr_o)
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            );
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168
 
169
 
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    r32_reg alu_pass1
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            (
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                .clk(clk),
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                .r32_i(cop_addr_o),
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                .r32_o(BUS422)
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            );
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177
 
178
 
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    or32 cop_data_or
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         (
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             .a(cop_dout),
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             .b(BUS7772),
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             .c(BUS7780)
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         );
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187
 
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    r32_reg cop_data_reg
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            (
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                .clk(clk),
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                .r32_i(BUS9884),
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                .r32_o(cop_data_o)
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            );
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196
 
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    r32_reg cop_dout_reg
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            (
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                .clk(clk),
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                .r32_i(BUS22401),
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                .r32_o(BUS7772)
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            );
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    decode_pipe decoder_pipe
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                (
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                    .alu_func_o(BUS6275),
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                    .alu_we_o(NET767),
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                    .clk(clk),
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                    .cmp_ctl_o(BUS109),
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                    .dmem_ctl_o(cop_mem_ctl_o),
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                    .dmem_ctl_ur_o(BUS5985),
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                    .ext_ctl_o(BUS117),
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                    .fsm_dly(BUS197),
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                    .id2ra_ctl_clr(NET1606),
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                    .id2ra_ctl_cls(NET1572),
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                    .ins_i(zz_ins_i),
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                    .muxa_ctl_o(BUS5832),
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                    .muxb_ctl_o(BUS5840),
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                    .pc_gen_ctl_o(BUS271),
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                    .ra2ex_ctl_clr(NET1640),
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                    .rd_sel_o(BUS371),
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                    .wb_mux_ctl_o(NET457),
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                    .wb_we_o(NET1375)
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                );
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    r32_reg ext_reg
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            (
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                .clk(clk),
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                .r32_i(BUS7219),
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                .r32_o(BUS7231)
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            );
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    forward iforward
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            (
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                .alu_rs_fw(BUS1158),
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                .alu_rt_fw(BUS1196),
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                .alu_we(NET767),
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                .clk(clk),
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                .cmp_rs_fw(BUS2140),
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                .cmp_rt_fw(BUS2156),
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                .dmem_fw(BUS5993),
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                .fw_alu_rn(BUS1724),
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                .fw_mem_rn(BUS18211),
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                .mem_We(NET1375),
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                .rns_i(BUS748),
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                .rnt_i(BUS756)
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            );
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    r32_reg pc
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            (
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                .clk(clk),
260
                .r32_i(zz_pc_o),
261
                .r32_o(BUS27031)
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            );
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264
 
265
 
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    r5_reg rnd_pass0
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           (
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               .clk(clk),
269
               .r5_i(BUS775),
270
               .r5_o(BUS1726)
271
           );
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273
 
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    r5_reg rnd_pass1
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           (
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               .clk(clk),
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               .r5_i(BUS1726),
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               .r5_o(BUS1724)
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           );
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282
 
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    r5_reg rnd_pass2
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           (
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               .clk(clk),
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               .r5_i(BUS1724),
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               .r5_o(BUS18211)
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           );
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    r32_reg rs_reg
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            (
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                .clk(clk),
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                .r32_i(BUS24839),
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                .r32_o(BUS7101)
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            );
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300
 
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    r32_reg rt_reg
303
            (
304
                .clk(clk),
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                .r32_i(BUS7160),
306
                .r32_o(BUS7117)
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            );
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309
 
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311
    wb_mux wb_mux
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           (
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               .alu_i(BUS422),
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               .dmem_i(BUS7780),
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               .sel(NET457),
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               .wb_o(BUS15471)
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           );
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endmodule

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