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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [bin/] [ahbrom.c] - Blame information for rev 2

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1 2 dimamali
#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <unistd.h>
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main (argc, argv)
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  int argc; char **argv;
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{
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  struct stat sbuf;
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  char x[128];
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  int i, res, fsize, abits, tmp;
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  FILE *fp, *wfp;
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  if (argc < 2) exit(1);
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  res = stat(argv[1], &sbuf);
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  if (res < 0) exit(2);
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  fsize = sbuf.st_size;
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  fp = fopen(argv[1], "rb");
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  wfp = fopen(argv[2], "w+");
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  if (fp == NULL) exit(2);
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  if (wfp == NULL) exit(2);
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  tmp = fsize; abits = 0;
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  while (tmp) {tmp >>= 1; abits++;}
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  printf("Creating %s : file size: %d bytes, address bits %d\n", argv[2], fsize, abits);
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  fprintf(wfp, "\n\
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----------------------------------------------------------------------------\n\
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--  This file is a part of the GRLIB VHDL IP LIBRARY\n\
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--  Copyright (C) 2004 GAISLER RESEARCH\n\
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--\n\
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--  This program is free software; you can redistribute it and/or modify\n\
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--  it under the terms of the GNU General Public License as published by\n\
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--  the Free Software Foundation; either version 2 of the License, or\n\
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--  (at your option) any later version.\n\
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--\n\
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--  See the file COPYING for the full details of the license.\n\
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--\n\
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-----------------------------------------------------------------------------\n\
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-- Entity:      ahbrom\n\
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-- File:        ahbrom.vhd\n\
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-- Author:      Jiri Gaisler - Gaisler Research\n\
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-- Description: AHB rom. 0/1-waitstate read\n\
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------------------------------------------------------------------------------\n\
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library ieee;\n\
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use ieee.std_logic_1164.all;\n\
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library grlib;\n\
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use grlib.amba.all;\n\
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use grlib.stdlib.all;\n\
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use grlib.devices.all;\n\
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\n\
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entity ahbrom is\n\
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  generic (\n\
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    hindex  : integer := 0;\n\
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    haddr   : integer := 0;\n\
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    hmask   : integer := 16#fff#;\n\
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    pipe    : integer := 0;\n\
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    tech    : integer := 0;\n\
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    kbytes  : integer := 1);\n\
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  port (\n\
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    rst     : in  std_ulogic;\n\
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    clk     : in  std_ulogic;\n\
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    ahbsi   : in  ahb_slv_in_type;\n\
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    ahbso   : out ahb_slv_out_type\n\
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  );\n\
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end;\n\
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\n\
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architecture rtl of ahbrom is\n\
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constant abits : integer := %d;\n\
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constant bytes : integer := %d;\n\
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\n\
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constant hconfig : ahb_config_type := (\n\
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  4 => ahb_membar(haddr, '1', '1', hmask), others => zero32);\n\
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\n\
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signal romdata : std_logic_vector(31 downto 0);\n\
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signal addr : std_logic_vector(abits-1 downto 2);\n\
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signal hsel, hready : std_ulogic;\n\
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\n\
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begin\n\
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\n\
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  ahbso.hresp   <= \"00\"; \n\
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  ahbso.hsplit  <= (others => '0'); \n\
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  ahbso.hirq    <= (others => '0');\n\
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  ahbso.hcache  <= '1';\n\
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  ahbso.hconfig <= hconfig;\n\
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  ahbso.hindex  <= hindex;\n\
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\n\
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  reg : process (clk)\n\
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  begin\n\
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    if rising_edge(clk) then \n\
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      addr <= ahbsi.haddr(abits-1 downto 2);\n\
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    end if;\n\
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  end process;\n\
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\n\
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  p0 : if pipe = 0 generate\n\
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    ahbso.hrdata  <= romdata;\n\
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    ahbso.hready  <= '1';\n\
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  end generate;\n\
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\n\
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  p1 : if pipe = 1 generate\n\
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    reg2 : process (clk)\n\
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    begin\n\
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      if rising_edge(clk) then\n\
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        hsel <= ahbsi.hsel(hindex) and ahbsi.htrans(1);\n\
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        hready <= ahbsi.hready;\n\
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        ahbso.hready <=  (not rst) or (hsel and hready) or\n\
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          (ahbsi.hsel(hindex) and not ahbsi.htrans(1) and ahbsi.hready);\n\
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        ahbso.hrdata  <= romdata;\n\
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      end if;\n\
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    end process;\n\
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  end generate;\n\
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\n\
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  comb : process (addr)\n\
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  begin\n\
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    case conv_integer(addr) is\n\
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", abits, fsize, abits-1);
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  i = 0;
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  while (!feof(fp)) {
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    fread(&tmp, 1, 4, fp);
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    fprintf(wfp, "    when 16#%05X# => romdata <= X\"%08X\";\n", i++, htonl(tmp));
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  }
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  fprintf(wfp, "\
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    when others => romdata <= (others => '-');\n\
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    end case;\n\
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  end process;\n\
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  -- pragma translate_off\n\
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  bootmsg : report_version \n\
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  generic map (\"ahbrom\" & tost(hindex) &\n\
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  \": 32-bit AHB ROM Module,  \" & tost(bytes/4) & \" words, \" & tost(abits-2) & \" address bits\" );\n\
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  -- pragma translate_on\n\
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  end;\n\
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");
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 fclose (wfp);
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 fclose (fp);
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 return(0);
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 exit(0);
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}

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