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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [bin/] [tkconfig/] [mkdevice.c] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali 
/* mkdevice.c, a utility to generate LEON device.vhd from a config file.
2 
   Written by Jiri Gaisler, jiri@gaisler.com
3 
   Copyright Gaisler Research, all rights reserved.
4 
*/
5 
 
6 
#include <stdlib.h>
7 
#include <stdio.h>
8 
#include <string.h>
9 
 
10 
 
11 
#define VAL(x)  strtoul(x,(char **)NULL,0)
12 
 
13 
FILE *fp;
14 
 
15 
char false[] = "false";
16 
char true[] = "true";
17 
 
18 
/* Synthesis options */
19 
 
20 
char CONFIG_CFG_NAME[16] = "config";
21 
char CFG_SYN_TARGET_TECH[128] = "gen";
22 
char *CONFIG_SYN_INFER_PADS = false;
23 
char *CONFIG_SYN_INFER_PCI_PADS = false;
24 
char *CONFIG_SYN_INFER_RAM = false;
25 
char *CONFIG_SYN_INFER_ROM = false;
26 
char *CONFIG_SYN_INFER_REGF = false;
27 
char *CONFIG_SYN_INFER_MULT = false;
28 
int CONFIG_SYN_RFTYPE = 1;
29 
char CONFIG_TARGET_CLK[128] = "gen";
30 
int CONFIG_PLL_CLK_MUL = 1;
31 
int CONFIG_PLL_CLK_DIV = 1;
32 
char *CONFIG_PCI_CLKDLL = false;
33 
char *CONFIG_PCI_SYSCLK = false;
34 
 
35 
/* IU options */
36 
 
37 
int CONFIG_IU_NWINDOWS = 8;
38 
char CFG_IU_MUL_TYPE[16] = "none";
39 
char CFG_IU_DIVIDER[16] = "none";
40 
char *CONFIG_IU_MUL_MAC = false;
41 
char *CONFIG_IU_MULPIPE = false;
42 
char *CONFIG_IU_FASTJUMP = false;
43 
char *CONFIG_IU_ICCHOLD = false;
44 
char *CONFIG_IU_FASTDECODE = false;
45 
char *CONFIG_IU_RFPOW = false;
46 
int CONFIG_IU_LDELAY = 1;
47 
int CONFIG_IU_WATCHPOINTS = 0;
48 
 
49 
/* FPU config */
50 
 
51 
int CONFIG_FPU_ENABLE = 0;
52 
char *CFG_FPU_CORE = "meiko";
53 
char *CFG_FPU_IF = "none";
54 
int CONFIG_FPU_REGS = 32;
55 
int CONFIG_FPU_VER = 0;
56 
 
57 
/* CP config */
58 
 
59 
char CONFIG_CP_CFG[128] = "cp_none";
60 
 
61 
/* cache configuration */
62 
 
63 
int CFG_ICACHE_SZ = 2;
64 
int CFG_ICACHE_LSZ = 16;
65 
int CFG_ICACHE_ASSO = 1;
66 
char *CFG_ICACHE_ALGO = "rnd";
67 
int CFG_ICACHE_LOCK = 0;
68 
int CFG_DCACHE_SZ = 1;
69 
int CFG_DCACHE_LSZ = 16;
70 
char *CFG_DCACHE_SNOOP = "none";
71 
int CFG_DCACHE_ASSO = 1;
72 
char *CFG_DCACHE_ALGO = "rnd";
73 
int CFG_DCACHE_LOCK = 0;
74 
char *CFG_DCACHE_RFAST = false;
75 
char *CFG_DCACHE_WFAST = false;
76 
char *CFG_DCACHE_LRAM  = false;
77 
int CFG_DCACHE_LRSZ = 1;
78 
int CFG_DCACHE_LRSTART = 0x8f;
79 
 
80 
/* MMU config */
81 
 
82 
int CFG_MMU_ENABLE = 0;
83 
char *CFG_MMU_TYPE = "combinedtlb";
84 
char *CFG_MMU_REP = "replruarray";
85 
int CFG_MMU_I = 8;
86 
int CFG_MMU_D = 8;
87 
char *CFG_MMU_DIAG = false;
88 
 
89 
/* Memory controller config */
90 
 
91 
char *CONFIG_MCTRL_8BIT = false;
92 
char *CONFIG_MCTRL_16BIT = false;
93 
char *CONFIG_MCTRL_5CS = false;
94 
char *CONFIG_MCTRL_WFB = false;
95 
char *CONFIG_MCTRL_SDRAM = false;
96 
char *CONFIG_MCTRL_SDRAM_INVCLK = false;
97 
char *CONFIG_MCTRL_SDRAM_SEPBUS = false;
98 
 
99 
/* Peripherals */
100 
char *CONFIG_PERI_LCONF = false;
101 
char *CONFIG_PERI_AHBSTAT = false;
102 
char *CONFIG_PERI_WPROT = false;
103 
char *CONFIG_PERI_WDOG = false;
104 
char *CONFIG_PERI_IRQ2 = false;
105 
 
106 
/* AHB */
107 
 
108 
int CONFIG_AHB_DEFMST = 0;
109 
char *CONFIG_AHB_SPLIT = false;
110 
char *CONFIG_AHBRAM_ENABLE = false;
111 
int CFG_AHBRAM_SZ = 4;
112 
 
113 
/* Debug */
114 
char *CONFIG_DEBUG_UART = false;
115 
char *CONFIG_DEBUG_IURF = false;
116 
char *CONFIG_DEBUG_FPURF = false;
117 
char *CONFIG_DEBUG_NOHALT = false;
118 
int CFG_DEBUG_PCLOW = 2;
119 
char *CONFIG_DEBUG_RFERR = false;
120 
char *CONFIG_DEBUG_CACHEMEMERR = false;
121 
 
122 
/* DSU */
123 
char *CONFIG_DSU_ENABLE = false;
124 
char *CONFIG_DSU_TRACEBUF = false;
125 
char *CONFIG_DSU_MIXED_TRACE = false;
126 
char *CONFIG_SYN_TRACE_DPRAM = false;
127 
int CFG_DSU_TRACE_SZ = 64;
128 
 
129 
/* Boot */
130 
char *CFG_BOOT_SOURCE = "memory";
131 
int CONFIG_BOOT_RWS = 0;
132 
int CONFIG_BOOT_WWS = 0;
133 
int CONFIG_BOOT_SYSCLK = 25000000;
134 
int CONFIG_BOOT_BAUDRATE = 19200;
135 
char *CONFIG_BOOT_EXTBAUD = false;
136 
int CONFIG_BOOT_PROMABITS = 11;
137 
 
138 
/* Ethernet */
139 
char *CONFIG_ETH_ENABLE = false;
140 
int CONFIG_ETH_TXFIFO = 8;
141 
int CONFIG_ETH_RXFIFO = 8;
142 
int CONFIG_ETH_BURST = 4;
143 
 
144 
/* PCI */
145 
char *CFG_PCI_CORE = "none";
146 
char *CONFIG_PCI_ENABLE = false;
147 
int CONFIG_PCI_VENDORID = 0;
148 
int CONFIG_PCI_DEVICEID = 0;
149 
int CONFIG_PCI_SUBSYSID = 0;
150 
int CONFIG_PCI_REVID = 0;
151 
int CONFIG_PCI_CLASSCODE = 0;
152 
int CFG_PCI_FIFO = 8;
153 
int CFG_PCI_TDEPTH = 256;
154 
char *CONFIG_PCI_TRACE = false;
155 
char *CONFIG_PCI_PMEPADS = false;
156 
char *CONFIG_PCI_P66PAD = false;
157 
char *CONFIG_PCI_RESETALL = false;
158 
char *CONFIG_PCI_ARBEN = false;
159 
int pciahbmst = 0;
160 
 
161 
/* FT */
162 
 
163 
int CONFIG_FT_ENABLE = 0;
164 
char *CONFIG_FT_RF_ENABLE = false;
165 
char *CONFIG_FT_RF_PARITY = false;
166 
char *CONFIG_FT_RF_EDAC = false;
167 
int CONFIG_FT_RF_PARBITS = 0;
168 
char *CONFIG_FT_RF_WRFAST = false;
169 
char *CONFIG_FT_TMR_REG = false;
170 
char *CONFIG_FT_TMR_CLK = false;
171 
char *CONFIG_FT_MC = false;
172 
char *CONFIG_FT_MEMEDAC = false;
173 
char *CONFIG_FT_CACHEMEM_ENABLE = false;
174 
int CONFIG_FT_CACHEMEM_PARBITS = 0;
175 
char *CONFIG_FT_CACHEMEM_APAR = false;
176 
 
177 
 
178 
int dsuen, pcien, ahbram, ethen;
179 
char tmps[32];
180 
int ahbmst = 1;
181 
 
182 
int log2(int x)
183 
{
184 
    int i;
185 
 
186 
    x--;
187 
    for (i=0; x!=0; i++) x >>= 1;
188 
    return(i);
189 
}
190 
 
191 
main()
192 
{
193 
 
194 
    char lbuf[1024], *value;
195 
 
196 
    fp = fopen("device.vhd", "w+");
197 
    if (!fp) {
198 
        printf("could not open file device.vhd\n");
199 
        exit(1);
200 
    }
201 
    while (!feof(stdin))
202 
      {
203 
          lbuf[0] = 0;
204 
          fgets (lbuf, 1023, stdin);
205 
          if (strncmp(lbuf, "CONFIG", 6) == 0) {
206 
                value = strchr(lbuf,'=');
207 
                value[0] = 0;
208 
                value++;
209 
                while ((strlen (value) > 0) &&
210 
                  ((value[strlen (value) - 1] == '\n')
211 
                   || (value[strlen (value) - 1] == '\r')
212 
                   || (value[strlen (value) - 1] == '"')
213 
                )) value[strlen (value) - 1] = 0;
214 
                if ((strlen (value) > 0) && (value[0] == '"')) {
215 
                   value++;
216 
                  }
217 
 
218 
                /* synthesis options */
219 
              else if (strcmp("CONFIG_SYN_GENERIC", lbuf) == 0)
220 
                strcpy(CFG_SYN_TARGET_TECH, "gen");
221 
              else if (strcmp("CONFIG_SYN_ATC35", lbuf) == 0)
222 
                strcpy(CFG_SYN_TARGET_TECH, "atc35");
223 
              else if (strcmp("CONFIG_SYN_ATC25", lbuf) == 0)
224 
                strcpy(CFG_SYN_TARGET_TECH, "atc25");
225 
              else if (strcmp("CONFIG_SYN_ATC18", lbuf) == 0)
226 
                strcpy(CFG_SYN_TARGET_TECH, "atc18");
227 
              else if (strcmp("CONFIG_SYN_FS90", lbuf) == 0)
228 
                strcpy(CFG_SYN_TARGET_TECH, "fs90");
229 
              else if (strcmp("CONFIG_SYN_UMC018", lbuf) == 0)
230 
                strcpy(CFG_SYN_TARGET_TECH, "umc18");
231 
              else if (strcmp("CONFIG_SYN_TSMC025", lbuf) == 0)
232 
                strcpy(CFG_SYN_TARGET_TECH, "tsmc25");
233 
              else if (strcmp("CONFIG_SYN_PROASIC", lbuf) == 0)
234 
                strcpy(CFG_SYN_TARGET_TECH, "proasic");
235 
              else if (strcmp("CONFIG_SYN_AXCEL", lbuf) == 0)
236 
                strcpy(CFG_SYN_TARGET_TECH, "axcel");
237 
              else if (strcmp("CONFIG_SYN_VIRTEX", lbuf) == 0)
238 
                strcpy(CFG_SYN_TARGET_TECH, "virtex");
239 
              else if (strcmp("CONFIG_SYN_VIRTEX2", lbuf) == 0)
240 
                strcpy(CFG_SYN_TARGET_TECH, "virtex2");
241 
              else if (strcmp("CONFIG_SYN_INFER_PADS", lbuf) == 0)
242 
                CONFIG_SYN_INFER_PADS = true;
243 
              else if (strcmp("CONFIG_SYN_INFER_PCI_PADS", lbuf) == 0)
244 
                CONFIG_SYN_INFER_PCI_PADS = true;
245 
              else if (strcmp("CONFIG_SYN_INFER_RAM", lbuf) == 0)
246 
                CONFIG_SYN_INFER_RAM = true;
247 
              else if (strcmp("CONFIG_SYN_INFER_ROM", lbuf) == 0)
248 
                CONFIG_SYN_INFER_ROM = true;
249 
              else if (strcmp("CONFIG_SYN_INFER_REGF", lbuf) == 0)
250 
                CONFIG_SYN_INFER_REGF = true;
251 
              else if (strcmp("CONFIG_SYN_INFER_MULT", lbuf) == 0)
252 
                CONFIG_SYN_INFER_MULT = true;
253 
              else if (strcmp("CONFIG_SYN_RFTYPE", lbuf) == 0)
254 
                CONFIG_SYN_RFTYPE = 2;
255 
              else if (strcmp("CONFIG_SYN_TRACE_DPRAM", lbuf) == 0)
256 
                CONFIG_SYN_TRACE_DPRAM = true;
257 
              else if (strcmp("CONFIG_CLK_VIRTEX", lbuf) == 0)
258 
                strcpy(CONFIG_TARGET_CLK, "virtex");
259 
              else if (strcmp("CONFIG_AXCEL_HCLKBUF", lbuf) == 0)
260 
                strcpy(CONFIG_TARGET_CLK, "axcel");
261 
              else if (strcmp("CONFIG_CLKDLL_1_2", lbuf) == 0) {
262 
                CONFIG_PLL_CLK_MUL = 1; CONFIG_PLL_CLK_DIV = 2;
263 
              } else if (strcmp("CONFIG_CLKDLL_1_1", lbuf) == 0) {
264 
                CONFIG_PLL_CLK_MUL = 1; CONFIG_PLL_CLK_DIV = 1;
265 
              } else if (strcmp("CONFIG_CLKDLL_2_1", lbuf) == 0) {
266 
                CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 1;
267 
              } else if (strcmp("CONFIG_CLK_VIRTEX2", lbuf) == 0)
268 
                strcpy(CONFIG_TARGET_CLK, "virtex2");
269 
              else if (strcmp("CONFIG_DCM_2_3", lbuf) == 0) {
270 
                CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 3;
271 
              } else if (strcmp("CONFIG_DCM_3_4", lbuf) == 0) {
272 
                CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 4;
273 
              } else if (strcmp("CONFIG_DCM_4_5", lbuf) == 0) {
274 
                CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 5;
275 
              } else if (strcmp("CONFIG_DCM_1_1", lbuf) == 0) {
276 
                CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 2;
277 
              } else if (strcmp("CONFIG_DCM_5_4", lbuf) == 0) {
278 
                CONFIG_PLL_CLK_MUL = 5; CONFIG_PLL_CLK_DIV = 4;
279 
              } else if (strcmp("CONFIG_DCM_4_3", lbuf) == 0) {
280 
                CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 3;
281 
              } else if (strcmp("CONFIG_DCM_3_2", lbuf) == 0) {
282 
                CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 2;
283 
              } else if (strcmp("CONFIG_DCM_5_3", lbuf) == 0) {
284 
                CONFIG_PLL_CLK_MUL = 5; CONFIG_PLL_CLK_DIV = 3;
285 
              } else if (strcmp("CONFIG_DCM_2_1", lbuf) == 0) {
286 
                CONFIG_PLL_CLK_MUL = 2; CONFIG_PLL_CLK_DIV = 1;
287 
              } else if (strcmp("CONFIG_DCM_3_1", lbuf) == 0) {
288 
                CONFIG_PLL_CLK_MUL = 3; CONFIG_PLL_CLK_DIV = 1;
289 
              } else if (strcmp("CONFIG_DCM_4_1", lbuf) == 0) {
290 
                CONFIG_PLL_CLK_MUL = 4; CONFIG_PLL_CLK_DIV = 1;
291 
              } else if (strcmp("CONFIG_PCI_DLL", lbuf) == 0)
292 
                CONFIG_PCI_CLKDLL = true;
293 
              else if (strcmp("CONFIG_PCI_SYSCLK", lbuf) == 0)
294 
                CONFIG_PCI_SYSCLK = true;
295 
                /* IU options */
296 
              else if (strcmp("CONFIG_IU_NWINDOWS", lbuf) == 0) {
297 
                CONFIG_IU_NWINDOWS = VAL(value);
298 
                if ((CONFIG_IU_NWINDOWS > 32) || (CONFIG_IU_NWINDOWS < 1))
299 
                  CONFIG_IU_NWINDOWS = 8;
300 
              } else if (strcmp("CONFIG_IU_V8MULDIV", lbuf) == 0)
301 
                strcpy(CFG_IU_DIVIDER, "radix2");
302 
              else if (strcmp("CONFIG_IU_MUL_LATENCY_1", lbuf) == 0)
303 
                strcpy(CFG_IU_MUL_TYPE, "m32x32");
304 
              else if (strcmp("CONFIG_IU_MUL_LATENCY_2", lbuf) == 0)
305 
                strcpy(CFG_IU_MUL_TYPE, "m32x16");
306 
              else if (strcmp("CONFIG_IU_MUL_LATENCY_4", lbuf) == 0)
307 
                strcpy(CFG_IU_MUL_TYPE, "m16x16");
308 
              else if (strcmp("CONFIG_IU_MUL_LATENCY_5", lbuf) == 0) {
309 
                strcpy(CFG_IU_MUL_TYPE, "m16x16");
310 
                CONFIG_IU_MULPIPE = true;
311 
              }
312 
              else if (strcmp("CONFIG_IU_MUL_LATENCY_35", lbuf) == 0)
313 
                strcpy(CFG_IU_MUL_TYPE, "iterative");
314 
              else if (strcmp("CONFIG_IU_MUL_MAC", lbuf) == 0)  {
315 
                strcpy(CFG_IU_MUL_TYPE, "m16x16");
316 
                CONFIG_IU_MUL_MAC = true;
317 
              }
318 
              else if (strcmp("CONFIG_IU_FASTJUMP", lbuf) == 0)
319 
                CONFIG_IU_FASTJUMP = true;
320 
              else if (strcmp("CONFIG_IU_FASTDECODE", lbuf) == 0)
321 
                CONFIG_IU_FASTDECODE = true;
322 
              else if (strcmp("CONFIG_IU_RFPOW", lbuf) == 0)
323 
                CONFIG_IU_RFPOW = true;
324 
              else if (strcmp("CONFIG_IU_ICCHOLD", lbuf) == 0)
325 
                CONFIG_IU_ICCHOLD = true;
326 
              else if (strcmp("CONFIG_IU_LDELAY", lbuf) == 0) {
327 
                CONFIG_IU_LDELAY = VAL(value);
328 
                if ((CONFIG_IU_LDELAY > 2) || (CONFIG_IU_LDELAY < 1))
329 
                  CONFIG_IU_LDELAY = 2;
330 
              } else if (strcmp("CONFIG_IU_WATCHPOINTS", lbuf) == 0) {
331 
                CONFIG_IU_WATCHPOINTS = VAL(value);
332 
                if ((CONFIG_IU_WATCHPOINTS > 4) || (CONFIG_IU_WATCHPOINTS < 0))
333 
                CONFIG_IU_WATCHPOINTS = 0;
334 
                /* FPU config */
335 
              } else if (strcmp("CONFIG_FPU_ENABLE", lbuf) == 0)
336 
                CONFIG_FPU_ENABLE = 1;
337 
              else if (strcmp("CONFIG_FPU_GRFPU", lbuf) == 0) {
338 
                CFG_FPU_CORE = "grfpu"; CFG_FPU_IF = "parallel";
339 
                CONFIG_FPU_REGS = 0;
340 
              } else if (strcmp("CONFIG_FPU_MEIKO", lbuf) == 0) {
341 
                CFG_FPU_CORE = "meiko"; CFG_FPU_IF = "serial";
342 
              } else if (strcmp("CONFIG_FPU_LTH", lbuf) == 0) {
343 
                CFG_FPU_CORE = "lth"; CFG_FPU_IF = "serial";
344 
              } else if (strcmp("CONFIG_FPU_VER", lbuf) == 0)
345 
                CONFIG_FPU_VER = VAL(value) & 0x07;
346 
              /* CP config */
347 
              else if (strcmp("CONFIG_CP_ENABLE", lbuf) == 0)  {}
348 
              else if (strcmp("CONFIG_CP_CFG", lbuf) == 0)
349 
                strcpy(CONFIG_CP_CFG, value);
350 
              /* cache config */
351 
              else if (strcmp("CONFIG_ICACHE_ASSO1", lbuf) == 0)
352 
                CFG_ICACHE_ASSO = 1;
353 
              else if (strcmp("CONFIG_ICACHE_ASSO2", lbuf) == 0)
354 
                CFG_ICACHE_ASSO = 2;
355 
              else if (strcmp("CONFIG_ICACHE_ASSO3", lbuf) == 0)
356 
                CFG_ICACHE_ASSO = 3;
357 
              else if (strcmp("CONFIG_ICACHE_ASSO4", lbuf) == 0)
358 
                CFG_ICACHE_ASSO = 4;
359 
              else if (strcmp("CONFIG_ICACHE_ALGORND", lbuf) == 0)
360 
                CFG_ICACHE_ALGO = "rnd";
361 
              else if (strcmp("CONFIG_ICACHE_ALGOLRR", lbuf) == 0)
362 
                CFG_ICACHE_ALGO = "lrr";
363 
              else if (strcmp("CONFIG_ICACHE_ALGOLRU", lbuf) == 0)
364 
                CFG_ICACHE_ALGO = "lru";
365 
              else if (strcmp("CONFIG_ICACHE_LOCK", lbuf) == 0)
366 
                CFG_ICACHE_LOCK = 1;
367 
              else if (strcmp("CONFIG_ICACHE_SZ1", lbuf) == 0)
368 
                CFG_ICACHE_SZ = 1;
369 
              else if (strcmp("CONFIG_ICACHE_SZ2", lbuf) == 0)
370 
                CFG_ICACHE_SZ = 2;
371 
              else if (strcmp("CONFIG_ICACHE_SZ4", lbuf) == 0)
372 
                CFG_ICACHE_SZ = 4;
373 
              else if (strcmp("CONFIG_ICACHE_SZ8", lbuf) == 0)
374 
                CFG_ICACHE_SZ = 8;
375 
              else if (strcmp("CONFIG_ICACHE_SZ16", lbuf) == 0)
376 
                CFG_ICACHE_SZ = 16;
377 
              else if (strcmp("CONFIG_ICACHE_SZ32", lbuf) == 0)
378 
                CFG_ICACHE_SZ = 32;
379 
              else if (strcmp("CONFIG_ICACHE_SZ64", lbuf) == 0)
380 
                CFG_ICACHE_SZ = 64;
381 
              else if (strcmp("CONFIG_ICACHE_LZ16", lbuf) == 0)
382 
                CFG_ICACHE_LSZ = 16;
383 
              else if (strcmp("CONFIG_ICACHE_LZ32", lbuf) == 0)
384 
                CFG_ICACHE_LSZ = 32;
385 
              else if (strcmp("CONFIG_DCACHE_SZ1", lbuf) == 0)
386 
                CFG_DCACHE_SZ = 1;
387 
              else if (strcmp("CONFIG_DCACHE_SZ2", lbuf) == 0)
388 
                CFG_DCACHE_SZ = 2;
389 
              else if (strcmp("CONFIG_DCACHE_SZ4", lbuf) == 0)
390 
                CFG_DCACHE_SZ = 4;
391 
              else if (strcmp("CONFIG_DCACHE_SZ8", lbuf) == 0)
392 
                CFG_DCACHE_SZ = 8;
393 
              else if (strcmp("CONFIG_DCACHE_SZ16", lbuf) == 0)
394 
                CFG_DCACHE_SZ = 16;
395 
              else if (strcmp("CONFIG_DCACHE_SZ32", lbuf) == 0)
396 
                CFG_DCACHE_SZ = 32;
397 
              else if (strcmp("CONFIG_DCACHE_SZ64", lbuf) == 0)
398 
                CFG_DCACHE_SZ = 64;
399 
              else if (strcmp("CONFIG_DCACHE_LZ16", lbuf) == 0)
400 
                CFG_DCACHE_LSZ = 16;
401 
              else if (strcmp("CONFIG_DCACHE_LZ32", lbuf) == 0)
402 
                CFG_DCACHE_LSZ = 32;
403 
              else if (strcmp("CONFIG_DCACHE_SNOOP_SLOW", lbuf) == 0)
404 
                CFG_DCACHE_SNOOP = "slow";
405 
              else if (strcmp("CONFIG_DCACHE_SNOOP_FAST", lbuf) == 0)
406 
                CFG_DCACHE_SNOOP = "fast";
407 
              else if (strcmp("CONFIG_DCACHE_SNOOP", lbuf) == 0)  {}
408 
              else if (strcmp("CONFIG_DCACHE_ASSO1", lbuf) == 0)
409 
                CFG_DCACHE_ASSO = 1;
410 
              else if (strcmp("CONFIG_DCACHE_ASSO2", lbuf) == 0)
411 
                CFG_DCACHE_ASSO = 2;
412 
              else if (strcmp("CONFIG_DCACHE_ASSO3", lbuf) == 0)
413 
                CFG_DCACHE_ASSO = 3;
414 
              else if (strcmp("CONFIG_DCACHE_ASSO4", lbuf) == 0)
415 
                CFG_DCACHE_ASSO = 4;
416 
              else if (strcmp("CONFIG_DCACHE_ALGORND", lbuf) == 0)
417 
                CFG_DCACHE_ALGO = "rnd";
418 
              else if (strcmp("CONFIG_DCACHE_ALGOLRR", lbuf) == 0)
419 
                CFG_DCACHE_ALGO = "lrr";
420 
              else if (strcmp("CONFIG_DCACHE_ALGOLRU", lbuf) == 0)
421 
                CFG_DCACHE_ALGO = "lru";
422 
              else if (strcmp("CONFIG_DCACHE_LOCK", lbuf) == 0)
423 
                CFG_DCACHE_LOCK = 1;
424 
              else if (strcmp("CONFIG_DCACHE_RFAST", lbuf) == 0)
425 
                CFG_DCACHE_RFAST = true;
426 
              else if (strcmp("CONFIG_DCACHE_WFAST", lbuf) == 0)
427 
                CFG_DCACHE_WFAST = true;
428 
              else if (strcmp("CONFIG_DCACHE_LRAM", lbuf) == 0)
429 
                CFG_DCACHE_LRAM = true;
430 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ1", lbuf) == 0)
431 
                CFG_DCACHE_LRSZ = 1;
432 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ2", lbuf) == 0)
433 
                CFG_DCACHE_LRSZ = 2;
434 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ4", lbuf) == 0)
435 
                CFG_DCACHE_LRSZ = 4;
436 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ8", lbuf) == 0)
437 
                CFG_DCACHE_LRSZ = 8;
438 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ16", lbuf) == 0)
439 
                CFG_DCACHE_LRSZ = 16;
440 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ32", lbuf) == 0)
441 
                CFG_DCACHE_LRSZ = 32;
442 
              else if (strcmp("CONFIG_DCACHE_LRAM_SZ64", lbuf) == 0)
443 
                CFG_DCACHE_LRSZ = 64;
444 
              else if (strcmp("CONFIG_DCACHE_LRSTART", lbuf) == 0) {
445 
                strcpy(tmps, "0x"); strcat(tmps, value);
446 
                CFG_DCACHE_LRSTART = VAL(tmps) & 0x0ff;
447 
              } else if (strcmp("CONFIG_MMU_ENABLE", lbuf) == 0)
448 
                CFG_MMU_ENABLE = 1;
449 
              else if (strcmp("CONFIG_MMU_DIAG", lbuf) == 0)
450 
                CFG_MMU_DIAG = true;
451 
              else if (strcmp("CONFIG_MMU_SPLIT", lbuf) == 0)
452 
                CFG_MMU_TYPE = "splittlb";
453 
              else if (strcmp("CONFIG_MMU_COMBINED", lbuf) == 0)
454 
                CFG_MMU_TYPE = "combinedtlb";
455 
              else if (strcmp("CONFIG_MMU_REPARRAY", lbuf) == 0)
456 
                CFG_MMU_REP = "replruarray";
457 
              else if (strcmp("CONFIG_MMU_REPINCREMENT", lbuf) == 0)
458 
                CFG_MMU_REP = "repincrement";
459 
              else if (strcmp("CONFIG_MMU_I2", lbuf) == 0)
460 
                CFG_MMU_I = 2;
461 
              else if (strcmp("CONFIG_MMU_I4", lbuf) == 0)
462 
                CFG_MMU_I = 4;
463 
              else if (strcmp("CONFIG_MMU_I8", lbuf) == 0)
464 
                CFG_MMU_I = 8;
465 
              else if (strcmp("CONFIG_MMU_I16", lbuf) == 0)
466 
                CFG_MMU_I = 16;
467 
              else if (strcmp("CONFIG_MMU_I32", lbuf) == 0)
468 
                CFG_MMU_I = 32;
469 
              else if (strcmp("CONFIG_MMU_D1", lbuf) == 0)
470 
                CFG_MMU_D = 1;
471 
              else if (strcmp("CONFIG_MMU_D2", lbuf) == 0)
472 
                CFG_MMU_D = 2;
473 
              else if (strcmp("CONFIG_MMU_D4", lbuf) == 0)
474 
                CFG_MMU_D = 4;
475 
              else if (strcmp("CONFIG_MMU_D8", lbuf) == 0)
476 
                CFG_MMU_D = 8;
477 
              else if (strcmp("CONFIG_MMU_D16", lbuf) == 0)
478 
                CFG_MMU_D = 16;
479 
              else if (strcmp("CONFIG_MMU_D32", lbuf) == 0)
480 
                CFG_MMU_D = 32;
481 
 
482 
              /* CP config */
483 
              else if (strcmp("CONFIG_CP_ENABLE", lbuf) == 0)  {}
484 
              /* Memory controller */
485 
              else if (strcmp("CONFIG_MCTRL_8BIT", lbuf) == 0)
486 
                CONFIG_MCTRL_8BIT = true;
487 
              else if (strcmp("CONFIG_MCTRL_16BIT", lbuf) == 0)
488 
                CONFIG_MCTRL_16BIT = true;
489 
              else if (strcmp("CONFIG_MCTRL_5CS", lbuf) == 0)
490 
                CONFIG_MCTRL_5CS = true;
491 
              else if (strcmp("CONFIG_MCTRL_WFB", lbuf) == 0)
492 
                CONFIG_MCTRL_WFB = true;
493 
              else if (strcmp("CONFIG_MCTRL_SDRAM", lbuf) == 0)
494 
                CONFIG_MCTRL_SDRAM = true;
495 
              else if (strcmp("CONFIG_MCTRL_SDRAM_INVCLK", lbuf) == 0)
496 
                CONFIG_MCTRL_SDRAM_INVCLK = true;
497 
              else if (strcmp("CONFIG_MCTRL_SDRAM_SEPBUS", lbuf) == 0)
498 
                CONFIG_MCTRL_SDRAM_SEPBUS = true;
499 
              /* Peripherals */
500 
              else if (strcmp("CONFIG_PERI_LCONF", lbuf) == 0)
501 
                CONFIG_PERI_LCONF = true;
502 
              else if (strcmp("CONFIG_PERI_AHBSTAT", lbuf) == 0)
503 
                CONFIG_PERI_AHBSTAT = true;
504 
              else if (strcmp("CONFIG_PERI_WPROT", lbuf) == 0)
505 
                CONFIG_PERI_WPROT = true;
506 
              else if (strcmp("CONFIG_PERI_WDOG", lbuf) == 0)
507 
                CONFIG_PERI_WDOG = true;
508 
              else if (strcmp("CONFIG_PERI_IRQ2", lbuf) == 0)
509 
                CONFIG_PERI_IRQ2 = true;
510 
              /* AHB */
511 
              else if (strcmp("CONFIG_AHB_DEFMST", lbuf) == 0)
512 
                CONFIG_AHB_DEFMST = VAL(value);
513 
              else if (strcmp("CONFIG_AHB_SPLIT", lbuf) == 0)
514 
                CONFIG_AHB_SPLIT = true;
515 
              else if (strcmp("CONFIG_AHBRAM_ENABLE", lbuf) == 0)
516 
                CONFIG_AHBRAM_ENABLE = true;
517 
              else if (strcmp("CONFIG_AHBRAM_SZ1", lbuf) == 0)
518 
                CFG_AHBRAM_SZ = 1;
519 
              else if (strcmp("CONFIG_AHBRAM_SZ2", lbuf) == 0)
520 
                CFG_AHBRAM_SZ = 2;
521 
              else if (strcmp("CONFIG_AHBRAM_SZ4", lbuf) == 0)
522 
                CFG_AHBRAM_SZ = 3;
523 
              else if (strcmp("CONFIG_AHBRAM_SZ8", lbuf) == 0)
524 
                CFG_AHBRAM_SZ = 4;
525 
              else if (strcmp("CONFIG_AHBRAM_SZ16", lbuf) == 0)
526 
                CFG_AHBRAM_SZ = 5;
527 
              else if (strcmp("CONFIG_AHBRAM_SZ32", lbuf) == 0)
528 
                CFG_AHBRAM_SZ = 6;
529 
              else if (strcmp("CONFIG_AHBRAM_SZ64", lbuf) == 0)
530 
                CFG_AHBRAM_SZ = 7;
531 
                /* Debug */
532 
              else if (strcmp("CONFIG_DEBUG_UART", lbuf) == 0)
533 
                CONFIG_DEBUG_UART = true;
534 
              else if (strcmp("CONFIG_DEBUG_IURF", lbuf) == 0)
535 
                CONFIG_DEBUG_IURF = true;
536 
              else if (strcmp("CONFIG_DEBUG_FPURF", lbuf) == 0)
537 
                CONFIG_DEBUG_FPURF = true;
538 
              else if (strcmp("CONFIG_DEBUG_NOHALT", lbuf) == 0)
539 
                CONFIG_DEBUG_NOHALT = true;
540 
              else if (strcmp("CONFIG_DEBUG_PC32", lbuf) == 0)
541 
                CFG_DEBUG_PCLOW = 0;
542 
              else if (strcmp("CONFIG_DEBUG_RFERR", lbuf) == 0)
543 
                CONFIG_DEBUG_RFERR = true;
544 
              else if (strcmp("CONFIG_DEBUG_CACHEMEMERR", lbuf) == 0)
545 
                CONFIG_DEBUG_CACHEMEMERR = true;
546 
                /* DSU */
547 
              else if (strcmp("CONFIG_DSU_ENABLE", lbuf) == 0)
548 
                {CONFIG_DSU_ENABLE = true; ahbmst ++;}
549 
              else if (strcmp("CONFIG_DSU_TRACEBUF", lbuf) == 0)
550 
                CONFIG_DSU_TRACEBUF = true;
551 
              else if (strcmp("CONFIG_DSU_MIXED_TRACE", lbuf) == 0)
552 
                CONFIG_DSU_MIXED_TRACE = true;
553 
              else if (strcmp("CONFIG_DSU_TRACESZ64", lbuf) == 0)
554 
                CFG_DSU_TRACE_SZ = 64;
555 
              else if (strcmp("CONFIG_DSU_TRACESZ128", lbuf) == 0)
556 
                CFG_DSU_TRACE_SZ = 128;
557 
              else if (strcmp("CONFIG_DSU_TRACESZ256", lbuf) == 0)
558 
                CFG_DSU_TRACE_SZ = 256;
559 
              else if (strcmp("CONFIG_DSU_TRACESZ512", lbuf) == 0)
560 
                CFG_DSU_TRACE_SZ = 512;
561 
              else if (strcmp("CONFIG_DSU_TRACESZ1024", lbuf) == 0)
562 
                CFG_DSU_TRACE_SZ = 1024;
563 
                /* Boot */
564 
              else if (strcmp("CONFIG_BOOT_EXTPROM", lbuf) == 0)
565 
                CFG_BOOT_SOURCE = "memory";
566 
              else if (strcmp("CONFIG_BOOT_INTPROM", lbuf) == 0)
567 
                CFG_BOOT_SOURCE = "prom";
568 
              else if (strcmp("CONFIG_BOOT_MIXPROM", lbuf) == 0)
569 
                CFG_BOOT_SOURCE = "dual";
570 
              else if (strcmp("CONFIG_BOOT_RWS", lbuf) == 0)
571 
                CONFIG_BOOT_RWS = VAL(value) & 0x3;
572 
              else if (strcmp("CONFIG_BOOT_WWS", lbuf) == 0)
573 
                CONFIG_BOOT_WWS = VAL(value) & 0x3;
574 
              else if (strcmp("CONFIG_BOOT_SYSCLK", lbuf) == 0)
575 
                CONFIG_BOOT_SYSCLK = VAL(value);
576 
              else if (strcmp("CONFIG_BOOT_BAUDRATE", lbuf) == 0)
577 
                CONFIG_BOOT_BAUDRATE = VAL(value) & 0x3fffff;
578 
              else if (strcmp("CONFIG_BOOT_EXTBAUD", lbuf) == 0)
579 
                CONFIG_BOOT_EXTBAUD = true;
580 
              else if (strcmp("CONFIG_BOOT_PROMABITS", lbuf) == 0)
581 
                CONFIG_BOOT_PROMABITS = VAL(value) & 0x3f;
582 
              /* Ethernet */
583 
              else if (strcmp("CONFIG_ETH_ENABLE", lbuf) == 0)
584 
                { CONFIG_ETH_ENABLE = true; ahbmst++;}
585 
              else if (strcmp("CONFIG_ETH_TXFIFO", lbuf) == 0)
586 
                { CONFIG_ETH_TXFIFO = VAL(value) & 0x0ffff; }
587 
              else if (strcmp("CONFIG_ETH_RXFIFO", lbuf) == 0)
588 
                { CONFIG_ETH_RXFIFO = VAL(value) & 0x0ffff; }
589 
              else if (strcmp("CONFIG_ETH_BURST", lbuf) == 0)
590 
                { CONFIG_ETH_BURST = VAL(value) & 0x0ffff; }
591 
              /* PCI */
592 
              else if (strcmp("CONFIG_PCI_ENABLE", lbuf) == 0)
593 
                CONFIG_PCI_ENABLE = true;
594 
              else if (strcmp("CONFIG_PCI_SIMPLE_TARGET", lbuf) == 0)
595 
                {
596 
                CFG_PCI_CORE = "simple_target"; ahbmst++; pciahbmst = 1;
597 
                }
598 
              else if (strcmp("CONFIG_PCI_FAST_TARGET", lbuf) == 0)
599 
                {
600 
                CFG_PCI_CORE = "fast_target"; ahbmst++; pciahbmst = 1;
601 
                }
602 
              else if (strcmp("CONFIG_PCI_MASTER_TARGET", lbuf) == 0)
603 
                {
604 
                CFG_PCI_CORE = "master_target"; ahbmst++; pciahbmst = 1;
605 
                }
606 
              else if (strcmp("CONFIG_PCI_VENDORID", lbuf) == 0)
607 
                {
608 
                strcpy(tmps, "0x"); strcat(tmps, value);
609 
                CONFIG_PCI_VENDORID = VAL(tmps) & 0x0ffff;
610 
                }
611 
              else if (strcmp("CONFIG_PCI_DEVICEID", lbuf) == 0)
612 
                {
613 
                strcpy(tmps, "0x"); strcat(tmps, value);
614 
                CONFIG_PCI_DEVICEID = VAL(tmps) & 0x0ffff;
615 
                }
616 
              else if (strcmp("CONFIG_PCI_SUBSYSID", lbuf) == 0)
617 
                {
618 
                strcpy(tmps, "0x"); strcat(tmps, value);
619 
                CONFIG_PCI_SUBSYSID = VAL(tmps) & 0x0ffff;
620 
                }
621 
              else if (strcmp("CONFIG_PCI_REVID", lbuf) == 0)
622 
                {
623 
                strcpy(tmps, "0x"); strcat(tmps, value);
624 
                CONFIG_PCI_REVID = VAL(tmps) & 0x0ff;
625 
                }
626 
              else if (strcmp("CONFIG_PCI_CLASSCODE", lbuf) == 0)
627 
                {
628 
                strcpy(tmps, "0x"); strcat(tmps, value);
629 
                CONFIG_PCI_CLASSCODE = VAL(tmps) & 0x0ffffff;
630 
                }
631 
              else if (strcmp("CONFIG_PCI_TRACE256", lbuf) == 0)
632 
                CFG_PCI_TDEPTH = 8;
633 
              else if (strcmp("CONFIG_PCI_TRACE512", lbuf) == 0)
634 
                CFG_PCI_TDEPTH = 9;
635 
              else if (strcmp("CONFIG_PCI_TRACE1024", lbuf) == 0)
636 
                CFG_PCI_TDEPTH = 10;
637 
              else if (strcmp("CONFIG_PCI_TRACE2048", lbuf) == 0)
638 
                CFG_PCI_TDEPTH = 11;
639 
              else if (strcmp("CONFIG_PCI_TRACE4096", lbuf) == 0)
640 
                CFG_PCI_TDEPTH = 12;
641 
              else if (strcmp("CONFIG_PCI_TRACE", lbuf) == 0)
642 
                CONFIG_PCI_TRACE = true;
643 
              else if (strcmp("CONFIG_PCI_FIFO2", lbuf) == 0)
644 
                CFG_PCI_FIFO = 1;
645 
              else if (strcmp("CONFIG_PCI_FIFO4", lbuf) == 0)
646 
                CFG_PCI_FIFO = 2;
647 
              else if (strcmp("CONFIG_PCI_FIFO8", lbuf) == 0)
648 
                CFG_PCI_FIFO = 3;
649 
              else if (strcmp("CONFIG_PCI_FIFO16", lbuf) == 0)
650 
                CFG_PCI_FIFO = 4;
651 
              else if (strcmp("CONFIG_PCI_FIFO32", lbuf) == 0)
652 
                CFG_PCI_FIFO = 5;
653 
              else if (strcmp("CONFIG_PCI_FIFO64", lbuf) == 0)
654 
                CFG_PCI_FIFO = 6;
655 
              else if (strcmp("CONFIG_PCI_FIFO128", lbuf) == 0)
656 
                CFG_PCI_FIFO = 7;
657 
              else if (strcmp("CONFIG_PCI_PMEPADS", lbuf) == 0)
658 
                CONFIG_PCI_PMEPADS = true;
659 
              else if (strcmp("CONFIG_PCI_P66PAD", lbuf) == 0)
660 
                CONFIG_PCI_P66PAD = true;
661 
              else if (strcmp("CONFIG_PCI_RESETALL", lbuf) == 0)
662 
                CONFIG_PCI_RESETALL = true;
663 
              else if (strcmp("CONFIG_PCI_ARBEN", lbuf) == 0)
664 
                CONFIG_PCI_ARBEN = true;
665 
              /* FT */
666 
              else if (strcmp("CONFIG_FT_ENABLE", lbuf) == 0)
667 
                CONFIG_FT_ENABLE = 1;
668 
              else if (strcmp("CONFIG_FT_RF_ENABLE", lbuf) == 0)
669 
                CONFIG_FT_RF_ENABLE = true;
670 
              else if (strcmp("CONFIG_FT_RF_PARITY", lbuf) == 0)
671 
                CONFIG_FT_RF_PARITY = true;
672 
              else if (strcmp("CONFIG_FT_RF_EDAC", lbuf) == 0)
673 
                CONFIG_FT_RF_PARBITS = 7;
674 
              else if (strcmp("CONFIG_FT_RF_PARBITS", lbuf) == 0)
675 
                CONFIG_FT_RF_PARBITS = abs(VAL(value) % 3) ;
676 
              else if (strcmp("CONFIG_FT_RF_WRFAST", lbuf) == 0)
677 
                CONFIG_FT_RF_WRFAST = true;
678 
              else if (strcmp("CONFIG_FT_TMR_REG", lbuf) == 0)
679 
                CONFIG_FT_TMR_REG = true;
680 
              else if (strcmp("CONFIG_FT_TMR_CLK", lbuf) == 0)
681 
                CONFIG_FT_TMR_CLK = true;
682 
              else if (strcmp("CONFIG_FT_MC", lbuf) == 0)
683 
                CONFIG_FT_MC = true;
684 
              else if (strcmp("CONFIG_FT_MEMEDAC", lbuf) == 0)
685 
                CONFIG_FT_MEMEDAC = true;
686 
              else if (strcmp("CONFIG_FT_CACHEMEM_ENABLE", lbuf) == 0)
687 
                CONFIG_FT_CACHEMEM_ENABLE = true;
688 
              else if (strcmp("CONFIG_FT_CACHEMEM_PARBITS", lbuf) == 0)
689 
                CONFIG_FT_CACHEMEM_PARBITS = abs(VAL(value) % 3) ;
690 
              else if (strcmp("CONFIG_FT_CACHEMEM_APAR", lbuf) == 0)
691 
                CONFIG_FT_CACHEMEM_APAR = true;
692 
              else if (strcmp("CONFIG_FT_CACHEMEM_ENABLE", lbuf) == 0) {}
693 
              else
694 
                fprintf(stderr, "unknown config option: %s = %s\n", lbuf, value);
695 
 
696 
          }
697 
      }
698 
 
699 
  fprintf(fp, "\n\
700 
----------------------------------------------------------------------------\n\
701 
--  This file is a part of the LEON VHDL model\n\
702 
--  Copyright (C) 1999  European Space Agency (ESA)\n\
703 
--\n\
704 
--  This library is free software; you can redistribute it and/or\n\
705 
--  modify it under the terms of the GNU Lesser General Public\n\
706 
--  License as published by the Free Software Foundation; either\n\
707 
--  version 2 of the License, or (at your option) any later version.\n\
708 
--\n\
709 
--  See the file COPYING.LGPL for the full details of the license.\n\
710 
\n\
711 
\n\
712 
-----------------------------------------------------------------------------\n\
713 
-- Entity:      device\n\
714 
-- File:        device.vhd\n\
715 
-- Author:      Jiri Gaisler - Gaisler Research\n\
716 
-- Description: package to select current device configuration\n\
717 
------------------------------------------------------------------------------\n\
718 
\n\
719 
library IEEE;\n\
720 
use IEEE.std_logic_1164.all;\n\
721 
use work.target.all;\n\
722 
\n\
723 
package device is\n\
724 
\n\
725 
-----------------------------------------------------------------------------\n\
726 
-- Automatically generated by tkonfig/mkdevice\n\
727 
-----------------------------------------------------------------------------\n\
728 
");
729 
 
730 
  if (CONFIG_AHBRAM_ENABLE == true) ahbram = 4; else ahbram = 0;
731 
  if (CONFIG_DSU_ENABLE == true) dsuen = 2; else dsuen = 7;
732 
  if (CONFIG_PCI_ENABLE == true) pcien = 3; else pcien = 7;
733 
  if (CONFIG_ETH_ENABLE == true) ethen = 5; else ethen = 7;
734 
 
735 
  fprintf(fp, "\n\
736 
  constant syn_%s : syn_config_type := (  \n\
737 
    targettech => %s , infer_pads => %s, infer_pci => %s,\n\
738 
    infer_ram => %s, infer_regf => %s, infer_rom => %s,\n\
739 
    infer_mult => %s, rftype => %d, targetclk => %s,\n\
740 
    clk_mul => %d, clk_div => %d, pci_dll => %s, pci_sysclk => %s );\n\
741 
", CONFIG_CFG_NAME, CFG_SYN_TARGET_TECH, CONFIG_SYN_INFER_PADS, CONFIG_SYN_INFER_PCI_PADS, \
742 
   CONFIG_SYN_INFER_RAM, CONFIG_SYN_INFER_REGF, CONFIG_SYN_INFER_ROM,\
743 
   CONFIG_SYN_INFER_MULT, CONFIG_SYN_RFTYPE, CONFIG_TARGET_CLK,
744 
   CONFIG_PLL_CLK_MUL, CONFIG_PLL_CLK_DIV, CONFIG_PCI_CLKDLL,
745 
   CONFIG_PCI_SYSCLK);
746 
 
747 
  fprintf(fp, "\n\
748 
  constant iu_%s : iu_config_type := (\n\
749 
    nwindows => %d, multiplier => %s, mulpipe => %s, \n\
750 
    divider => %s, mac => %s, fpuen => %d, cpen => false, \n\
751 
    fastjump => %s, icchold => %s, lddelay => %d, fastdecode => %s, \n\
752 
    rflowpow => %s, watchpoints => %d);\n\
753 
", CONFIG_CFG_NAME, CONFIG_IU_NWINDOWS, CFG_IU_MUL_TYPE, CONFIG_IU_MULPIPE,
754 
   CFG_IU_DIVIDER, CONFIG_IU_MUL_MAC, CONFIG_FPU_ENABLE, CONFIG_IU_FASTJUMP,
755 
   CONFIG_IU_ICCHOLD, CONFIG_IU_LDELAY, CONFIG_IU_FASTDECODE, CONFIG_IU_RFPOW,
756 
   CONFIG_IU_WATCHPOINTS);
757 
 
758 
  fprintf(fp, "\n\
759 
  constant fpu_%s : fpu_config_type := \n\
760 
    (core => %s, interface => %s, fregs => %d, version => %d);\n\
761 
", CONFIG_CFG_NAME, CFG_FPU_CORE, CFG_FPU_IF, CONFIG_FPU_ENABLE*CONFIG_FPU_REGS,
762 
   CONFIG_FPU_VER);
763 
 
764 
   /*
765 
  if ((CFG_ICACHE_SZ > 4) && (CFG_MMU_TYPE != false)) {
766 
        CFG_ICACHE_SZ = 4;
767 
        printf("Warning: maximum iset size 4 kbyte when MMU enabled (fixed)\n");
768 
  }
769 
  if ((CFG_DCACHE_SZ > 4) && (CFG_MMU_TYPE != false)) {
770 
        CFG_DCACHE_SZ = 4;
771 
        printf("Warning: maximum dset size 4 kbyte when MMU enabled (fixed)\n");
772 
  }
773 
  */
774 
 
775 
  if ((strcmp(CFG_ICACHE_ALGO,"lrr") == 0) && (CFG_ICACHE_ASSO > 2))
776 
    CFG_ICACHE_ALGO = "rnd";
777 
  if ((strcmp(CFG_DCACHE_ALGO,"lrr") == 0) && (CFG_DCACHE_ASSO > 2))
778 
    CFG_DCACHE_ALGO = "rnd";
779 
 
780 
  fprintf(fp, "\n\
781 
  constant cache_%s : cache_config_type := (\n\
782 
    isets => %d, isetsize => %d, ilinesize => %d, ireplace => %s, ilock => %d,\n\
783 
    dsets => %d, dsetsize => %d, dlinesize => %d, dreplace => %s, dlock => %d,\n\
784 
    dsnoop => %s, drfast => %s, dwfast => %s, dlram => %s, \n\
785 
    dlramsize => %d, dlramaddr => 16#%02X#);\n\
786 
", CONFIG_CFG_NAME,
787 
   CFG_ICACHE_ASSO, CFG_ICACHE_SZ, CFG_ICACHE_LSZ/4, CFG_ICACHE_ALGO, CFG_ICACHE_LOCK,
788 
   CFG_DCACHE_ASSO, CFG_DCACHE_SZ, CFG_DCACHE_LSZ/4, CFG_DCACHE_ALGO, CFG_DCACHE_LOCK,
789 
   CFG_DCACHE_SNOOP, CFG_DCACHE_RFAST, CFG_DCACHE_WFAST, CFG_DCACHE_LRAM,
790 
   CFG_DCACHE_LRSZ, CFG_DCACHE_LRSTART);
791 
 
792 
  fprintf (fp, "\n\
793 
  constant mmu_%s : mmu_config_type := (\n\
794 
    enable => %d, itlbnum => %d, dtlbnum => %d, tlb_type => %s, \n\
795 
    tlb_rep => %s, tlb_diag => %s );\n\
796 
", CONFIG_CFG_NAME, CFG_MMU_ENABLE, CFG_MMU_I, CFG_MMU_D,
797 
   CFG_MMU_TYPE, CFG_MMU_REP, CFG_MMU_DIAG);
798 
 
799 
  fprintf(fp, "\n\
800 
  constant ahbrange_config  : ahbslv_addr_type := \n\
801 
        (0,0,0,0,0,0,%d,0,1,%d,%d,%d,%d,%d,%d,%d);\n\
802 
", ahbram, dsuen, pcien, ethen, pcien, pcien, pcien, pcien);
803 
 
804 
  fprintf(fp, "\n\
805 
  constant ahb_%s : ahb_config_type := ( masters => %d, defmst => %d,\n\
806 
    split => %s, testmod => false);\n\
807 
", CONFIG_CFG_NAME, ahbmst, CONFIG_AHB_DEFMST % ahbmst, CONFIG_AHB_SPLIT);
808 
 
809 
  fprintf(fp, "\n\
810 
  constant mctrl_%s : mctrl_config_type := (\n\
811 
    bus8en => %s, bus16en => %s, wendfb => %s, ramsel5 => %s,\n\
812 
    sdramen => %s, sdinvclk => %s, sdsepbus => %s);\n\
813 
", CONFIG_CFG_NAME, CONFIG_MCTRL_8BIT, CONFIG_MCTRL_16BIT, CONFIG_MCTRL_WFB,
814 
   CONFIG_MCTRL_5CS,
815 
   CONFIG_MCTRL_SDRAM, CONFIG_MCTRL_SDRAM_INVCLK, CONFIG_MCTRL_SDRAM_SEPBUS);
816 
 
817 
  fprintf(fp, "\n\
818 
  constant peri_%s : peri_config_type := (\n\
819 
    cfgreg => %s, ahbstat => %s, wprot => %s, wdog => %s, \n\
820 
    irq2en => %s, ahbram => %s, ahbrambits => %d, ethen => %s );\n\
821 
", CONFIG_CFG_NAME, CONFIG_PERI_LCONF, CONFIG_PERI_AHBSTAT, CONFIG_PERI_WPROT,
822 
   CONFIG_PERI_WDOG, CONFIG_PERI_IRQ2, CONFIG_AHBRAM_ENABLE, 7 + CFG_AHBRAM_SZ,
823 
   CONFIG_ETH_ENABLE);
824 
 
825 
  fprintf(fp, "\n\
826 
  constant debug_%s : debug_config_type := ( enable => true, uart => %s, \n\
827 
    iureg => %s, fpureg => %s, nohalt => %s, pclow => %d,\n\
828 
    dsuenable => %s, dsutrace => %s, dsumixed => %s,\n\
829 
    dsudpram => %s, tracelines => %d);\n\
830 
", CONFIG_CFG_NAME, CONFIG_DEBUG_UART, CONFIG_DEBUG_IURF, CONFIG_DEBUG_FPURF,
831 
   CONFIG_DEBUG_NOHALT, CFG_DEBUG_PCLOW, CONFIG_DSU_ENABLE, CONFIG_DSU_TRACEBUF,
832 
   CONFIG_DSU_MIXED_TRACE, CONFIG_SYN_TRACE_DPRAM, CFG_DSU_TRACE_SZ);
833 
 
834 
  fprintf(fp, "\n\
835 
  constant boot_%s : boot_config_type := (boot => %s, ramrws => %d,\n\
836 
    ramwws => %d, sysclk => %d, baud => %d, extbaud => %s,\n\
837 
    pabits => %d);\n\
838 
", CONFIG_CFG_NAME, CFG_BOOT_SOURCE, CONFIG_BOOT_RWS, CONFIG_BOOT_WWS,
839 
   CONFIG_BOOT_SYSCLK, CONFIG_BOOT_BAUDRATE, CONFIG_BOOT_EXTBAUD,
840 
   CONFIG_BOOT_PROMABITS);
841 
 
842 
  fprintf(fp, "\n\
843 
  constant pci_%s : pci_config_type := (\n\
844 
    pcicore => %s , ahbmasters => %d, fifodepth => %d,\n\
845 
    arbiter => %s, fixpri => false, prilevels => 4, pcimasters => 4,\n\
846 
    vendorid => 16#%04X#, deviceid => 16#%04X#, subsysid => 16#%04X#,\n\
847 
    revisionid => 16#%02X#, classcode =>16#%06X#, pmepads => %s,\n\
848 
    p66pad => %s, pcirstall => %s, trace => %s, tracedepth => %d);\n\
849 
", CONFIG_CFG_NAME, CFG_PCI_CORE, pciahbmst, CFG_PCI_FIFO, CONFIG_PCI_ARBEN,
850 
   CONFIG_PCI_VENDORID, CONFIG_PCI_DEVICEID, CONFIG_PCI_SUBSYSID,
851 
   CONFIG_PCI_REVID, CONFIG_PCI_CLASSCODE, CONFIG_PCI_PMEPADS,
852 
   CONFIG_PCI_P66PAD, CONFIG_PCI_RESETALL, CONFIG_PCI_TRACE, CFG_PCI_TDEPTH);
853 
 
854 
  fprintf(fp, "\n\
855 
  constant irq2cfg : irq2type := irq2none;\n\
856 
");
857 
 
858 
  if (CONFIG_FT_ENABLE)
859 
  fprintf(fp, "\n\
860 
  constant ft_%s : ft_config_type := ( rfpbits => %d, tmrreg => %s,\n\
861 
    tmrclk => %s, mscheck => %s, memedac => %s, \n\
862 
    rfwropt => %s, cparbits => %d, caddrpar => %s, regferr => %s,\n\
863 
    cacheerr => %s);\n\
864 
", CONFIG_CFG_NAME, CONFIG_FT_RF_PARBITS, CONFIG_FT_TMR_REG, CONFIG_FT_TMR_CLK,
865 
   CONFIG_FT_MC, CONFIG_FT_MEMEDAC, CONFIG_FT_RF_WRFAST,
866 
   CONFIG_FT_CACHEMEM_PARBITS, CONFIG_FT_CACHEMEM_APAR, CONFIG_DEBUG_RFERR,
867 
   CONFIG_DEBUG_CACHEMEMERR);
868 
 
869 
  fprintf(fp, "\n\
870 
\n\
871 
-----------------------------------------------------------------------------\n\
872 
-- end of automatic configuration\n\
873 
-----------------------------------------------------------------------------\n\
874 
\n\
875 
end;\n\
876 
");
877 
  close(fp);
878 
  fp = fopen("device.v", "w+");
879 
  if (!fp) {
880 
        printf("could not open file device.v\n");
881 
        exit(1);
882 
  }
883 
  fprintf(fp, "\n\
884 
`define HEADER_VENDOR_ID    16'h%04X\n\
885 
`define HEADER_DEVICE_ID    16'h%04X\n\
886 
`define HEADER_REVISION_ID  8'h%02X\n\
887 
", CONFIG_PCI_VENDORID, CONFIG_PCI_DEVICEID, CONFIG_PCI_REVID);
888 
 
889 
  if ((CONFIG_SYN_INFER_RAM == false) && (!((strcmp(CFG_SYN_TARGET_TECH, "virtex")) &&
890 
      (strcmp(CFG_SYN_TARGET_TECH, "virtex2"))))) {
891 
    fprintf(fp, "\n\
892 
`define FPGA\n\
893 
`define XILINX\n\
894 
`define WBW_ADDR_LENGTH 7\n\
895 
`define WBR_ADDR_LENGTH 7\n\
896 
`define PCIW_ADDR_LENGTH 7\n\
897 
`define PCIR_ADDR_LENGTH 7\n\
898 
`define PCI_FIFO_RAM_ADDR_LENGTH 8 \n\
899 
`define WB_FIFO_RAM_ADDR_LENGTH 8    \n\
900 
");
901 
  } else
902 
    fprintf(fp, "\n\
903 
`define WB_RAM_DONT_SHARE\n\
904 
`define PCI_RAM_DONT_SHARE\n\
905 
`define WBW_ADDR_LENGTH %d\n\
906 
`define WBR_ADDR_LENGTH %d\n\
907 
`define PCIW_ADDR_LENGTH %d\n\
908 
`define PCIR_ADDR_LENGTH %d\n\
909 
`define PCI_FIFO_RAM_ADDR_LENGTH %d \n\
910 
`define WB_FIFO_RAM_ADDR_LENGTH %d    \n\
911 
", CFG_PCI_FIFO, CFG_PCI_FIFO, CFG_PCI_FIFO, CFG_PCI_FIFO,
912 
   CFG_PCI_FIFO, CFG_PCI_FIFO);
913 
 
914 
  fprintf(fp, "\n\
915 
`define ETH_WISHBONE_B3\n\
916 
\n\
917 
`define ETH_TX_FIFO_CNT_WIDTH  %d\n\
918 
`define ETH_TX_FIFO_DEPTH      %d\n\
919 
\n\
920 
`define ETH_RX_FIFO_CNT_WIDTH  %d\n\
921 
`define ETH_RX_FIFO_DEPTH      %d\n\
922 
\n\
923 
`define ETH_BURST_CNT_WIDTH    %d\n\
924 
`define ETH_BURST_LENGTH       %d\n",
925 
  log2(CONFIG_ETH_TXFIFO)+1, CONFIG_ETH_TXFIFO,
926 
  log2(CONFIG_ETH_RXFIFO)+1, CONFIG_ETH_RXFIFO,
927 
  log2(CONFIG_ETH_BURST)+1, CONFIG_ETH_BURST);
928 
 
929 
  close(fp);
930 
  return(0);
931 
}

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