OpenCores
URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [altera-ep2s60-ddr/] [leon3mp.qsf] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 dimamali 
# Copyright (C) 1991-2006 Altera Corporation
2 
# Your use of Altera Corporation's design tools, logic functions
3 
# and other software and tools, and its AMPP partner logic
4 
# functions, and any output files any of the foregoing
5 
# (including device programming or simulation files), and any
6 
# associated documentation or information are expressly subject
7 
# to the terms and conditions of the Altera Program License
8 
# Subscription Agreement, Altera MegaCore Function License
9 
# Agreement, or other applicable license agreement, including,
10 
# without limitation, that your use is for the sole purpose of
11 
# programming logic devices manufactured by Altera and sold by
12 
# Altera or its authorized distributors.  Please refer to the
13 
# applicable agreement for further details.
14 
 
15 
 
16 
# The default values for assignments are stored in the file
17 
#               full_featured_assignment_defaults.qdf
18 
# If this file doesn't exist, and for assignments not listed, see file
19 
#               assignment_defaults.qdf
20 
 
21 
# Altera recommends that you do not modify this file. This
22 
# file is updated automatically by the Quartus II software
23 
# and any changes you make may be lost or overwritten.
24 
 
25 
 
26 
set_global_assignment -name FAMILY "Stratix II"
27 
set_global_assignment -name DEVICE EP2S60F672C3
28 
#set_global_assignment -name TOP_LEVEL_ENTITY full_featured
29 
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
30 
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:54:53  MAY 22, 2006"
31 
set_global_assignment -name LAST_QUARTUS_VERSION "6.0 SP1"
32 
#set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
33 
#set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
34 
#set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
35 
#set_global_assignment -name BDF_FILE full_featured.bdf
36 
#set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_sh:auto_verify_ddr_timing.tcl"
37 
set_location_assignment PIN_U25 -to address[2]
38 
set_location_assignment PIN_T25 -to address[3]
39 
set_location_assignment PIN_T24 -to address[4]
40 
set_location_assignment PIN_V20 -to address[5]
41 
set_location_assignment PIN_V19 -to address[6]
42 
set_location_assignment PIN_U20 -to address[7]
43 
set_location_assignment PIN_U19 -to address[8]
44 
set_location_assignment PIN_T22 -to address[9]
45 
set_location_assignment PIN_T21 -to address[10]
46 
set_location_assignment PIN_T20 -to address[11]
47 
set_location_assignment PIN_T19 -to address[12]
48 
set_location_assignment PIN_U22 -to address[13]
49 
set_location_assignment PIN_U21 -to address[14]
50 
set_location_assignment PIN_V22 -to address[15]
51 
set_location_assignment PIN_Y24 -to eth_nbe[0] #byteenablen_to_the_lan91c111[0]
52 
set_location_assignment PIN_Y23 -to eth_nbe[1] #byteenablen_to_the_lan91c111[1]
53 
set_location_assignment PIN_AA24 -to eth_nbe[2] #byteenablen_to_the_lan91c111[2]
54 
set_location_assignment PIN_AA23 -to eth_nbe[3] #byteenablen_to_the_lan91c111[3]
55 
#little endian encoding of data bus
56 
set_location_assignment PIN_D15 -to data[24] #ext_flash_enet_bus_data[0]
57 
set_location_assignment PIN_G15 -to data[25] #ext_flash_enet_bus_data[1]
58 
set_location_assignment PIN_E19 -to data[26] #ext_flash_enet_bus_data[2]
59 
set_location_assignment PIN_D20 -to data[27] #ext_flash_enet_bus_data[3]
60 
set_location_assignment PIN_G19 -to data[28] #ext_flash_enet_bus_data[4]
61 
set_location_assignment PIN_D19 -to data[29] #ext_flash_enet_bus_data[5]
62 
set_location_assignment PIN_E20 -to data[30] #ext_flash_enet_bus_data[6]
63 
set_location_assignment PIN_F20 -to data[31] #ext_flash_enet_bus_data[7]
64 
set_location_assignment PIN_M20 -to data[16] #ext_flash_enet_bus_data[8]
65 
set_location_assignment PIN_M19 -to data[17] #ext_flash_enet_bus_data[9]
66 
set_location_assignment PIN_N20 -to data[18] #ext_flash_enet_bus_data[10]
67 
set_location_assignment PIN_N19 -to data[19] #ext_flash_enet_bus_data[11]
68 
set_location_assignment PIN_N22 -to data[20] #ext_flash_enet_bus_data[12]
69 
set_location_assignment PIN_N21 -to data[21] #ext_flash_enet_bus_data[13]
70 
set_location_assignment PIN_M22 -to data[22] #ext_flash_enet_bus_data[14]
71 
set_location_assignment PIN_M21 -to data[23] #ext_flash_enet_bus_data[15]
72 
set_location_assignment PIN_M24 -to data[8] #ext_flash_enet_bus_data[16]
73 
set_location_assignment PIN_M23 -to data[9] #ext_flash_enet_bus_data[17]
74 
set_location_assignment PIN_L19 -to data[10] #ext_flash_enet_bus_data[18]
75 
set_location_assignment PIN_L18 -to data[11] #ext_flash_enet_bus_data[19]
76 
set_location_assignment PIN_L21 -to data[12] #ext_flash_enet_bus_data[20]
77 
set_location_assignment PIN_L20 -to data[13] #ext_flash_enet_bus_data[21]
78 
set_location_assignment PIN_L23 -to data[14] #ext_flash_enet_bus_data[22]
79 
set_location_assignment PIN_L22 -to data[15] #ext_flash_enet_bus_data[23]
80 
set_location_assignment PIN_K20 -to data[0] #ext_flash_enet_bus_data[24]
81 
set_location_assignment PIN_K19 -to data[1] #ext_flash_enet_bus_data[25]
82 
set_location_assignment PIN_K22 -to data[2] #ext_flash_enet_bus_data[26]
83 
set_location_assignment PIN_K21 -to data[3] #ext_flash_enet_bus_data[27]
84 
set_location_assignment PIN_J20 -to data[4] #ext_flash_enet_bus_data[28]
85 
set_location_assignment PIN_J19 -to data[5] #ext_flash_enet_bus_data[29]
86 
set_location_assignment PIN_J22 -to data[6] #ext_flash_enet_bus_data[30]
87 
set_location_assignment PIN_J21 -to data[7] #ext_flash_enet_bus_data[31]
88 
set_location_assignment PIN_W23 -to gpio[4] #irq_from_the_lan91c111
89 
set_location_assignment PIN_AD26 -to rxd1 #rxd_to_the_uart1
90 
set_location_assignment PIN_AB23 -to txd1 #txd_from_the_uart1
91 
set_location_assignment PIN_W15 -to errorn   #out_port_from_the_led_pio[0]
92 
set_location_assignment PIN_V14 -to gpio[1] #out_port_from_the_led_pio[1]
93 
set_location_assignment PIN_AD17 -to gpio[2] #out_port_from_the_led_pio[2]
94 
set_location_assignment PIN_AA17 -to gpio[3] #out_port_from_the_led_pio[3]
95 
set_location_assignment PIN_V16 -to dsuact   #out_port_from_the_led_pio[4]
96 
set_location_assignment PIN_AB17 -to gpio[5] #out_port_from_the_led_pio[5]
97 
set_location_assignment PIN_AD18 -to gpio[6] #out_port_from_the_led_pio[6]
98 
set_location_assignment PIN_V17 -to gpio[7] #out_port_from_the_led_pio[7]
99 
set_location_assignment PIN_P4 -to gpio[8] #in_port_to_the_button_pio[0]
100 
set_location_assignment PIN_P5 -to gpio[9] #in_port_to_the_button_pio[1]
101 
set_location_assignment PIN_N6 -to gpio[10] #in_port_to_the_button_pio[2]
102 
set_location_assignment PIN_N7 -to dsubren  #in_port_to_the_button_pio[3]
103 
set_location_assignment PIN_M2 -to LCD_E_from_the_lcd_display
104 
set_location_assignment PIN_L3 -to LCD_RS_from_the_lcd_display
105 
set_location_assignment PIN_M1 -to LCD_RW_from_the_lcd_display
106 
set_location_assignment PIN_G6 -to LCD_data_to_and_from_the_lcd_display[0]
107 
set_location_assignment PIN_G7 -to LCD_data_to_and_from_the_lcd_display[1]
108 
set_location_assignment PIN_H5 -to LCD_data_to_and_from_the_lcd_display[2]
109 
set_location_assignment PIN_H6 -to LCD_data_to_and_from_the_lcd_display[3]
110 
set_location_assignment PIN_J5 -to LCD_data_to_and_from_the_lcd_display[4]
111 
set_location_assignment PIN_J6 -to LCD_data_to_and_from_the_lcd_display[5]
112 
set_location_assignment PIN_H7 -to LCD_data_to_and_from_the_lcd_display[6]
113 
set_location_assignment PIN_H8 -to LCD_data_to_and_from_the_lcd_display[7]
114 
set_location_assignment PIN_V25 -to address[0]
115 
set_location_assignment PIN_U26 -to address[1]
116 
set_location_assignment PIN_V21 -to address[16]
117 
set_location_assignment PIN_W22 -to address[17]
118 
set_location_assignment PIN_W21 -to address[18]
119 
set_location_assignment PIN_V24 -to address[19]
120 
set_location_assignment PIN_V23 -to address[20]
121 
set_location_assignment PIN_U24 -to address[21]
122 
set_location_assignment PIN_U23 -to address[22]
123 
set_location_assignment PIN_R24 -to address[23]
124 
set_location_assignment PIN_H20 -to oen #read_n_to_the_ext_flash
125 
set_location_assignment PIN_H19 -to romsn #select_n_to_the_ext_flash
126 
set_location_assignment PIN_V26 -to writen #write_n_to_the_ext_flash
127 
set_location_assignment PIN_K18 -to byten  #byte_n_to_the_ext_flash
128 
set_location_assignment PIN_H22 -to wpn    #wp_n_to_the_ext_flash
129 
set_location_assignment PIN_G16 -to ssaddr[2] #address_to_the_ext_ssram[2]
130 
set_location_assignment PIN_G17 -to ssaddr[3] #address_to_the_ext_ssram[3]
131 
set_location_assignment PIN_E26 -to ssaddr[4] #address_to_the_ext_ssram[4]
132 
set_location_assignment PIN_E25 -to ssaddr[5] #address_to_the_ext_ssram[5]
133 
set_location_assignment PIN_E24 -to ssaddr[6] #address_to_the_ext_ssram[6]
134 
set_location_assignment PIN_E23 -to ssaddr[7] #address_to_the_ext_ssram[7]
135 
set_location_assignment PIN_F26 -to ssaddr[8] #address_to_the_ext_ssram[8]
136 
set_location_assignment PIN_F25 -to ssaddr[9] #address_to_the_ext_ssram[9]
137 
set_location_assignment PIN_C17 -to ssaddr[10] #address_to_the_ext_ssram[10]
138 
set_location_assignment PIN_C18 -to ssaddr[11] #address_to_the_ext_ssram[11]
139 
set_location_assignment PIN_C19 -to ssaddr[12] #address_to_the_ext_ssram[12]
140 
set_location_assignment PIN_C20 -to ssaddr[13] #address_to_the_ext_ssram[13]
141 
set_location_assignment PIN_G26 -to ssaddr[14] #address_to_the_ext_ssram[14]
142 
set_location_assignment PIN_G25 -to ssaddr[15] #address_to_the_ext_ssram[15]
143 
set_location_assignment PIN_G24 -to ssaddr[16] #address_to_the_ext_ssram[16]
144 
set_location_assignment PIN_G23 -to ssaddr[17] #address_to_the_ext_ssram[17]
145 
set_location_assignment PIN_G21 -to ssaddr[18] #address_to_the_ext_ssram[18]
146 
set_location_assignment PIN_G20 -to ssaddr[19] #address_to_the_ext_ssram[19]
147 
set_location_assignment PIN_H26 -to ssaddr[20] #address_to_the_ext_ssram[20]
148 
set_location_assignment PIN_B16 -to ssram_adscn #adsc_n_to_the_ext_ssram
149 
set_location_assignment PIN_H23 -to ssram_bw[0] #bw_n_to_the_ext_ssram[0]
150 
set_location_assignment PIN_J23 -to ssram_bw[1] #bw_n_to_the_ext_ssram[1]
151 
set_location_assignment PIN_K24 -to ssram_bw[2] #bw_n_to_the_ext_ssram[2]
152 
set_location_assignment PIN_F16 -to ssram_bw[3] #bw_n_to_the_ext_ssram[3]
153 
set_location_assignment PIN_F17 -to ssram_wen #bwe_n_to_the_ext_ssram
154 
set_location_assignment PIN_C16 -to ssram_ce1n #chipenable1_n_to_the_ext_ssram
155 
set_location_assignment PIN_L25 -to ssram_ce2 #chipenable2_to_the_ext_ssram
156 
set_location_assignment PIN_L24 -to ssram_ce3n #chipenable3_n_to_the_ext_ssram
157 
set_location_assignment PIN_A17 -to ssdata[0] #data_to_and_from_the_ext_ssram[0]
158 
set_location_assignment PIN_A18 -to ssdata[1] #data_to_and_from_the_ext_ssram[1]
159 
set_location_assignment PIN_A19 -to ssdata[2] #data_to_and_from_the_ext_ssram[2]
160 
set_location_assignment PIN_A20 -to ssdata[3] #data_to_and_from_the_ext_ssram[3]
161 
set_location_assignment PIN_B17 -to ssdata[4] #data_to_and_from_the_ext_ssram[4]
162 
set_location_assignment PIN_B18 -to ssdata[5] #data_to_and_from_the_ext_ssram[5]
163 
set_location_assignment PIN_B19 -to ssdata[6] #data_to_and_from_the_ext_ssram[6]
164 
set_location_assignment PIN_B20 -to ssdata[7] #data_to_and_from_the_ext_ssram[7]
165 
set_location_assignment PIN_B24 -to ssdata[8] #data_to_and_from_the_ext_ssram[8]
166 
set_location_assignment PIN_C22 -to ssdata[9] #data_to_and_from_the_ext_ssram[9]
167 
set_location_assignment PIN_B22 -to ssdata[10] #data_to_and_from_the_ext_ssram[10]
168 
set_location_assignment PIN_C21 -to ssdata[11] #data_to_and_from_the_ext_ssram[11]
169 
set_location_assignment PIN_E18 -to ssdata[12] #data_to_and_from_the_ext_ssram[12]
170 
set_location_assignment PIN_D18 -to ssdata[13] #data_to_and_from_the_ext_ssram[13]
171 
set_location_assignment PIN_E17 -to ssdata[14] #data_to_and_from_the_ext_ssram[14]
172 
set_location_assignment PIN_D17 -to ssdata[15] #data_to_and_from_the_ext_ssram[15]
173 
set_location_assignment PIN_F23 -to ssdata[16] #data_to_and_from_the_ext_ssram[16]
174 
set_location_assignment PIN_F22 -to ssdata[17] #data_to_and_from_the_ext_ssram[17]
175 
set_location_assignment PIN_F21 -to ssdata[18] #data_to_and_from_the_ext_ssram[18]
176 
set_location_assignment PIN_B23 -to ssdata[19] #data_to_and_from_the_ext_ssram[19]
177 
set_location_assignment PIN_D25 -to ssdata[20] #data_to_and_from_the_ext_ssram[20]
178 
set_location_assignment PIN_F24 -to ssdata[21] #data_to_and_from_the_ext_ssram[21]
179 
set_location_assignment PIN_H21 -to ssdata[22] #data_to_and_from_the_ext_ssram[22]
180 
set_location_assignment PIN_F19 -to ssdata[23] #data_to_and_from_the_ext_ssram[23]
181 
set_location_assignment PIN_B21 -to ssdata[24] #data_to_and_from_the_ext_ssram[24]
182 
set_location_assignment PIN_A21 -to ssdata[25] #data_to_and_from_the_ext_ssram[25]
183 
set_location_assignment PIN_A22 -to ssdata[26] #data_to_and_from_the_ext_ssram[26]
184 
set_location_assignment PIN_A24 -to ssdata[27] #data_to_and_from_the_ext_ssram[27]
185 
set_location_assignment PIN_C26 -to ssdata[28] #data_to_and_from_the_ext_ssram[28]
186 
set_location_assignment PIN_C25 -to ssdata[29] #data_to_and_from_the_ext_ssram[29]
187 
set_location_assignment PIN_D24 -to ssdata[30] #data_to_and_from_the_ext_ssram[30]
188 
set_location_assignment PIN_C23 -to ssdata[31] #data_to_and_from_the_ext_ssram[31]
189 
set_location_assignment PIN_J26 -to ssram_oen #outputenable_n_to_the_ext_ssram
190 
set_location_assignment PIN_N4 -to gpio[16] #out_port_from_the_seven_seg_pio[0]
191 
set_location_assignment PIN_M6 -to gpio[17] #out_port_from_the_seven_seg_pio[1]
192 
set_location_assignment PIN_M5 -to gpio[18] #out_port_from_the_seven_seg_pio[2]
193 
set_location_assignment PIN_M8 -to gpio[19] #out_port_from_the_seven_seg_pio[3]
194 
set_location_assignment PIN_M7 -to gpio[20] #out_port_from_the_seven_seg_pio[4]
195 
set_location_assignment PIN_L9 -to gpio[21] #out_port_from_the_seven_seg_pio[5]
196 
set_location_assignment PIN_L8 -to gpio[22] #out_port_from_the_seven_seg_pio[6]
197 
set_location_assignment PIN_N5 -to gpio[23] #out_port_from_the_seven_seg_pio[7]
198 
set_location_assignment PIN_L6 -to gpio[24] #out_port_from_the_seven_seg_pio[8]
199 
set_location_assignment PIN_M4 -to gpio[25] #out_port_from_the_seven_seg_pio[9]
200 
set_location_assignment PIN_M3 -to gpio[26] #out_port_from_the_seven_seg_pio[10]
201 
set_location_assignment PIN_L5 -to gpio[27] #out_port_from_the_seven_seg_pio[11]
202 
set_location_assignment PIN_L4 -to gpio[28] #out_port_from_the_seven_seg_pio[12]
203 
set_location_assignment PIN_K9 -to gpio[29] #out_port_from_the_seven_seg_pio[13]
204 
set_location_assignment PIN_K8 -to gpio[30] #out_port_from_the_seven_seg_pio[14]
205 
set_location_assignment PIN_L7 -to gpio[31] #out_port_from_the_seven_seg_pio[15]
206 
set_location_assignment PIN_B13 -to ddr_clkin #osc_clk0
207 
set_location_assignment PIN_P25  -to clk #osc_clk1
208 
set_location_assignment PIN_AA15 -to resetn #pld_clear_n
209 
set_location_assignment PIN_C3 -to ddr_clk #clk_to_sdram[0]
210 
set_location_assignment PIN_C4 -to ddr_clkn #clk_to_sdram_n[0]
211 
set_location_assignment PIN_B10 -to ddr_ad[0]
212 
set_location_assignment PIN_B9 -to ddr_ad[1]
213 
set_location_assignment PIN_B8 -to ddr_ad[2]
214 
set_location_assignment PIN_B6 -to ddr_ad[3]
215 
set_location_assignment PIN_C5 -to ddr_ad[4]
216 
set_location_assignment PIN_E11 -to ddr_ad[5]
217 
set_location_assignment PIN_E10 -to ddr_ad[6]
218 
set_location_assignment PIN_E9 -to ddr_ad[7]
219 
set_location_assignment PIN_E8 -to ddr_ad[8]
220 
set_location_assignment PIN_E7 -to ddr_ad[9]
221 
set_location_assignment PIN_F11 -to ddr_ad[10]
222 
set_location_assignment PIN_F10 -to ddr_ad[11]
223 
set_location_assignment PIN_F8 -to ddr_ad[12]
224 
set_location_assignment PIN_G10 -to ddr_ba[0]
225 
set_location_assignment PIN_G11 -to ddr_ba[1]
226 
set_location_assignment PIN_B3 -to ddr_casb
227 
set_location_assignment PIN_F13 -to ddr_cke
228 
set_location_assignment PIN_E12 -to ddr_csb
229 
set_location_assignment PIN_A3 -to ddr_rasb
230 
set_location_assignment PIN_B4 -to ddr_web
231 
set_location_assignment PIN_A12 -to ssram_clk
232 
set_location_assignment PIN_AA22 -to eth_nads #enet_ads_n
233 
set_location_assignment PIN_AB25 -to eth_aen
234 
set_location_assignment PIN_Y26 -to eth_readn #ior_n_to_the_lan91c111
235 
set_location_assignment PIN_Y25 -to eth_writen #iow_n_to_the_lan91c111
236 
 
237 
set_location_assignment PIN_AA21 -to eth_lclk #ENET_LCLK
238 
#set_location_assignment PIN_Y7 -to eth_ldevn #ENET_LDEV_N
239 
set_location_assignment PIN_W26 -to eth_nrdyrtn #ENET_RDYRTN_N
240 
#set_location_assignment PIN_W20 -to eth_srdyn #ENET_SRDY_N
241 
set_location_assignment PIN_W19 -to eth_nvlbus #ENET_VLBUS_N
242 
set_location_assignment PIN_AA25 -to eth_wnr #ENET_W_R_N
243 
set_location_assignment PIN_Y24 -to eth_nbe[0] #byteenablen_to_the_lan91c111[0]
244 
set_location_assignment PIN_Y23 -to eth_nbe[1] #byteenablen_to_the_lan91c111[1]
245 
set_location_assignment PIN_AA24 -to eth_nbe[2] #byteenablen_to_the_lan91c111[2]
246 
set_location_assignment PIN_AA23 -to eth_nbe[3] #byteenablen_to_the_lan91c111[3]
247 
set_location_assignment PIN_AA26 -to eth_ncycle #ENET_CYCLE_N
248 
set_location_assignment PIN_W24 -to eth_ndatacs #ENET_DATACS_N
249 
 
250 
set_location_assignment PIN_AB11 -to cf_detect
251 
set_location_assignment PIN_K3  -to ata_intrq
252 
set_location_assignment PIN_G2 -to ata_iordy
253 
set_location_assignment PIN_J2 -to ata_da[0] #cf_addr[0]
254 
set_location_assignment PIN_J1 -to ata_da[1] #cf_addr[1]
255 
set_location_assignment PIN_K1 -to ata_da[2] #cf_addr[2]
256 
set_location_assignment PIN_J6 -to cf_gnd_da[3] #cf_addr[3]
257 
set_location_assignment PIN_J5 -to cf_gnd_da[4] #cf_addr[4]
258 
set_location_assignment PIN_H6 -to cf_gnd_da[5] #cf_addr[5]
259 
set_location_assignment PIN_H5 -to cf_gnd_da[6] #cf_addr[6]
260 
set_location_assignment PIN_G7 -to cf_gnd_da[7] #cf_addr[7]
261 
set_location_assignment PIN_G6 -to cf_gnd_da[8] #cf_addr[8]
262 
set_location_assignment PIN_M2  -to cf_gnd_da[9] #cf_addr[9]
263 
set_location_assignment PIN_L3  -to cf_gnd_da[10] #cf_addr[10]
264 
set_location_assignment PIN_AE8 -to cf_atasel
265 
set_location_assignment PIN_K2  -to ata_cs0 #cf_cs_n[0]
266 
set_location_assignment PIN_AE7 -to ata_cs1 #cf_cs_n[1]
267 
set_location_assignment PIN_H3 -to ata_data[0]
268 
set_location_assignment PIN_G3 -to ata_data[1]
269 
set_location_assignment PIN_F3 -to ata_data[2]
270 
set_location_assignment PIN_F1 -to ata_data[3]
271 
set_location_assignment PIN_E3 -to ata_data[4]
272 
set_location_assignment PIN_E1 -to ata_data[5]
273 
set_location_assignment PIN_D2 -to ata_data[6]
274 
set_location_assignment PIN_C1 -to ata_data[7]
275 
set_location_assignment PIN_C2 -to ata_data[8]
276 
set_location_assignment PIN_D3 -to ata_data[9]
277 
set_location_assignment PIN_E2 -to ata_data[10]
278 
set_location_assignment PIN_E4 -to ata_data[11]
279 
set_location_assignment PIN_F2 -to ata_data[12]
280 
set_location_assignment PIN_F4 -to ata_data[13]
281 
set_location_assignment PIN_G4 -to ata_data[14]
282 
set_location_assignment PIN_H4 -to ata_data[15]
283 
set_location_assignment PIN_G1 -to ata_dior #cf_iord_n
284 
set_location_assignment PIN_J4 -to ata_diow #cf_iowr_n
285 
set_location_assignment PIN_AB12 -to cf_power
286 
set_location_assignment PIN_J7 -to ata_dmack
287 
set_location_assignment PIN_H7 -to cf_we
288 
 
289 
set_location_assignment PIN_J25 -to ssram_adsp_n
290 
set_location_assignment PIN_J24 -to ssram_adv_n
291 
set_location_assignment PIN_H16 -to bidir_port_to_and_from_the_reconfig_request_pio
292 
 
293 
set_location_assignment PIN_J7 -to PROTO1_IO[40]
294 
 
295 
set_location_assignment PIN_T4 -to gpio[0]
296 
set_location_assignment PIN_T5 -to gpio[11]
297 
set_location_assignment PIN_U3 -to gpio[12]
298 
set_location_assignment PIN_U4 -to gpio[13]
299 
set_location_assignment PIN_T8 -to gpio[14]
300 
set_location_assignment PIN_T9 -to gpio[15]
301 
 
302 
set_global_assignment -name STRATIXII_CONFIGURATION_SCHEME "ACTIVE SERIAL"
303 
set_global_assignment -name GENERATE_TTF_FILE ON
304 
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
305 
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
306 
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
307 
set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE EPCS64
308 
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
309 
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
310 
 
311 
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr_dm
312 
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr_dqs
313 
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr_dq
314 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_rasb
315 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_casb
316 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_web
317 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_cke
318 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[0]
319 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[1]
320 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[2]
321 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[3]
322 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[4]
323 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[5]
324 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[6]
325 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[7]
326 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[8]
327 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[9]
328 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[10]
329 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[11]
330 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ad[12]
331 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ba[0]
332 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_ba[1]
333 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_csb
334 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dm[0]
335 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dm[1]
336 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[0]
337 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[1]
338 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[2]
339 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[3]
340 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[4]
341 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[5]
342 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[6]
343 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[7]
344 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[8]
345 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[9]
346 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[10]
347 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[11]
348 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[12]
349 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[13]
350 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[14]
351 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dq[15]
352 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dqs[0]
353 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_dqs[1]
354 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_clk #clk_to_sdram[0]
355 
set_instance_assignment -name IO_STANDARD "SSTL-2 CLASS II" -to ddr_clkn #clk_to_sdram_n[0]
356 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_rasb
357 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_casb
358 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_web
359 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_cke
360 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[0]
361 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[1]
362 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[2]
363 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[3]
364 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[4]
365 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[5]
366 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[6]
367 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[7]
368 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[8]
369 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[9]
370 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[10]
371 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[11]
372 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ad[12]
373 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ba[0]
374 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_ba[1]
375 
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr_csb
376 
set_instance_assignment -name IO_STANDARD "2.5-V" -to clock_source
377 
set_instance_assignment -name CUT ON -from ddr_dqs[0] -to *
378 
set_instance_assignment -name CUT ON -from ddr_dqs[1] -to *
379 
#set_location_assignment IOBANK_4 -to ddr_clk
380 
#set_location_assignment IOBANK_4 -to ddr_clkn
381 
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER ddr_clk -section_id ddr_sdram_clk_out_pair
382 
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER ddr_clkn -section_id ddr_sdram_clk_out_pair
383 
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddrspa:\ddrsp0:ddrc0|ddr_phy:ddr_phy0|altera_ddr_phy:\alt:ddr_phy0|altpll:dll|_clk0" -to ddr_sdram_clk_out_pair
384 
#set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr_sdram_clk_out_pair
385 
#set_instance_assignment -name TPD_REQUIREMENT "1.6 ns" -from *captured_* -to *resynched_data*
386 
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "full_2s60:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
387 
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "full_2s60:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
388 
set_location_assignment PIN_D9 -to ddr_dq[0]
389 
set_location_assignment PIN_D8 -to ddr_dq[1]
390 
set_location_assignment PIN_C8 -to ddr_dq[2]
391 
set_location_assignment PIN_A9 -to ddr_dq[3]
392 
set_location_assignment PIN_B11 -to ddr_dq[4]
393 
set_location_assignment PIN_C11 -to ddr_dq[5]
394 
set_location_assignment PIN_A10 -to ddr_dq[6]
395 
set_location_assignment PIN_D10 -to ddr_dq[7]
396 
set_location_assignment PIN_C9 -to ddr_dqs[0]
397 
set_location_assignment PIN_C10 -to ddr_dm[0]
398 
set_location_assignment PIN_A5 -to ddr_dq[8]
399 
set_location_assignment PIN_B5 -to ddr_dq[9]
400 
set_location_assignment PIN_D6 -to ddr_dq[10]
401 
set_location_assignment PIN_A6 -to ddr_dq[11]
402 
set_location_assignment PIN_A8 -to ddr_dq[12]
403 
set_location_assignment PIN_A7 -to ddr_dq[13]
404 
set_location_assignment PIN_C7 -to ddr_dq[14]
405 
set_location_assignment PIN_D7 -to ddr_dq[15]
406 
set_location_assignment PIN_C6 -to ddr_dqs[1]
407 
set_location_assignment PIN_B7 -to ddr_dm[1]
408 
 
409 
set_global_assignment -name FMAX_REQUIREMENT "50.0 MHz"
410 
 
411 
#set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
412 
#set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
413 
#set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
414 
#set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
415 
#set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
416 
#set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
417 
 
418 
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
419 
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
420 
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
421 
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_GATE_RETIME ON
422 
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE SPEED
423 
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF
424 
set_global_assignment -name STATE_MACHINE_PROCESSING "ONE-HOT"
425 
 
426 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dm[0]
427 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dm[1]
428 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[0]
429 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[1]
430 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[2]
431 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[3]
432 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[4]
433 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[5]
434 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[6]
435 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[7]
436 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[8]
437 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[9]
438 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[10]
439 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[11]
440 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[12]
441 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[13]
442 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[14]
443 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[15]
444 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dqs[0]
445 
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dqs[1]
446 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_rasb
447 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_casb
448 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_web
449 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_cke
450 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[0]
451 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[1]
452 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[2]
453 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[3]
454 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[4]
455 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[5]
456 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[6]
457 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[7]
458 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[8]
459 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[9]
460 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[10]
461 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[11]
462 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ad[12]
463 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ba[0]
464 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ba[1]
465 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_csb
466 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_clk #clk_to_sdram[0]
467 
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_clkn #clk_to_sdram_n[0]

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.