URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [gr-pci-xc5v/] [Makefile.inc] - Blame information for rev 2

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TECHNOLOGY=virtex5
#ifeq ("$(CONFIG_FPGA_LX50)","y")
#PART=xc5vlx50
#else
#ifeq ("$(CONFIG_FPGA_LX85)","y")
#PART=xc5vlx85
#else
#PART=xc5vlx110
#endif
#endif
PART=xc5vlx50
PACKAGE=ff1153
SPEED=-1
SYNFREQ=50
PROMGENPAR=-x xcf32p xcf32p -u 0 $(TOP).bit -p mcs -w -o gr-pci-xc5v
 

Line No.	Rev	Author	Line
1	2	dimamali	`TECHNOLOGY=virtex5`
2			`#ifeq ("$(CONFIG_FPGA_LX50)","y")`
3			`#PART=xc5vlx50`
4			`#else`
5			`#ifeq ("$(CONFIG_FPGA_LX85)","y")`
6			`#PART=xc5vlx85`
7			`#else`
8			`#PART=xc5vlx110`
9			`#endif`
10			`#endif`
11			`PART=xc5vlx50`
12			`PACKAGE=ff1153`
13			`SPEED=-1`
14			`SYNFREQ=50`
15			`PROMGENPAR=-x xcf32p xcf32p -u 0 $(TOP).bit -p mcs -w -o gr-pci-xc5v`
16

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Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [gr-pci-xc5v/] [Makefile.inc] - Blame information for rev 2