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dimamali |
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This leon3 design is tailored to the Avnet Virtex4 LX25 Evaluation board:
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http://www.em.avnet.com/evk/home/0,1719,RID%253D0%2526CID%253D16863%2526CCD%253DUSA%2526SID%253D4746%2526DID%253DDF2%2526SRT%253D1%2526LID%253D0%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html
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Design specifics:
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* System reset is mapped to SW3
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* LED 0 indicates LEON3 in debug mode.
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* LED 6 and 7 indicates UART RX and TX activity.
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* The serial port is connected to the console UART (UART 1) when
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dip switch 1 on S1 is off. Otherwise it is connected to the
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DSU UART.
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* The GRETH core is enabled and runs without problems at 100 Mbit.
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Ethernet debug link is enabled, default IP is 192.168.0.69.
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* 16-bit flash prom can be read at address 0. It can be programmed
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with GRMON version 1.1.14a or later.
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* DDR is mapped at address 0x40000000 (32 Mbyte). It can run at
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90 - 130 MHz. The processor and AMBA system runs on a different
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clock, and can typically reach 70 - 80 MHz.
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* The board comes in two variations: one with an LX25 FPGA and one
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with an LX60 device. It is possible to choose the correct FPGA
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in the xconfig setup under the 'Board options' menu.
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* Output from GRMON info sys is:
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$ grmon -eth -u -ip 192.168.0.69 -nb
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GRMON LEON debug monitor v1.1.27b
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Copyright (C) 2004,2005 Gaisler Research - all rights reserved.
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For latest updates, go to http://www.gaisler.com/
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Comments or bug-reports to support@gaisler.com
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ethernet startup.
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GRLIB build version: 2878
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initialising ............
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detected frequency: 70 MHz
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Component Vendor
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LEON3 SPARC V8 Processor Gaisler Research
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AHB Debug UART Gaisler Research
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AHB Debug JTAG TAP Gaisler Research
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GR Ethernet MAC Gaisler Research
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AHB/APB Bridge Gaisler Research
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LEON3 Debug Support Unit Gaisler Research
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DDR266 Controller Gaisler Research
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LEON2 Memory Controller European Space Agency
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Generic APB UART Gaisler Research
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Multi-processor Interrupt Ctrl Gaisler Research
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Modular Timer Unit Gaisler Research
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General purpose I/O port Gaisler Research
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Use command 'info sys' to print a detailed report of attached cores
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grlib> inf sys
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00.01:003 Gaisler Research LEON3 SPARC V8 Processor (ver 0x0)
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ahb master 0
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01.01:007 Gaisler Research AHB Debug UART (ver 0x0)
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ahb master 1
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apb: 80000700 - 80000800
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baud rate 115200, ahb frequency 70.00
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02.01:01c Gaisler Research AHB Debug JTAG TAP (ver 0x0)
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ahb master 2
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03.01:01d Gaisler Research GR Ethernet MAC (ver 0x0)
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ahb master 3, irq 12
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apb: 80000f00 - 80001000
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edcl ip 192.168.0.69, buffer 2 kbyte
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01.01:006 Gaisler Research AHB/APB Bridge (ver 0x0)
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ahb: 80000000 - 80100000
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02.01:004 Gaisler Research LEON3 Debug Support Unit (ver 0x1)
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ahb: 90000000 - a0000000
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AHB trace 128 lines, stack pointer 0x41fffff0
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CPU#0 win 8, hwbp 2, itrace 128, V8 mul/div, srmmu, lddel 1, GRFPU-lite
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icache 2 * 16 kbyte, 32 byte/line lrr
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dcache 2 * 16 kbyte, 32 byte/line lrr
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04.01:025 Gaisler Research DDR266 Controller (ver 0x0)
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ahb: 40000000 - 50000000
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ahb: fff00100 - fff00200
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16-bit DDR : 1 * 32 Mbyte @ 0x40000000
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100 MHz, col 9, ref 7.8 us
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05.04:00f European Space Agency LEON2 Memory Controller (ver 0x1)
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ahb: 00000000 - 20000000
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ahb: 20000000 - 40000000
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ahb: 60000000 - 70000000
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apb: 80000000 - 80000100
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16-bit prom @ 0x00000000
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01.01:00c Gaisler Research Generic APB UART (ver 0x1)
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irq 2
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apb: 80000100 - 80000200
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baud rate 38400, DSU mode (FIFO debug)
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02.01:00d Gaisler Research Multi-processor Interrupt Ctrl (ver 0x3)
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apb: 80000200 - 80000300
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03.01:011 Gaisler Research Modular Timer Unit (ver 0x0)
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irq 8
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apb: 80000300 - 80000400
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8-bit scaler, 2 * 32-bit timers, divisor 70
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0b.01:01a Gaisler Research General purpose I/O port (ver 0x0)
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apb: 80000b00 - 80000c00
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grlib> fla
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Intel-style 16-bit flash on D[31:16]
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Manuf. Intel
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Device MT28F640J3
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Device ID 1598ffff00024098
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User ID ffffffffffffffff
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1 x 8 Mbyte = 8 Mbyte total @ 0x00000000
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CFI info
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flash family : 1
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flash size : 64 Mbit
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erase regions : 1
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erase blocks : 64
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write buffer : 32 bytes
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region 0 : 64 blocks of 128 Kbytes
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grlib>
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