1 |
2 |
dimamali |
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2 |
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# ==== Clock inputs (CLK) ====
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3 |
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NET "clk_50mhz" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
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4 |
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#NET "clk_67mhz" LOC = "B8" | IOSTANDARD = LVCMOS33 ;
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5 |
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NET "clk_50mhz" PERIOD = 20ns HIGH 40%;
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6 |
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7 |
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NET erx_clk PERIOD = 40.000 ;
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8 |
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OFFSET = IN : 10.000 : BEFORE erx_clk ;
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9 |
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NET etx_clk PERIOD = 40.000 ;
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10 |
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OFFSET = OUT : 20.000 : AFTER etx_clk ;
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11 |
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OFFSET = IN : 8.000 : BEFORE etx_clk ;
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12 |
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13 |
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NET "clkm" TNM_NET = "clkm";
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14 |
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NET "clkml" TNM_NET = "clkml";
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15 |
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TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
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16 |
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TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
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17 |
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NET "lock" TIG;
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18 |
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19 |
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#NET "ddr_clk_fb" TNM_NET = "ddr_clk_fb";
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20 |
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#TIMESPEC "TS_ddr_clk_fb" = PERIOD "ddr_clk_fb" 10.00 ns HIGH 50 %;
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21 |
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22 |
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23 |
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INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/nops.read_dll" LOC = DCM_X1Y3;
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24 |
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INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/ps.read_dll" LOC = DCM_X1Y3;
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25 |
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INST "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll" LOC = DCM_X0Y2;
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26 |
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27 |
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# Enable this for ISE-10
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28 |
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#PIN "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/dll.CLK270" CLOCK_DEDICATED_ROUTE = FALSE;
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29 |
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#NET etx_clk CLOCK_DEDICATED_ROUTE = FALSE;
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30 |
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#NET erx_clk CLOCK_DEDICATED_ROUTE = FALSE;
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31 |
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32 |
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NET "ddrsp0.ddrc/ddr_phy0/ddr_phy0/xc3se.ddr_phy0/rclk90b" TNM_NET = "rclk90b";
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33 |
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TIMEGRP "rclk270b_rise" = FALLING "rclk90b";
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34 |
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TIMEGRP "clkml_rise" = RISING "clkml";
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35 |
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TIMESPEC "TS_rclk270b_clkml_rise" = FROM "rclk270b_rise" TO "clkml_rise" 4.500;
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36 |
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37 |
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# ==== Pushbuttons (BTN) ====
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38 |
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#NET "BTN_EAST" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
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39 |
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NET "dsubre" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
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40 |
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#NET "BTN_NORTH" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
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41 |
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#NET "BTN_SOUTH" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
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42 |
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NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
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43 |
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#NET "BTN_WEST" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;
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44 |
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#NET "btn0" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
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45 |
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#NET "btn1" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
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46 |
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#NET "btn2" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
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47 |
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48 |
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49 |
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# ==== Discrete LEDs (LED) ====
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50 |
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# These are shared connections with the FX2 connector
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51 |
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NET "led(0)" LOC = "R14" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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52 |
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NET "led(1)" LOC = "C3" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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53 |
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NET "led(2)" LOC = "E6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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54 |
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NET "led(3)" LOC = "D6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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55 |
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NET "led(4)" LOC = "D13" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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56 |
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NET "led(5)" LOC = "A7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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57 |
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#NET "led(6)" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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58 |
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#NET "dsuact" LOC = "G9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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59 |
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#NET "led(7)" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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60 |
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NET "errorn" LOC = "A8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
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61 |
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62 |
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# ==== Rotary Encoder ====
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63 |
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#NET "rotary(0)" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP ;
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64 |
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#NET "rotary(1)" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP ;
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65 |
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#NET "rotary(2)" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;
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66 |
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67 |
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# ==== Slide Switches (SW) ====
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68 |
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#NET "sw(0)" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ;
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69 |
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#NET "sw(1)" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ;
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70 |
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#NET "sw(2)" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ;
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71 |
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#NET "sw(3)" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;
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72 |
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73 |
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# ==== RS-232 Serial Ports (RS232) ====
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74 |
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NET "urxd1" LOC = "U8" | IOSTANDARD = LVTTL ;
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75 |
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NET "dsurx" LOC = "R7" | IOSTANDARD = LVTTL ;
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76 |
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NET "utxd1" LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
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77 |
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NET "dsutx" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
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78 |
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79 |
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80 |
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# ==== DDR SDRAM (SD) ==== (I/O Bank 3, VCCO=2.5V)
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81 |
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NET "ddr_ad(0)" LOC = "T1" | IOSTANDARD = SSTL2_I ;
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82 |
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NET "ddr_ad(1)" LOC = "R3" | IOSTANDARD = SSTL2_I ;
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83 |
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NET "ddr_ad(2)" LOC = "R2" | IOSTANDARD = SSTL2_I ;
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84 |
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NET "ddr_ad(3)" LOC = "P1" | IOSTANDARD = SSTL2_I ;
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85 |
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NET "ddr_ad(4)" LOC = "E4" | IOSTANDARD = SSTL2_I ;
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86 |
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NET "ddr_ad(5)" LOC = "H4" | IOSTANDARD = SSTL2_I ;
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87 |
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NET "ddr_ad(6)" LOC = "H3" | IOSTANDARD = SSTL2_I ;
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88 |
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NET "ddr_ad(7)" LOC = "H1" | IOSTANDARD = SSTL2_I ;
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89 |
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NET "ddr_ad(8)" LOC = "H2" | IOSTANDARD = SSTL2_I ;
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90 |
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NET "ddr_ad(9)" LOC = "N4" | IOSTANDARD = SSTL2_I ;
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91 |
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NET "ddr_ad(10)" LOC = "T2" | IOSTANDARD = SSTL2_I ;
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92 |
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NET "ddr_ad(11)" LOC = "N5" | IOSTANDARD = SSTL2_I ;
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93 |
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NET "ddr_ad(12)" LOC = "P2" | IOSTANDARD = SSTL2_I ;
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94 |
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NET "ddr_ba(0)" LOC = "K5" | IOSTANDARD = SSTL2_I ;
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95 |
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NET "ddr_ba(1)" LOC = "K6" | IOSTANDARD = SSTL2_I ;
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96 |
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NET "ddr_casb" LOC = "C2" | IOSTANDARD = SSTL2_I ;
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97 |
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NET "ddr_clk0b" LOC = "J4" | IOSTANDARD = SSTL2_I ;
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98 |
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NET "ddr_clk0" LOC = "J5" | IOSTANDARD = SSTL2_I ;
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99 |
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NET "ddr_cke0" LOC = "K3" | IOSTANDARD = SSTL2_I ;
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100 |
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NET "ddr_cs0b" LOC = "K4" | IOSTANDARD = SSTL2_I ;
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101 |
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NET "ddr_dq(0)" LOC = "L2" | IOSTANDARD = SSTL2_I ;
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102 |
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NET "ddr_dq(1)" LOC = "L1" | IOSTANDARD = SSTL2_I ;
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103 |
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NET "ddr_dq(2)" LOC = "L3" | IOSTANDARD = SSTL2_I ;
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104 |
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NET "ddr_dq(3)" LOC = "L4" | IOSTANDARD = SSTL2_I ;
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105 |
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NET "ddr_dq(4)" LOC = "M3" | IOSTANDARD = SSTL2_I ;
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106 |
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NET "ddr_dq(5)" LOC = "M4" | IOSTANDARD = SSTL2_I ;
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107 |
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NET "ddr_dq(6)" LOC = "M5" | IOSTANDARD = SSTL2_I ;
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108 |
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NET "ddr_dq(7)" LOC = "M6" | IOSTANDARD = SSTL2_I ;
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109 |
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NET "ddr_dq(8)" LOC = "E2" | IOSTANDARD = SSTL2_I ;
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110 |
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NET "ddr_dq(9)" LOC = "E1" | IOSTANDARD = SSTL2_I ;
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111 |
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NET "ddr_dq(10)" LOC = "F1" | IOSTANDARD = SSTL2_I ;
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112 |
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NET "ddr_dq(11)" LOC = "F2" | IOSTANDARD = SSTL2_I ;
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113 |
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NET "ddr_dq(12)" LOC = "G6" | IOSTANDARD = SSTL2_I ;
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114 |
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NET "ddr_dq(13)" LOC = "G5" | IOSTANDARD = SSTL2_I ;
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115 |
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NET "ddr_dq(14)" LOC = "H6" | IOSTANDARD = SSTL2_I ;
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116 |
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NET "ddr_dq(15)" LOC = "H5" | IOSTANDARD = SSTL2_I ;
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117 |
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NET "ddr_dm(0)" LOC = "J2" | IOSTANDARD = SSTL2_I ;
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118 |
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NET "ddr_dqs(0)" LOC = "L6" | IOSTANDARD = SSTL2_I ;
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119 |
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NET "ddr_rasb" LOC = "C1" | IOSTANDARD = SSTL2_I ;
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120 |
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NET "ddr_dm(1)" LOC = "J1" | IOSTANDARD = SSTL2_I ;
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121 |
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NET "ddr_dqs(1)" LOC = "G3" | IOSTANDARD = SSTL2_I ;
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122 |
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NET "ddr_web" LOC = "D1" | IOSTANDARD = SSTL2_I ;
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123 |
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124 |
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Net ddr_clk_fb LOC=B9 | IOSTANDARD = LVCMOS33;
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125 |
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126 |
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Net etx_clk LOC=T7;
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127 |
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Net etx_clk IOSTANDARD = LVCMOS33;
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128 |
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Net erx_clk LOC=V3 ;
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129 |
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Net erx_clk IOSTANDARD = LVCMOS33;
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130 |
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Net erx_crs LOC=U13;
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131 |
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Net erx_crs IOSTANDARD = LVCMOS33;
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132 |
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Net erx_dv LOC=V2;
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133 |
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Net erx_dv IOSTANDARD = LVCMOS33;
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134 |
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Net erxd(0) LOC=V8;
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135 |
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Net erxd(0) IOSTANDARD = LVCMOS33;
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136 |
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Net erxd(1) LOC=T11;
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137 |
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Net erxd(1) IOSTANDARD = LVCMOS33;
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138 |
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Net erxd(2) LOC=U11;
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139 |
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Net erxd(2) IOSTANDARD = LVCMOS33;
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140 |
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Net erxd(3) LOC=V14;
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141 |
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Net erxd(3) IOSTANDARD = LVCMOS33;
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142 |
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Net erx_col LOC=U6;
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143 |
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Net erx_col IOSTANDARD = LVCMOS33;
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144 |
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Net erx_er LOC=U14;
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145 |
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Net erx_er IOSTANDARD = LVCMOS33;
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146 |
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Net etx_en LOC=P16;
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147 |
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Net etx_en IOSTANDARD = LVCMOS33;
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148 |
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Net etxd(0) LOC=R11;
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149 |
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Net etxd(0) IOSTANDARD = LVCMOS33;
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150 |
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Net etxd(1) LOC=T15;
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151 |
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Net etxd(1) IOSTANDARD = LVCMOS33;
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152 |
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Net etxd(2) LOC=R5;
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153 |
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Net etxd(2) IOSTANDARD = LVCMOS33;
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154 |
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Net etxd(3) LOC=T5;
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155 |
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Net etxd(3) IOSTANDARD = LVCMOS33;
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156 |
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Net etx_er LOC=R6 | IOSTANDARD = LVCMOS33;
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157 |
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Net emdc LOC=P9;
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158 |
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Net emdc IOSTANDARD = LVCMOS33;
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159 |
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Net emdio LOC=U5;
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160 |
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Net emdio IOSTANDARD = LVCMOS33;
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161 |
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162 |
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Net address(23) LOC=N11 | IOSTANDARD = LVCMOS33;
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163 |
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Net address(22) LOC=V12 | IOSTANDARD = LVCMOS33;
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164 |
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Net address(21) LOC=V13 | IOSTANDARD = LVCMOS33;
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165 |
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Net address(20) LOC=T12 | IOSTANDARD = LVCMOS33;
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166 |
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Net address(19) LOC=V15 | IOSTANDARD = LVCMOS33;
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167 |
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Net address(18) LOC=U15 | IOSTANDARD = LVCMOS33;
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168 |
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Net address(17) LOC=T16 | IOSTANDARD = LVCMOS33;
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169 |
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Net address(16) LOC=U18 | IOSTANDARD = LVCMOS33;
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170 |
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Net address(15) LOC=T17 | IOSTANDARD = LVCMOS33;
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171 |
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Net address(14) LOC=R18 | IOSTANDARD = LVCMOS33;
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172 |
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Net address(13) LOC=T18 | IOSTANDARD = LVCMOS33;
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173 |
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Net address(12) LOC=L16 | IOSTANDARD = LVCMOS33;
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174 |
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Net address(11) LOC=L15 | IOSTANDARD = LVCMOS33;
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175 |
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Net address(10) LOC=K13 | IOSTANDARD = LVCMOS33;
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176 |
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Net address(9) LOC=K12 | IOSTANDARD = LVCMOS33;
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177 |
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Net address(8) LOC=K15 | IOSTANDARD = LVCMOS33;
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178 |
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Net address(7) LOC=K14 | IOSTANDARD = LVCMOS33;
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179 |
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Net address(6) LOC=J17 | IOSTANDARD = LVCMOS33;
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180 |
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Net address(5) LOC=J16 | IOSTANDARD = LVCMOS33;
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181 |
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Net address(4) LOC=J15 | IOSTANDARD = LVCMOS33;
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182 |
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Net address(3) LOC=J14 | IOSTANDARD = LVCMOS33;
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183 |
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Net address(2) LOC=J12 | IOSTANDARD = LVCMOS33;
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184 |
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Net address(1) LOC=J13 | IOSTANDARD = LVCMOS33;
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185 |
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Net address(0) LOC=H17 | IOSTANDARD = LVCMOS33;
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186 |
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187 |
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Net data(15) LOC=T8 | IOSTANDARD = LVCMOS33;
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188 |
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Net data(14) LOC=R8 | IOSTANDARD = LVCMOS33;
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189 |
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Net data(13) LOC=P6 | IOSTANDARD = LVCMOS33;
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190 |
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Net data(12) LOC=M16 | IOSTANDARD = LVCMOS33;
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191 |
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Net data(11) LOC=M15 | IOSTANDARD = LVCMOS33;
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192 |
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Net data(10) LOC=P17 | IOSTANDARD = LVCMOS33;
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193 |
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Net data(9) LOC=R16 | IOSTANDARD = LVCMOS33;
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194 |
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Net data(8) LOC=R15 | IOSTANDARD = LVCMOS33;
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195 |
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Net data(7) LOC=N9 | IOSTANDARD = LVCMOS33;
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196 |
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Net data(6) LOC=M9 | IOSTANDARD = LVCMOS33;
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197 |
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Net data(5) LOC=R9 | IOSTANDARD = LVCMOS33;
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198 |
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Net data(4) LOC=U9 | IOSTANDARD = LVCMOS33;
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199 |
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Net data(3) LOC=V9 | IOSTANDARD = LVCMOS33;
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200 |
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Net data(2) LOC=R10 | IOSTANDARD = LVCMOS33;
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201 |
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Net data(1) LOC=P10 | IOSTANDARD = LVCMOS33;
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202 |
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Net data(0) LOC=N10 | IOSTANDARD = LVCMOS33;
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203 |
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Net oen LOC=C18 | IOSTANDARD = LVCMOS33;
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204 |
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Net writen LOC=D17 | IOSTANDARD = LVCMOS33;
|
205 |
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Net romsn LOC=D16 | IOSTANDARD = LVCMOS33;
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206 |
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Net byten LOC=C17 | IOSTANDARD = LVCMOS33;
|
207 |
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Net sts LOC=B18 ;
|
208 |
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|
209 |
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NET ps2data LOC = G13 | IOSTANDARD = LVCMOS33;
|
210 |
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NET ps2clk LOC = G14 | IOSTANDARD = LVCMOS33;
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211 |
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212 |
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NET vid_r LOC = H14 | IOSTANDARD = LVCMOS33;
|
213 |
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NET vid_g LOC = H15 | IOSTANDARD = LVCMOS33;
|
214 |
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NET vid_b LOC = G15 | IOSTANDARD = LVCMOS33;
|
215 |
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NET vid_hsync LOC = F15 | IOSTANDARD = LVCMOS33;
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216 |
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NET vid_vsync LOC = F14 | IOSTANDARD = LVCMOS33;
|
217 |
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218 |
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NET spi LOC=U3 | PULLUP; ## This is to force the SPI ROM to not be selected(drive high)
|
219 |
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Net spi IOSTANDARD = LVCMOS33;
|
220 |
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221 |
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222 |
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# Prohibit VREF pins
|
223 |
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CONFIG PROHIBIT = D2;
|
224 |
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CONFIG PROHIBIT = G4;
|
225 |
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CONFIG PROHIBIT = J6;
|
226 |
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CONFIG PROHIBIT = L5;
|
227 |
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CONFIG PROHIBIT = R4;
|
228 |
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229 |
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