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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html><head>
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  <meta http-equiv="CONTENT-TYPE" content="text/html; charset=iso-8859-1"><title>LEON3MP Reference Design for GR-CPCI-XC2V6000</title>
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<body dir="ltr" lang="en-US">
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<table border="0" cellpadding="2" cellspacing="2" width="750">
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  <tbody>
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    <tr>
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      <td valign="top">
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      <h3><span style="font-family: helvetica,arial,sans-serif;">LEON3AX - a
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reference LEON3 design for the GR-CPCI-AX board<br>
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</span></h3>
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      <h4 style="font-family: helvetica,arial,sans-serif;">Introduction</h4>
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      <small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3AX provides a reference
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design for LEON3-based systems. This version is tailored for the <a href="http://www.pender.ch/products.shtml">GR-CPCI-AX board</a> from Pender Electronic Design:<br>
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<br>
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</span></small>
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      <table border="1" cellpadding="2" cellspacing="2" width="700">
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  <tbody>
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    <tr>
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      <td valign="top">
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            <h4><small><span style="font-family: helvetica,arial,sans-serif;">Board features:</span></small></h4>
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            <small><span style="font-family: helvetica,arial,sans-serif;"></span></small><ul><li><small><span style="font-family: helvetica,arial,sans-serif;">Actel AX2000/RTAX2000 device<br>
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                </span></small></li>
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<li><small><span style="font-family: helvetica,arial,sans-serif;">CPCI form-factor<br>
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    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">8 Mbyte Intel FLASH<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">4 Mbyte 32-bit static RAM with 8-bit ECC<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Up to 512 Mbyte SDRAM in one SODIMM</span></small><br>
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</li><li><small><span style="font-family: helvetica,arial,sans-serif;">10/100 Mbit/s Ethernet MAC (LAN91C111)<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">2x RS232 UART interfaces (1 Mbit/s)<br>
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    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Dedicated DSU UART interface</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">33 MHz, 32-bit PCI interface<br>
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                </span></small></li>
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<li><small><span style="font-family: helvetica,arial,sans-serif;">Stand-alone or CPCI operation<br>
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</span></small></li></ul>
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      </td>
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      <td valign="top"><a href="../../boards/gr-cpci-ax/ax_oblique640.jpg"><small><span style="font-family: helvetica,arial,sans-serif;"><img alt="" src="../../boards/gr-cpci-ax/ax_oblique640.jpg" align="right" border="0" height="240" width="320"></span></small></a></td>
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    </tr>
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  </tbody>
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      </table>
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      <small><span style="font-family: helvetica,arial,sans-serif;"><br>
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<br>
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</span></small>
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      <small><span style="font-family: helvetica,arial,sans-serif;">
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<br>
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The&nbsp; LEON3AX design is provided together with GRLIB, and is
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located in grlib/designs/leon3-gr-cpci-xc2v6000. It consist of the following IP cores from GRLIB:<br>
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</span></small>
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      <ul>
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<li><small><span style="font-family: helvetica,arial,sans-serif;">1 - 4 LEON3 processor
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cores with MP support</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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debug support unit (DSU) for LEON3<br>
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    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit PROM/SRAM
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controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">8-/16-/32-/64-bit
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PROM/SRAM/SDRAM controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit
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PCI target interface</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Round-robin
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AHB arbiter and controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">AHB/APB bridge with
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plug&amp;play support<br>
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    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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interrupt controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit modular timer
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unit</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">1 -
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2 UARTs with FIFO<br>
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    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug link</span></small></li>
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      </ul>
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      <small><span style="font-family: helvetica,arial,sans-serif;"></span></small>
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      <h4><small><span style="font-family: helvetica,arial,sans-serif;">LEON3AX
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Block diagram</span></small></h4>
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      <h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
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      <small><span style="font-family: helvetica,arial,sans-serif;"><img alt="" src="../../doc/grip/leon3mp.gif" height="393" width="615"><br>
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</span></small>
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      <h4><span style="font-family: helvetica,arial,sans-serif;">Reference
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architecture</span></h4>
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      <small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3AX is made up by cores from the GRLIB IP library, which are
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connected together via the AMBA AHB and APB buses. The plug&amp;play
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configuration method of GRLIB makes it possible to assign any
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combination of addresses and interrupts to the cores. However, to be
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software compatible with simple operating systems such as the LEON
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Bare-C cross-compiler, some of the vital cores must be assigned to
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predefined addresses and interrupts. The table below shows the
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reference assigment in the LEON3AX design:<br>
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<br>
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</span></small>
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      <table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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  <tbody>
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    <tr>
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      <th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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      <th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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      </span></small></th>
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      <th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory controller<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x00000000 -
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0x20000000 : PROM<br>
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0x20000000 - 0x40000000 : external I/O bus<br>
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0x40000000 - 0x80000000 : SRAM/SDRAM<br>
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0x80000000 - 0x80000100 : Memory controller registers (APB)<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">APB bridge<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000000 -
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0x80100000 : APB bus<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">UART</span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000100 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 : UART
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registers</span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">2</span></small><br>
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      </td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt controller</span></small><br>
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      </td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300 : IRQ
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registers<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Timer unit<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0x80000400 : timer
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registers<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">8, 9<br>
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      </span></small></td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">LEON3 debug support
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unit (DSU)<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x90000000 -
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0xA0000000 : DSU registers<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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  </tbody>
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      </table>
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      <small><span style="font-family: helvetica,arial,sans-serif;"><br>
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Additional (optional) IP cores are assigned addresses and interrupts as
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desribed in the table below. These assignments are LEON3MP specific and
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can be changed without impact on software compatibility.<br>
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<br>
167
</span></small>
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      <table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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  <tbody>
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    <tr>
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      <th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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      <th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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      </span></small></th>
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      <th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">PCI initiator/target interface<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: courier new,courier,monospace;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xE0000000 -
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0xF0000000 : PCI initiator access <br>
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0xFFF80000 - 0xFFFA0000 : PCI special cycles<br>
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0x80000400 - 0x80000500 : PCI registers<br>
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0x80000600 - 0x80000700 : PCI DMA registers<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">PCI arbiter</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000A00 -
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0x80000B00 : PCI arbiter registers</span></small></td>
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      <td valign="top"><br>
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      </td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">PCI trace buffer<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80010000 -
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0x80020000 : PCI trace buffer registers<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link<br>
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      </span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000700 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000800 : AHB UART
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registers</span></small></td>
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      <td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small> </td>
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    </tr>
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    <tr>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug
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communication link</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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    </tr>
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    <tr>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">CAN interface</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xFFFC0000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xFFFC1000 : CAN
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control registers</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">13</span></small></td>
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    </tr>
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    <tr>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">On-chip RAM<br>
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      </span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xA0000000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xA0100000 : On-chip
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RAM<br>
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      </span></small></td>
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      <td valign="top"><br>
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      </td>
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    </tr>
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    <tr>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">UART</span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000900 -
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0x80000A00 : Secondary UART<br>
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      </span></small></td>
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      <td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">3</span></small></td>
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    </tr>
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  </tbody>
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      </table>
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      <br>
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      <h4><small><span style="font-family: helvetica,arial,sans-serif;">
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</span></small></h4>
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      <h4><span style="font-family: helvetica,arial,sans-serif;">Configuration</span></h4>
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      <div style="text-align: left;"><small><span style="font-family: helvetica,arial,sans-serif;">The configuartion of
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the LEON3MP design is defined through the config package located <a href="config.vhd">config.vhd</a>.
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This file can be automatically generated using a GUI based on tkconfig.
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To launch the GUI, do 'make xconfig'. After the configuration is
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completed, save and
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exit the tool and config.vhd will be created automatically.
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<br>
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<br>
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<br>
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<img alt="" src="../share/gui.gif" height="148" width="561"><br>
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<br>
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<i>Figure 1. LEON3MP configuration GUI</i><br style="font-family: helvetica,arial,sans-serif;">
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</span></small><small>
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</small></div>
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      <h4><span style="font-family: helvetica,arial,sans-serif;">Simulation</span></h4>
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      <small><span style="font-family: helvetica,arial,sans-serif;">To
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simulate the testbench, first compile the model for simulation. This
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can be done automatically for three different simulators. Execute one
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of the following commands:</span><br style="font-family: helvetica,arial,sans-serif;">
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      </small>
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      <ul style="font-family: helvetica,arial,sans-serif;">
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<li><small>make vsim</small></li><li><small>make ncsim</small></li><li><small>make ghdl</small></li>
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      </ul>
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      <small><span style="font-family: helvetica,arial,sans-serif;">For vsim,
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start the simulation with 'vsim testbench' and do 'run 100'. This
280
should print the current LEON3AX configuration:</span><br style="font-family: helvetica,arial,sans-serif;">
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      </small><br>
282
 
283
      <small><span style="font-family: courier new,courier,monospace;">$ vsim
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-c -quiet testbench</span><br style="font-family: courier new,courier,monospace;">
285
<span style="font-family: courier new,courier,monospace;">Reading
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/usr/local/model58/tcl/vsim/pref.tcl</span><br style="font-family: courier new,courier,monospace;">
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<span style="font-family: courier new,courier,monospace;">Reading
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/home/jiri/modelsim.tcl</span><br style="font-family: courier new,courier,monospace;">
289
      </small><small><span style="font-family: courier new,courier,monospace;"></span></small><br style="font-family: courier new,courier,monospace;">
290
 
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      <small><span style="font-family: courier new,courier,monospace;"># 5.8</span><br style="font-family: courier new,courier,monospace;">
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      </small><small><span style="font-family: courier new,courier,monospace;"></span><big><tt>#
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VSIM 1&gt; run<br># LEON3 Demonstration design<br>
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# GRLIB Version 0.16<br>
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# Target technology: axcel&nbsp;&nbsp; ,&nbsp; memory library: axcel<br>
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# ahbctrl: mst0: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Leon3 SPARC V8 Processor<br>
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# ahbctrl: mst1: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AHB Debug UART<br>
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# ahbctrl: mst2: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Simple 32-bit PCI Target<br>
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# ahbctrl: slv0: European Space Agency&nbsp;&nbsp; Leon2 Memory Controller<br>
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# ahbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; memory at 0x00000000, size 512 Mbyte, cacheable, prefetch<br>
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# ahbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; memory at 0x20000000, size 512 Mbyte<br>
302
# ahbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; memory at 0x40000000, size 1024 Mbyte, cacheable, prefetch<br>
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# ahbctrl: slv1: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AHB/APB Bridge<br>
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# ahbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; memory at 0x80000000, size 1 Mbyte<br>
305
# ahbctrl: slv2: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Leon3 Debug Support Unit<br>
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# ahbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; memory at 0x90000000, size 256 Mbyte<br>
307
# ahbctrl: AHB arbiter/multiplexer rev 1<br>
308
# ahbctrl: Common I/O area at 0xfff00000, 1 Mbyte<br>
309
# ahbctrl: Configuration area at 0xfffff000, 4 kbyte<br>
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# apbctrl: APB Bridge at 0x80000000 rev 1<br>
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# apbctrl: slv0: European Space Agency&nbsp;&nbsp; Leon2 Memory Controller<br>
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# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000000, size 256 byte<br>
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# apbctrl: slv1: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Generic UART<br>
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# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000100, size 256 byte<br>
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# apbctrl: slv2: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Multi-processor Interrupt Ctrl.<br>
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# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000200, size 256 byte<br>
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# apbctrl: slv3: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Modular Timer Unit<br>
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# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000300, size 256 byte<br>
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# apbctrl: slv5: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; General Purpose I/O port<br>
320
# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000500, size 256 byte<br>
321
# apbctrl: slv7: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AHB Debug UART<br>
322
# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000700, size 256 byte<br>
323
# apbctrl: slv9: Gaisler Research&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Generic UART<br>
324
# apbctrl:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O ports at 0x80000900, size 256 byte<br>
325
# pci_target2: 32-bit PCI Target rev 0, 21-bit PCI memory BAR<br>
326
# grgpio5: 16-bit GPIO Unit rev 0<br>
327
# gptimer3: GR Timer Unit rev 0, 8-bit scaler, 2 32-bit timers, irq 8<br>
328
# irqmp: Multi-processor Interrupt Controller rev 3, #cpu 1<br>
329
# apbuart9: Generic UART rev 1, fifo 1, irq 3<br>
330
# apbuart1: Generic UART rev 1, fifo 8, irq 2<br>
331
# ahbuart7: AHB Debug UART rev 0<br>
332
# dsu3_2: LEON3 Debug support unit + AHB Trace Buffer, 1 kbytes<br>
333
# leon3_0: LEON3 SPARC V8 processor rev 0<br>
334
# leon3_0: icache 1*4 kbyte, dcache 1*4 kbyte<br>
335
      <br style="font-family: courier new,courier,monospace;">
336
</tt></big>
337
<span style="font-family: courier new,courier,monospace;">VSIM 2&gt;
338
run -all<br>
339
#<br>
340
# **** GRLIB system test starting ****<br>
341
# Leon3 SPARC V8 Processor<br>
342
#&nbsp;&nbsp; register file<br>
343
#&nbsp;&nbsp; multiplier<br>
344
#&nbsp;&nbsp; radix-2 divider<br>
345
#&nbsp;&nbsp; cache system<br>
346
# Multi-processor Interrupt Ctrl.<br>
347
# Generic UART<br>
348
# Modular Timer Unit<br>
349
# Test passed, halting with IU error mode<br>
350
#<br>
351
# ** Failure: *** IU in error mode, simulation halted ***<br>
352
#&nbsp;&nbsp;&nbsp; Time: 669213500 ps&nbsp; Iteration: 1&nbsp; Process: /testbench/iuerr File: testbench.vhd<br>
353
# Break at testbench.vhd line 263<br>
354
# Stopped at testbench.vhd line 263<br>
355
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
356
</span></small>
357
      <h4><small><span style="font-family: helvetica,arial,sans-serif;">Synthesis<br>
358
</span></small></h4>
359
 
360
      <h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
361
 
362
      <small><span style="font-family: helvetica,arial,sans-serif;">To
363
synthesize and place&amp;route, use the make utility and issue 'make
364
designer' to synthesize with Synplify and place&amp;route with Actel
365
Designer.<br>
366
<br>
367
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">Alternatively, the design can be implemented using
368
the graphical XGrlib tool, which is started with 'make xgrlib'.</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
369
<br>
370
<img alt="" src="../../doc/grlib/xgrlib.gif" height="537" width="619"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">&nbsp;</span></small><br>
371
 
372
      <div style="text-align: justify;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></div>
373
 
374
      <small><span style="font-family: helvetica,arial,sans-serif;">
375
<br>
376
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><i>Figure 2. XGrlib
377
implementation tool</i></span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
378
</span></small><h4><small><span style="font-family: helvetica,arial,sans-serif;">Software
379
development</span></small></h4>
380
 
381
      <h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
382
 
383
      <ul>
384
<li><small><span style="font-family: helvetica,arial,sans-serif;"><b><a href="http://www.rtems.org/">RTEMS</a>:</b> to
385
develop RTEMS applications, download and install the <a href="http://www.gaisler.com/products/rcc.html">LEON3 RTEMS
386
Cross-compiler</a> from gaisler.com. The LEON3 bsp automatically
387
detects
388
the location of UARTs, timers, interrupt controller and ethernet core
389
using the plug&amp;play information. Full sources of kernel, libraries and tools available.</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;"><b>Bare-C</b>: a <a href="http://www.gaisler.com/doc/bcc.html">LEON3 bare-C compiler</a>
390
is available for download from gaisler.com. Come with full source code for both the
391
low-level I/O routines as well as the mkprom prom builder.</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;"><a href="http://sourceware.org/ecos/"><b>eCos</b></a>: a Leon3 port supporting FPU, SMP and single-vector trapping is available for ecos-current. Use Bare-C compiler to build.<br>
392
    </span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;"><b>Linux</b>: a Leon3 port of uClinux and linux-2.6.11 is available in the <a href="http://www.gaisler.com/products/linux.html">snapgear
393
linux distribution</a>.</span></small></li>
394
      </ul>
395
 
396
      <small><span style="font-family: helvetica,arial,sans-serif;"></span></small>
397
      <h4><small><span style="font-family: helvetica,arial,sans-serif;">Debugging<br>
398
</span></small></h4>
399
 
400
 
401
      <small><span style="font-family: helvetica,arial,sans-serif;">The
402
on-chip debug support unit (DSU) makes debugging of target hardware
403
relatively easy. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">The
404
design support both serial and JTAG debug interface, and the </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> <a href="http://www.gaisler.com/products/grmon/grmon.html">GRMON debug
405
monitor</a></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> can be attached with a serial cable, or using a Xilinx JTAG programming cable. </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> Note that when you use the JTAG
406
interface, you need specify the frequency of the AHB clock since it is
407
not auto-detected. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">Below
408
is a log from a debug session.<br>
409
<br>
410
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">
411
<br style="font-family: courier new,courier,monospace;">
412
<span style="font-family: courier new,courier,monospace;">$ grmon -u -grlib -jtag -freq 40</span></span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
413
<br style="font-family: courier new,courier,monospace;">
414
<span style="font-family: courier new,courier,monospace;">&nbsp;GRMON -
415
The LEON multi purpose monitor v1.0.6</span><br style="font-family: courier new,courier,monospace;">
416
<br style="font-family: courier new,courier,monospace;">
417
<span style="font-family: courier new,courier,monospace;">&nbsp;Copyright
418
(C) 2004, Gaisler Research - all rights reserved.</span><br style="font-family: courier new,courier,monospace;">
419
<span style="font-family: courier new,courier,monospace;">&nbsp;For
420
latest updates, go to http://www.gaisler.com/</span><br style="font-family: courier new,courier,monospace;">
421
<span style="font-family: courier new,courier,monospace;">&nbsp;Comments
422
or bug-reports to grmon@gaisler.com</span><br style="font-family: courier new,courier,monospace;">
423
<br style="font-family: courier new,courier,monospace;">
424
<br style="font-family: courier new,courier,monospace;">
425
<span style="font-family: courier new,courier,monospace;">&nbsp;GRLIB
426
DSU Monitor backend 1.0.1&nbsp; (professional version)<br>
427
<br style="font-family: courier new,courier,monospace;">
428
</span>
429
<span style="font-family: courier new,courier,monospace;"></span></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><span style="font-family: courier new,courier,monospace;">using JTAG cable on parallel port</span></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
430
<br style="font-family: courier new,courier,monospace;">
431
<span style="font-family: courier new,courier,monospace;">&nbsp;initialising
432
...........</span><br style="font-family: courier new,courier,monospace;">
433
<br style="font-family: courier new,courier,monospace;">
434
<span style="font-family: courier new,courier,monospace;">&nbsp;Component&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
435
Vendor</span><br style="font-family: courier new,courier,monospace;">
436
<span style="font-family: courier new,courier,monospace;">&nbsp;Leon3
437
SPARC V8
438
Processor&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
439
Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
440
<span style="font-family: courier new,courier,monospace;">&nbsp;AHB
441
Debug
442
UART&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
443
Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
444
<span style="font-family: courier new,courier,monospace;">&nbsp;Simple
445
32-bit PCI
446
Target&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
447
Gaisler Research</span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
448
<span style="font-family: courier new,courier,monospace;">&nbsp;LEON2
449
Memory
450
Controller&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
451
European Space Agency</span><br style="font-family: courier new,courier,monospace;">
452
<span style="font-family: courier new,courier,monospace;">&nbsp;AHB/APB
453
Bridge&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
454
Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
455
<span style="font-family: courier new,courier,monospace;">&nbsp;Leon3
456
Debug Support
457
Unit&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
458
Gaisler Research</span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
459
<span style="font-family: courier new,courier,monospace;">&nbsp;Generic
460
APB
461
UART&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
462
Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
463
<span style="font-family: courier new,courier,monospace;">&nbsp;Multi-processor
464
Interrupt Ctrl&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
465
<span style="font-family: courier new,courier,monospace;">&nbsp;Modular
466
Timer
467
Unit&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
468
Gaisler Research</span><br style="font-family: courier new,courier,monospace;">
469
<br style="font-family: courier new,courier,monospace;">
470
<span style="font-family: courier new,courier,monospace;">&nbsp;Use
471
command 'info sys' to print a detailed report of attached cores</span><br style="font-family: courier new,courier,monospace;">
472
<br style="font-family: courier new,courier,monospace;">
473
<span style="font-family: courier new,courier,monospace;">grmon[grlib]&gt;
474
info sys</span><br style="font-family: courier new,courier,monospace;">
475
<span style="font-family: courier new,courier,monospace;">00.01:003&nbsp;&nbsp;
476
Gaisler Research&nbsp; Leon3 SPARC V8 Processor (ver 0)</span><br style="font-family: courier new,courier,monospace;">
477
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
478
ahb master 0</span><br style="font-family: courier new,courier,monospace;">
479
<span style="font-family: courier new,courier,monospace;">01.01:007&nbsp;&nbsp;
480
Gaisler Research&nbsp; AHB Debug UART (ver 0)</span><br style="font-family: courier new,courier,monospace;">
481
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
482
ahb master 1</span><br style="font-family: courier new,courier,monospace;">
483
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
484
apb: 80000700 - 80000800</span><br style="font-family: courier new,courier,monospace;">
485
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
486
baud rate 115200, ahb frequency 25.00</span><br style="font-family: courier new,courier,monospace;">
487
<span style="font-family: courier new,courier,monospace;">02.01:012&nbsp;&nbsp;
488
Gaisler Research&nbsp; Simple 32-bit PCI Target (ver 0)</span><br style="font-family: courier new,courier,monospace;">
489
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
490
ahb master 2</span><br style="font-family: courier new,courier,monospace;">
491
<span style="font-family: courier new,courier,monospace;"></span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
492
<span style="font-family: courier new,courier,monospace;">00.04:00f&nbsp;&nbsp;
493
European Space Agency&nbsp; LEON2 Memory Controller (ver 0)</span><br style="font-family: courier new,courier,monospace;">
494
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
495
ahb: 00000000 - 20000000</span><br style="font-family: courier new,courier,monospace;">
496
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
497
ahb: 20000000 - 40000000</span><br style="font-family: courier new,courier,monospace;">
498
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
499
ahb: 40000000 - 80000000</span><br style="font-family: courier new,courier,monospace;">
500
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
501
apb: 80000000 - 80000100</span><br style="font-family: courier new,courier,monospace;">
502
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
503
32-bit sdram: 1 * 32 Mbyte @ 0x40000000, col 9, cas 2, ref 15.5 us</span><br style="font-family: courier new,courier,monospace;">
504
<span style="font-family: courier new,courier,monospace;">01.01:006&nbsp;&nbsp;
505
Gaisler Research&nbsp; AHB/APB Bridge (ver 0)</span><br style="font-family: courier new,courier,monospace;">
506
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
507
ahb: 80000000 - 80100000</span><br style="font-family: courier new,courier,monospace;">
508
<span style="font-family: courier new,courier,monospace;">02.01:004&nbsp;&nbsp;
509
Gaisler Research&nbsp; Leon3 Debug Support Unit (ver 0)</span><br style="font-family: courier new,courier,monospace;">
510
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
511
ahb: 90000000 - a0000000</span><br style="font-family: courier new,courier,monospace;">
512
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
513
AHB trace 64 lines</span><br style="font-family: courier new,courier,monospace;">
514
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
515
CPU#0 win 8, hw breakpoints 2, itrace 64 lines</span><br style="font-family: courier new,courier,monospace;">
516
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
517
icache 1 * 4 kbyte, 32 byte/line</span><br style="font-family: courier new,courier,monospace;">
518
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
519
dcache 1 * 4 kbyte, 32 byte/line</span><br style="font-family: courier new,courier,monospace;">
520
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
521
stack pointer 0x41fffff0</span><br style="font-family: courier new,courier,monospace;">
522
<span style="font-family: courier new,courier,monospace;"></span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
523
<span style="font-family: courier new,courier,monospace;">01.01:00c&nbsp;&nbsp;
524
Gaisler Research&nbsp; Generic APB UART (ver 1)</span><br style="font-family: courier new,courier,monospace;">
525
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
526
irq 2</span><br style="font-family: courier new,courier,monospace;">
527
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
528
apb: 80000100 - 80000200</span><br style="font-family: courier new,courier,monospace;">
529
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
530
baud rate 38400, DSU mode</span><br style="font-family: courier new,courier,monospace;">
531
<span style="font-family: courier new,courier,monospace;">02.01:00d&nbsp;&nbsp;
532
Gaisler Research&nbsp; Multi-processor Interrupt Ctrl (ver 1)</span><br style="font-family: courier new,courier,monospace;">
533
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
534
apb: 80000200 - 80000300</span><br style="font-family: courier new,courier,monospace;">
535
<span style="font-family: courier new,courier,monospace;">03.01:011&nbsp;&nbsp;
536
Gaisler Research&nbsp; Modular Timer Unit (ver 0)</span><br style="font-family: courier new,courier,monospace;">
537
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
538
irq 8</span><br style="font-family: courier new,courier,monospace;">
539
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
540
apb: 80000300 - 80000400</span><br style="font-family: courier new,courier,monospace;">
541
<span style="font-family: courier new,courier,monospace;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
542
16-bit scaler, 2 * 32-bit timers, divisor 25</span><br style="font-family: courier new,courier,monospace;">
543
<span style="font-family: courier new,courier,monospace;"><br>
544
</span></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><span style="font-family: courier new,courier,monospace;">grmon[grlib]&gt;</span><span style="font-family: courier new,courier,monospace;"> </span><span style="font-family: courier new,courier,monospace;">lo ~/sparc-elf/src/examples/stanford<br>
545
section: .text at 0x40000000, size 61200 bytes<br>
546
section: .data at 0x4000ef10, size 2080 bytes<br>
547
total size: 63280 bytes (343.6 kbit/s)<br>
548
read 197 symbols<br>
549
entry point: 0x40000000<br>
550
grmon[grlib]&gt; run<br>
551
Starting<br>&nbsp;&nbsp;&nbsp;
552
Perm&nbsp; Towers&nbsp; Queens&nbsp;&nbsp;
553
Intmm&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Mm&nbsp; Puzzle&nbsp;&nbsp;
554
Quick&nbsp; Bubble&nbsp;&nbsp;&nbsp; Tree&nbsp;&nbsp;&nbsp;&nbsp; FFT<br>
555
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 34&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
556
66&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 34&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
557
34&nbsp;&nbsp;&nbsp;&nbsp; 900&nbsp;&nbsp;&nbsp;&nbsp;
558
316&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 33&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
559
50&nbsp;&nbsp;&nbsp;&nbsp; 217&nbsp;&nbsp;&nbsp; 1100<br>
560
<br>
561
Nonfloating point composite is&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 117<br>
562
<br>
563
Floating point composite is&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 869<br>
564
<br>
565
Program exited normally.<br>
566
grmon[grlib]&gt;</span></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
567
<br>
568
The LEON3AX test bench includes memory models of both boot-prom, sram
569
and sdram. To build memory images for these models, do 'make soft' .
570
Note: this will require that the bare-C compiler for LEON3 is
571
installed,
572
and /opt/sparc-elf/bin is added to the PATH.<br>
573
<br>
574
</span></small></td>
575
    </tr>
576
    <tr>
577
      <td valign="top"><br>
578
      </td>
579
    </tr>
580
  </tbody>
581
</table>
582
<h3><br>
583
<span style="font-family: helvetica,arial,sans-serif;"></span></h3>
584
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