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URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-jopdesign-ep1c12/] [wave.do] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -format Logic /testbench/clk
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add wave -noupdate -format Logic /testbench/rst
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add wave -noupdate -format Literal -radix hexadecimal /testbench/address
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add wave -noupdate -format Literal -radix hexadecimal /testbench/data
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add wave -noupdate -format Literal /testbench/ramsn
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add wave -noupdate -format Literal /testbench/ramoen
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add wave -noupdate -format Literal /testbench/rwen
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add wave -noupdate -format Literal /testbench/rwenx
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add wave -noupdate -format Literal /testbench/romsn
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add wave -noupdate -format Logic /testbench/iosn
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add wave -noupdate -format Logic /testbench/oen
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add wave -noupdate -format Logic /testbench/read
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add wave -noupdate -format Logic /testbench/writen
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add wave -noupdate -format Literal -radix hexadecimal /testbench/sa
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add wave -noupdate -format Literal -radix hexadecimal /testbench/sd
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add wave -noupdate -format Literal /testbench/sdcke
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add wave -noupdate -format Literal /testbench/sdcsn
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add wave -noupdate -format Logic /testbench/sdwen
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add wave -noupdate -format Logic /testbench/sdrasn
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add wave -noupdate -format Logic /testbench/sdcasn
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add wave -noupdate -format Literal /testbench/sddqm
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add wave -noupdate -format Logic /testbench/sdclk
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/apbi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/apbo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/ahbsi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/ahbso
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/ahbmi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/ahbmo
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add wave -noupdate -divider {CPU 1}
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/ici
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/ico
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/dci
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/dco
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/rfi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/rfo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/irqi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/irqo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/dbgi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/dbgo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/r
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/wpr
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/dsur
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/iu0/ir
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/cmem0/crami
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/cmem0/cramo
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add wave -noupdate -divider {CPU 2}
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__0/u0/p0/m0/c0/dcache0/r
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/ici
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/ico
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/dci
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/dco
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/rfi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/rfo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/irqi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/irqo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/dbgi
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/dbgo
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/r
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/wpr
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/dsur
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/iu0/ir
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/p0/m0/c0/dcache0/r
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/cmem0/crami
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add wave -noupdate -format Literal -radix hexadecimal /testbench/d3/cpu__1/u0/cmem0/cramo
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 1} {39252698 ps} 0}
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configure wave -namecolwidth 189
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configure wave -valuecolwidth 40
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 1
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configure wave -griddelta 40
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configure wave -timeline 0
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update
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WaveRestoreZoom {37002043 ps} {71398707 ps}

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