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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3mp/] [atc18cond.dc] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali 
set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[12] -to do[12]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[13] -to do[13]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[14] -to do[14]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[15] -to do[15]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[16] -to do[16]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[17] -to do[17]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[18] -to do[18]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[19] -to do[19]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[20] -to do[20]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[21] -to do[21]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[22] -to do[22]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[24] -to do[24]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[25] -to do[25]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[27] -to do[27]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[29] -to do[29]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[30] -to do[30]
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set_disable_timing atc18mem/hdss1_1024x32cm4sw0 -from di[31] -to do[31]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[12] -to do[12]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[13] -to do[13]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[14] -to do[14]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[15] -to do[15]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[16] -to do[16]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[17] -to do[17]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[18] -to do[18]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[19] -to do[19]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[20] -to do[20]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[21] -to do[21]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[22] -to do[22]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[24] -to do[24]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[25] -to do[25]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[27] -to do[27]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[29] -to do[29]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[30] -to do[30]
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set_disable_timing atc18mem/hdss1_128x32cm4sw0 -from di[31] -to do[31]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[12] -to do[12]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[13] -to do[13]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[14] -to do[14]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[15] -to do[15]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[16] -to do[16]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[17] -to do[17]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[18] -to do[18]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[19] -to do[19]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[20] -to do[20]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[21] -to do[21]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[22] -to do[22]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[24] -to do[24]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[25] -to do[25]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[27] -to do[27]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[29] -to do[29]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[30] -to do[30]
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set_disable_timing atc18mem/hdss1_256x32cm4sw0 -from di[31] -to do[31]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[12] -to do[12]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[13] -to do[13]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[14] -to do[14]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[15] -to do[15]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[16] -to do[16]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[17] -to do[17]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[18] -to do[18]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[19] -to do[19]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[20] -to do[20]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[21] -to do[21]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[22] -to do[22]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[24] -to do[24]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[25] -to do[25]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[27] -to do[27]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[29] -to do[29]
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set_disable_timing atc18mem/hdss1_512x32cm4sw0 -from di[30] -to do[30]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[12] -to do[12]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[13] -to do[13]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[14] -to do[14]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[15] -to do[15]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[16] -to do[16]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[17] -to do[17]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[18] -to do[18]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[19] -to do[19]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[20] -to do[20]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[21] -to do[21]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[22] -to do[22]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[24] -to do[24]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[25] -to do[25]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[27] -to do[27]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[29] -to do[29]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[30] -to do[30]
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set_disable_timing atc18mem/hdss1_64x32cm4sw0 -from di[31] -to do[31]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[0] -to do[0]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[1] -to do[1]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[2] -to do[2]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[3] -to do[3]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[4] -to do[4]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[5] -to do[5]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[6] -to do[6]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[7] -to do[7]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[8] -to do[8]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[9] -to do[9]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[10] -to do[10]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[11] -to do[11]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[23] -to do[23]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[26] -to do[26]
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set_disable_timing atc18mem/hdss1_2048x32cm8sw0 -from di[28] -to do[28]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[0] -to doa[0]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[1] -to doa[1]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[2] -to doa[2]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[3] -to doa[3]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[4] -to doa[4]
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set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[11] -to doa[11]
211 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[12] -to doa[12]
212 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[13] -to doa[13]
213 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[14] -to doa[14]
214 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[15] -to doa[15]
215 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[16] -to doa[16]
216 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[17] -to doa[17]
217 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[18] -to doa[18]
218 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[19] -to doa[19]
219 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[20] -to doa[20]
220 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[21] -to doa[21]
221 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[22] -to doa[22]
222 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[23] -to doa[23]
223 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[24] -to doa[24]
224 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[25] -to doa[25]
225 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[26] -to doa[26]
226 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[27] -to doa[27]
227 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[28] -to doa[28]
228 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[29] -to doa[29]
229 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[30] -to doa[30]
230 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dia[31] -to doa[31]
231 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[0] -to dob[0]
232 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[1] -to dob[1]
233 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[2] -to dob[2]
234 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[3] -to dob[3]
235 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[4] -to dob[4]
236 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[5] -to dob[5]
237 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[6] -to dob[6]
238 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[7] -to dob[7]
239 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[8] -to dob[8]
240 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[9] -to dob[9]
241 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[10] -to dob[10]
242 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[11] -to dob[11]
243 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[12] -to dob[12]
244 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[13] -to dob[13]
245 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[14] -to dob[14]
246 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[15] -to dob[15]
247 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[16] -to dob[16]
248 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[17] -to dob[17]
249 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[18] -to dob[18]
250 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[19] -to dob[19]
251 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[20] -to dob[20]
252 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[21] -to dob[21]
253 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[22] -to dob[22]
254 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[23] -to dob[23]
255 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[24] -to dob[24]
256 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[25] -to dob[25]
257 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[26] -to dob[26]
258 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[27] -to dob[27]
259 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[28] -to dob[28]
260 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[29] -to dob[29]
261 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[30] -to dob[30]
262 
set_disable_timing atc18mem/hdss2_64x32cm4sw0 -from dib[31] -to dob[31]
263 
 
264 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[0] -to doa[0]
265 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[1] -to doa[1]
266 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[2] -to doa[2]
267 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[3] -to doa[3]
268 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[4] -to doa[4]
269 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[5] -to doa[5]
270 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[6] -to doa[6]
271 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[7] -to doa[7]
272 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[8] -to doa[8]
273 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[9] -to doa[9]
274 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[10] -to doa[10]
275 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[11] -to doa[11]
276 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[12] -to doa[12]
277 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[13] -to doa[13]
278 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[14] -to doa[14]
279 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[15] -to doa[15]
280 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[16] -to doa[16]
281 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[17] -to doa[17]
282 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[18] -to doa[18]
283 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[19] -to doa[19]
284 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[20] -to doa[20]
285 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[21] -to doa[21]
286 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[22] -to doa[22]
287 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[23] -to doa[23]
288 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[24] -to doa[24]
289 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[25] -to doa[25]
290 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[26] -to doa[26]
291 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[27] -to doa[27]
292 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[28] -to doa[28]
293 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[29] -to doa[29]
294 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[30] -to doa[30]
295 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dia[31] -to doa[31]
296 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[0] -to dob[0]
297 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[1] -to dob[1]
298 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[2] -to dob[2]
299 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[3] -to dob[3]
300 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[4] -to dob[4]
301 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[5] -to dob[5]
302 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[6] -to dob[6]
303 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[7] -to dob[7]
304 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[8] -to dob[8]
305 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[9] -to dob[9]
306 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[10] -to dob[10]
307 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[11] -to dob[11]
308 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[12] -to dob[12]
309 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[13] -to dob[13]
310 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[14] -to dob[14]
311 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[15] -to dob[15]
312 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[16] -to dob[16]
313 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[17] -to dob[17]
314 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[18] -to dob[18]
315 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[19] -to dob[19]
316 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[20] -to dob[20]
317 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[21] -to dob[21]
318 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[22] -to dob[22]
319 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[23] -to dob[23]
320 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[24] -to dob[24]
321 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[25] -to dob[25]
322 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[26] -to dob[26]
323 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[27] -to dob[27]
324 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[28] -to dob[28]
325 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[29] -to dob[29]
326 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[30] -to dob[30]
327 
set_disable_timing atc18mem/hdss2_128x32cm4sw0 -from dib[31] -to dob[31]
328 
 
329 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[0] -to doa[0]
330 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[1] -to doa[1]
331 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[2] -to doa[2]
332 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[3] -to doa[3]
333 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[4] -to doa[4]
334 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[5] -to doa[5]
335 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[6] -to doa[6]
336 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[7] -to doa[7]
337 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[8] -to doa[8]
338 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[9] -to doa[9]
339 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[10] -to doa[10]
340 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[11] -to doa[11]
341 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[12] -to doa[12]
342 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[13] -to doa[13]
343 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[14] -to doa[14]
344 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[15] -to doa[15]
345 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[16] -to doa[16]
346 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[17] -to doa[17]
347 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[18] -to doa[18]
348 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[19] -to doa[19]
349 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[20] -to doa[20]
350 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[21] -to doa[21]
351 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[22] -to doa[22]
352 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[23] -to doa[23]
353 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[24] -to doa[24]
354 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[25] -to doa[25]
355 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[26] -to doa[26]
356 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[27] -to doa[27]
357 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[28] -to doa[28]
358 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[29] -to doa[29]
359 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[30] -to doa[30]
360 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dia[31] -to doa[31]
361 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[0] -to dob[0]
362 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[1] -to dob[1]
363 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[2] -to dob[2]
364 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[3] -to dob[3]
365 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[4] -to dob[4]
366 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[5] -to dob[5]
367 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[6] -to dob[6]
368 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[7] -to dob[7]
369 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[8] -to dob[8]
370 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[9] -to dob[9]
371 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[10] -to dob[10]
372 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[11] -to dob[11]
373 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[12] -to dob[12]
374 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[13] -to dob[13]
375 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[14] -to dob[14]
376 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[15] -to dob[15]
377 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[16] -to dob[16]
378 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[17] -to dob[17]
379 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[18] -to dob[18]
380 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[19] -to dob[19]
381 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[20] -to dob[20]
382 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[21] -to dob[21]
383 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[22] -to dob[22]
384 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[23] -to dob[23]
385 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[24] -to dob[24]
386 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[25] -to dob[25]
387 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[26] -to dob[26]
388 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[27] -to dob[27]
389 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[28] -to dob[28]
390 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[29] -to dob[29]
391 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[30] -to dob[30]
392 
set_disable_timing atc18mem/hdss2_256x32cm4sw0 -from dib[31] -to dob[31]
393 
 
394 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[0] -to doa[0]
395 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[1] -to doa[1]
396 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[2] -to doa[2]
397 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[3] -to doa[3]
398 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[4] -to doa[4]
399 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[5] -to doa[5]
400 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[6] -to doa[6]
401 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[7] -to doa[7]
402 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[8] -to doa[8]
403 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[9] -to doa[9]
404 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[10] -to doa[10]
405 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[11] -to doa[11]
406 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[12] -to doa[12]
407 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[13] -to doa[13]
408 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[14] -to doa[14]
409 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[15] -to doa[15]
410 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[16] -to doa[16]
411 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[17] -to doa[17]
412 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[18] -to doa[18]
413 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[19] -to doa[19]
414 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[20] -to doa[20]
415 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[21] -to doa[21]
416 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[22] -to doa[22]
417 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[23] -to doa[23]
418 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[24] -to doa[24]
419 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[25] -to doa[25]
420 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[26] -to doa[26]
421 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[27] -to doa[27]
422 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[28] -to doa[28]
423 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[29] -to doa[29]
424 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[30] -to doa[30]
425 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dia[31] -to doa[31]
426 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[0] -to dob[0]
427 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[1] -to dob[1]
428 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[2] -to dob[2]
429 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[3] -to dob[3]
430 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[4] -to dob[4]
431 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[5] -to dob[5]
432 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[6] -to dob[6]
433 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[7] -to dob[7]
434 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[8] -to dob[8]
435 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[9] -to dob[9]
436 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[10] -to dob[10]
437 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[11] -to dob[11]
438 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[12] -to dob[12]
439 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[13] -to dob[13]
440 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[14] -to dob[14]
441 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[15] -to dob[15]
442 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[16] -to dob[16]
443 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[17] -to dob[17]
444 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[18] -to dob[18]
445 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[19] -to dob[19]
446 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[20] -to dob[20]
447 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[21] -to dob[21]
448 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[22] -to dob[22]
449 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[23] -to dob[23]
450 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[24] -to dob[24]
451 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[25] -to dob[25]
452 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[26] -to dob[26]
453 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[27] -to dob[27]
454 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[28] -to dob[28]
455 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[29] -to dob[29]
456 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[30] -to dob[30]
457 
set_disable_timing atc18mem/hdss2_512x32cm4sw0 -from dib[31] -to dob[31]
458 
 
459 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[0] -to do[0]
460 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[1] -to do[1]
461 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[2] -to do[2]
462 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[3] -to do[3]
463 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[4] -to do[4]
464 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[5] -to do[5]
465 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[6] -to do[6]
466 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[7] -to do[7]
467 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[8] -to do[8]
468 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[9] -to do[9]
469 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[10] -to do[10]
470 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[11] -to do[11]
471 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[12] -to do[12]
472 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[13] -to do[13]
473 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[14] -to do[14]
474 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[15] -to do[15]
475 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[16] -to do[16]
476 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[17] -to do[17]
477 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[18] -to do[18]
478 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[19] -to do[19]
479 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[20] -to do[20]
480 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[21] -to do[21]
481 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[22] -to do[22]
482 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[23] -to do[23]
483 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[24] -to do[24]
484 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[25] -to do[25]
485 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[26] -to do[26]
486 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[27] -to do[27]
487 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[28] -to do[28]
488 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[29] -to do[29]
489 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[30] -to do[30]
490 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[31] -to do[31]
491 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[32] -to do[32]
492 
set_disable_timing atc18mem/hdss1_1024x34cm4sw0 -from di[33] -to do[33]
493 
 
494 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[0] -to do[0]
495 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[1] -to do[1]
496 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[2] -to do[2]
497 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[3] -to do[3]
498 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[4] -to do[4]
499 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[5] -to do[5]
500 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[6] -to do[6]
501 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[7] -to do[7]
502 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[8] -to do[8]
503 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[9] -to do[9]
504 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[10] -to do[10]
505 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[11] -to do[11]
506 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[12] -to do[12]
507 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[13] -to do[13]
508 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[14] -to do[14]
509 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[15] -to do[15]
510 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[16] -to do[16]
511 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[17] -to do[17]
512 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[18] -to do[18]
513 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[19] -to do[19]
514 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[20] -to do[20]
515 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[21] -to do[21]
516 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[22] -to do[22]
517 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[23] -to do[23]
518 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[24] -to do[24]
519 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[25] -to do[25]
520 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[26] -to do[26]
521 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[27] -to do[27]
522 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[28] -to do[28]
523 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[29] -to do[29]
524 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[30] -to do[30]
525 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[31] -to do[31]
526 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[32] -to do[32]
527 
set_disable_timing atc18mem/hdss1_2048x34cm8sw0 -from di[33] -to do[33]
528 
 
529 
set_disable_timing IO33lib-max+ind/pt33b01 -from pad -to cin
530 
set_disable_timing IO33lib-max+ind/pt33b02 -from pad -to cin
531 
set_disable_timing IO33lib-max+ind/pt33b03 -from pad -to cin
532 
set_disable_timing IO33lib-max+ind/pt33b04 -from pad -to cin
533 
set_disable_timing IO33lib-max+ind/pt33b01u -from pad -to cin
534 
set_disable_timing IO33lib-max+ind/pt33b02u -from pad -to cin
535 
set_disable_timing IO33lib-max+ind/pt33b03u -from pad -to cin
536 
set_disable_timing IO33lib-max+ind/pt33b04u -from pad -to cin

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