1 |
2 |
dimamali |
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2 |
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----------------------- Release 1.0.19-b3188 ---------------------------
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3 |
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4 |
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2008-09-29 Added T1 Niagara bridge and template designs
|
5 |
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6 |
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2008-09-25 GRUSBHC: To conserve power the core disables the RAMS more
|
7 |
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often on non-FPGA technologies
|
8 |
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|
9 |
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2008-09-25 GRUSBHC: Some signal names in the in and out types for GRUSBHC
|
10 |
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has changed. The reason is that not all signals were named
|
11 |
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exactly the same as in the UTMI+ specification. Also all UTMI+
|
12 |
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signals are now present, even those which are always constant.
|
13 |
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Also the input ursti has been removed. See grip.pdf for more
|
14 |
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detailed information.
|
15 |
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|
16 |
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2008-09-25 GRUSBHC: The core is no longer located in library usbhc but
|
17 |
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instead in library gaisler. In and out types of the core has
|
18 |
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changed from usbhc_in_type and usbhc_out_type to grusb_in_type
|
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and grusb_out_type respectively. The package file needed to
|
20 |
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instantiate the core has changed from grusbhc_pkg to grusb.
|
21 |
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See grip.pdf for more detailed information and an example of
|
22 |
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how to instantiate the core.
|
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24 |
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2008-09-25 GRFPU: Updated Altera and (non-FT) Xilinx netlists.
|
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26 |
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2008-09-25 GRFPU: Allow use of Module Generator multiplier.
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27 |
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28 |
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2008-09-24 GRPCI: The amba master interface didn't handle a retry/split
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29 |
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response on the 1k boundary. One data word was lost.
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30 |
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31 |
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2008-09-19 Added Mobile SDR support to SDRAM controller in MCTRL.
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Disabled all power-saving functionality when the mobile
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33 |
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generic is set to 0 in DDRSPA, SDCTRL and SDMCTRL
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35 |
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2008-09-19 Added support for .ise file generation for ISE9/10
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2008-09-18 GRUSBHC: Improve timing by latching AHB ERROR responses
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during first AMBA response cycle.
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2008-09-18 GRFPU: Fix rounding of mantissa and exponent in round up,
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round to zero, and round down for division and sqrt.
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The core could also produce denormalized numbers when an
|
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underflow occured in single precision division.
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2008-09-02 I2CMST: Core did not perform clock synchronization and
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did not differentiate between master clock synchronization and
|
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slave clock stretch. Affects behavior in multi-master systems.
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2008-09-01 GRUSBHC: Conserve power on non-FPGA technologies by disabling
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RAMs when a controller is idle. Added scan test support;
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disable RAMs when in test mode and scan is enabled.
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52 |
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2008-08-24 LEON3: the processor could change address after a retry
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or split response.
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2008-08-15 GRPCI & PCIF: Added possibility to drive pci_rst if in host slot
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2008-08-08 GRUSBHC: The 'Port Enable/Disable Change' bit in the UHCI PORTSC
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register was set every time the 'Port Enable/Disable' bit
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changed.
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2008-08-08 GRFPU: Rounding of infinity always regarded infinity as created
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from finite operands and the result was thus determined by the
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rounding rules for the overflow exception.
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2008-08-01 LEON3: uncache byte access (LDUBA with ASI=1) could fail on
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non-FT system without MMU.
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2008-07-30 Reduced the address width from 11 to 9 bits of the input
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and output syncram buffers of the usbdcl
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2008-07-30 New template design for the Xilinx XtremeDSP Starter platform,
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Spartan-3A DSP 1800A Edition. www.xilinx.com/s3adspstarter
|
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2008-07-30 DDR2SPA now supports Xilinx Spartan 3 devices
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2008-07-27 Added dynamic leon3 reset vector option
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2008-07-23 Added SPI memory controller (SPIMCTRL) that maps memory
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devices with a serial peripheral interface into AMBA
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address space.
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2008-07-22 Added generic (regoutput) to the DDR controller to enable
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register on output signals to the PHY.
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2008-07-22 Generated script now explicitly turns off automatic
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optimization of designs in Modelsim.
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2008-07-17 Added template designs for Xilinx ML506 and ML507
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2008-07-16 SDCTRL: Extended tRFC timing bits in configuration register
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with the tRP bit when Mobile SDR support is enabled.
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2008-07-09 Renamed template design leon3-actel-coremp7 to
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leon3-actel-proasic3.
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2008-07-09 Added GRLIB wrapper for Actel's CoreMP7 processor and a
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CoreMP7/GRLIB bridge (CMP7WRAP/CMP7GRLIB). Added CoreMP7
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template design coremp7-actel-proasic3.
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2008-07-03 Added initial DDR support for CycloneIII.
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2008-07-03 DDRSPA: Extended tRFC timing bits in configuration register
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with the tRP bit when Mobile DDR support is enabled.
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2008-06-27 Improved Altera EEK template design (leon3-altera-ep3c25-eek),
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added VGA and LCD support.
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108 |
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|
109 |
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2008-06-24 Added template design for the Altera StratixIII (EP3SL150F1152)
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development board.
|
111 |
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|
112 |
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2008-06-23 Quartus II flow invoked the Classical Timing Analyzer but did
|
113 |
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not explicitly disable the TimeQuest analyzer.
|
114 |
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|
115 |
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2008-06-23 Added Stratixiii support to DDR2 controller. Fixed ODT control
|
116 |
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for DDR2 controller (only enabled during memory-write).
|
117 |
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|
118 |
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2008-06-19 GRUSBHC: Enhanced host controller could use wrong data buffer
|
119 |
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after processing the asynchronous schedule in NAK throttle mode
|
120 |
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when the only active descriptor was a HS QH with RL field set
|
121 |
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to a non-zero value.
|
122 |
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|
123 |
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2008-06-16 SVGACTRL: Dynamic clock registers and generics were documented
|
124 |
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as being specified in ns, the correct unit is ps. Positions in
|
125 |
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status register were wrong in documentation.
|
126 |
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|
127 |
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2008-06-12 GRFPU: fitos and fitod failed in non-standard mode (%fsr.ns = 1)
|
128 |
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|
129 |
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2008-05-26 SPICTRL: Added 3-wire mode
|
130 |
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|
131 |
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2008-05-26 SPICTRL: Last SCK cycle could be short. Delay first SCK
|
132 |
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transition, when CPHA = 0, based on clock scaler setting to
|
133 |
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guarantee proper setup time on MOSI. Data line could change
|
134 |
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value, in anticipaiton of next transfer, before SCK "change"
|
135 |
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flank in last cycle for CPHA = 0.
|
136 |
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|
137 |
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2008-05-25 LEON3/MMU: do not change AHB address if htrans has been set
|
138 |
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to keep strict AHB compliance
|
139 |
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|
140 |
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2008-05-23 Added separate leon3 design for ML403 board
|
141 |
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|
142 |
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2008-05-23 DSU3 did not respond with HREADY if unimplemented areas
|
143 |
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were accessed and trace buffers were disabled
|
144 |
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|
145 |
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2008-05-16 GRSPW2 generic nsync=2 did not function.
|
146 |
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|
147 |
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2008-05-14 Added support for Mobile DDR/SDR. Added support for CL=3 (CAS
|
148 |
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latency) and fixed duration of preamble for single write in
|
149 |
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DDR controller
|
150 |
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|
151 |
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----------------------- Release 1.0.18-b2949 ---------------------------
|
152 |
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|
153 |
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2008-05-13 RTL TAP controller (tap_inferred) did not shift out
|
154 |
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instruction register in SHIFT-IR state.
|
155 |
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|
156 |
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2008-05-12 Added Leon3 Demonstration design and board support for
|
157 |
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Nios II Embedded Evaluation Kit (leon3-altera-ep3c25-eek)
|
158 |
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|
159 |
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2008-05-05 Added system test software, UTMI+ and ULPI simulation models
|
160 |
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for GRUSBHC.
|
161 |
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|
162 |
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2008-05-05 Added oepol generic to control polarity of output enable
|
163 |
|
|
signal (dctrl), and made the signal work for bi-directional
|
164 |
|
|
UTMI+ interface
|
165 |
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|
166 |
|
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2008-05-05 Fixed an unlikely bug in GRUSBHC where the core could continue
|
167 |
|
|
to traverse periodic schedule even though software disabled it
|
168 |
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|
169 |
|
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2008-05-05 Fixed an unlikely bug in GRUSBHC where the source for a port
|
170 |
|
|
disable could be lost
|
171 |
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|
172 |
|
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2008-04-25 The configuration flash for Avnet-eval-xc4v25/60 board could
|
173 |
|
|
not be programmed due to missing -parallel switch in prom.cmd
|
174 |
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|
175 |
|
|
2008-04-24 scan signal testrst was not propagated to APB bus.
|
176 |
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|
177 |
|
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2008-04-23 Added system test software for SPICTRL and I2CMST
|
178 |
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|
179 |
|
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2008-04-20 ncsim failed to bind some Xilinx primitives in unisim library
|
180 |
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|
181 |
|
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2008-04-11 Added initial support for odt in ddr2 controller.
|
182 |
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|
183 |
|
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2008-04-09 rstgen scan support did not work in async mode.
|
184 |
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|
185 |
|
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2008-04-08 Changed clock generators for ax, inferred, proasic, proasic3
|
186 |
|
|
and rhlib18t to handle generics pcien and pcisysclk.
|
187 |
|
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|
188 |
|
|
2008-04-07 Changed Altera clock generators to use CLKIN as reference
|
189 |
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|
190 |
|
|
2008-04-04 leon3: cache snooping could fail in systems with separate
|
191 |
|
|
snoop tags, MMU enabled and non-write through 2-port RAM.
|
192 |
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|
193 |
|
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2008-04-01 Enabled use of VHDL libraries in Quartus projects
|
194 |
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|
195 |
|
|
2008-04-01 Removed usage of non-portable 'echo -e' in scripts
|
196 |
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|
|
197 |
|
|
2008-03-30 Added support for ML402/403 boards
|
198 |
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|
199 |
|
|
2008-03-27 Quartus II could not synthesize SPICTRL
|
200 |
|
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|
201 |
|
|
2008-03-20 Added support for HAPS Daughter board: SDRAM_1x1, DDR_1x1,
|
202 |
|
|
GEPHY_1x1 and BIO1 I/O board.
|
203 |
|
|
|
204 |
|
|
------------------- Release 1.0.18-b2823 ---------------------------
|
205 |
|
|
|
206 |
|
|
2008-03-12 Added 256-bit AES option to crypto cores
|
207 |
|
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|
208 |
|
|
2008-03-10 APBUART TX FIFO debug register could be accessed from several
|
209 |
|
|
addresses
|
210 |
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|
211 |
|
|
2008-03-05 Changed a few generics for blocks internal to USBHC that were
|
212 |
|
|
non integers
|
213 |
|
|
|
214 |
|
|
2008-02-27 Added netlist support for pciarb (for rtax)
|
215 |
|
|
|
216 |
|
|
------------------- Release 1.0.18-b2808 ---------------------------
|
217 |
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|
218 |
|
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2008-02-26: Added single interrupt support for GRCAN, GRTC and GRCTM
|
219 |
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|
220 |
|
|
2008-02-26: Added GRTC interrupt for CLTU stored and added TC input masking
|
221 |
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|
222 |
|
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2008-02-26: Updated GRCTM to avoid false datation after reset
|
223 |
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|
224 |
|
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2008-02-21: LEON3: Added 32-bit multiplier option
|
225 |
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|
226 |
|
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2008-02-20: Removed Ethernet PHY arbiter
|
227 |
|
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|
228 |
|
|
2008-02-20: Added new Ethernet PHY simulation model. Added new
|
229 |
|
|
ethernet test to grlib system test.
|
230 |
|
|
|
231 |
|
|
2008-02-13: LEON3: one data cache line could be corrupted on target
|
232 |
|
|
technologies without write-through in tag RAMs, if load
|
233 |
|
|
or store instructions were executed during cache flush.
|
234 |
|
|
|
235 |
|
|
2008-02-01: PCIF: fixed handling of retry on last word in fifo, fast
|
236 |
|
|
pci-conf commands, byte/half word accesses to PCI-target.
|
237 |
|
|
Changed size of BAR0 to 4k and added support to set size
|
238 |
|
|
of BAR 1 to 4 separately.
|
239 |
|
|
|
240 |
|
|
2008-01-31: Moved testbenches from designs to new verification directory.
|
241 |
|
|
|
242 |
|
|
------------------- Release 1.0.17-b2738 ---------------------------
|
243 |
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|
244 |
|
|
2008-01-25: Changed GRUSBHC so that a SW initiated reset (HC reset for EHCI,
|
245 |
|
|
HC reset and Global reset for UHCI) also resets the USB
|
246 |
|
|
transceiver, and added a generic to control the length of this
|
247 |
|
|
reset.
|
248 |
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|
249 |
|
|
2008-01-25: Fixed a bug where GRUSBHC might not detect when software removes
|
250 |
|
|
a data structure from the schedule.
|
251 |
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|
252 |
|
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2008-01-21: Changed edcl init fsm in greth_gbit so that it works both
|
253 |
|
|
with National and Marvell PHYs.
|
254 |
|
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|
255 |
|
|
2008-01-18: GRUSBHC configured the PHY registers wrong which could lead to
|
256 |
|
|
USB power failure not beeing detected.
|
257 |
|
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|
258 |
|
|
2008-01-18: Actel Libero implementation flow fully functional with v8.1
|
259 |
|
|
|
260 |
|
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2008-01-17: unisim syncram had multiple drivers for sizes larger than 64 Kbyte
|
261 |
|
|
|
262 |
|
|
------------------- Release 1.0.17-b2717 ---------------------------
|
263 |
|
|
|
264 |
|
|
2007-12-12: Greth_gbit now only checks/sets speed/duplex when edcl is enabled
|
265 |
|
|
|
266 |
|
|
------------------- Release 1.0.17-b2710 ---------------------------
|
267 |
|
|
|
268 |
|
|
2007-12-07: Reduced Xilinx block RAM usage for small syncram and syncram_2p
|
269 |
|
|
|
270 |
|
|
2007-12-07: Fifo write counter was corrupted in greth_gbit when checksum
|
271 |
|
|
offloading was enabled for non ip packet.
|
272 |
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|
|
273 |
|
|
2007-12-06: Added Actel ProASIC3 support to JTAG TAP controller
|
274 |
|
|
|
275 |
|
|
2007-12-06: Updated TMTC cores and examples to use GRLIB/AMBA/DMA2AHB package.
|
276 |
|
|
|
277 |
|
|
2007-12-05: Leon3 fixed cache mapping ('cached' generic) only affected
|
278 |
|
|
the data cache, not the icache
|
279 |
|
|
|
280 |
|
|
2007-12-04: SDRAM controller (MCTRL/SDCTRL) can now operate up to 166 MHz
|
281 |
|
|
|
282 |
|
|
2007-11-30: Added tech mapping for eASIC Nextreme 90 nm eRAM and bRAM
|
283 |
|
|
|
284 |
|
|
2007-11-28: Added APBUART debug mode with internal read/write capability of TX/RX FIFO
|
285 |
|
|
|
286 |
|
|
2007-11-23: Added support for HAPS-52 and HAPS-54 boards, updated HAPS IP cores
|
287 |
|
|
and Xilinx VHDL netlists for ssrctrl
|
288 |
|
|
|
289 |
|
|
2007-11-20: Added I2C slave
|
290 |
|
|
|
291 |
|
|
2007-11-15: Fixed bug in GRUSBHC (unlikely to occur) where a device connect
|
292 |
|
|
could go undetected.
|
293 |
|
|
|
294 |
|
|
2007-11-14: Changed GRUSBHC so that it handles when the USB PHY behaves out-of-spec
|
295 |
|
|
and reports the wrong device speed at connect.
|
296 |
|
|
|
297 |
|
|
2007-11-12: Added board support and template design for Gleichmann
|
298 |
|
|
HPE-MIDI board (Stratix-II)
|
299 |
|
|
|
300 |
|
|
2007-11-12: leon3: added option for zero-latency TLB look-up
|
301 |
|
|
during stores with cache hit
|
302 |
|
|
|
303 |
|
|
2007-11-12: leon3 TLB LRU replacement did not implement LRU correctly,
|
304 |
|
|
leading to sub-optimal TLB replacement
|
305 |
|
|
|
306 |
|
|
2007-11-09: Added support for Hardi/Synplicity HAPS boards
|
307 |
|
|
|
308 |
|
|
2007-11-08: usbhc_net.vhd still used old usbhc port map (with
|
309 |
|
|
csn, fault etc. signal)
|
310 |
|
|
|
311 |
|
|
2007-11-08: Added four GRUSBHC VHDL netlists, for Xilinx
|
312 |
|
|
|
313 |
|
|
2007-11-07: GRUSBHC did not handle delayed AHB RETRY/SPLIT/ERROR
|
314 |
|
|
responses correctly.
|
315 |
|
|
|
316 |
|
|
2007-11-06: AHB master index for GRETH was not correct set in
|
317 |
|
|
leon3-gr-cpci-xc2v6000 designs.
|
318 |
|
|
|
319 |
|
|
2007-11-06: Changed clock generation in DDR2 PHY
|
320 |
|
|
(Old option could in some situations prevent the DCM to lock)
|
321 |
|
|
|
322 |
|
|
2007-11-02: MCTRL and FTMCTRL could fail on byte write in 16-bit bus
|
323 |
|
|
configuration with read-modify-write enabled.
|
324 |
|
|
|
325 |
|
|
------------------- Release 1.0.17-b2594 ---------------------------
|
326 |
|
|
|
327 |
|
|
2007-10-31: Added tech mapping for Virage 90 nm RAM blocks
|
328 |
|
|
|
329 |
|
|
2007-10-31: Fixed bugs and added standard device requests for USB DCL.
|
330 |
|
|
It now passes the device compliance test.
|
331 |
|
|
|
332 |
|
|
2007-10-28: Suppress snoop enable bit in leon3 dcache when snooping
|
333 |
|
|
is disabled in configuration
|
334 |
|
|
|
335 |
|
|
2007-10-25: Added new scriptable PCI test master pcitb_master_script
|
336 |
|
|
Example testbench (designs/pci/script_tb)
|
337 |
|
|
|
338 |
|
|
2007-10-22: Added tech mapping and PLL support for DARE 0.18 um
|
339 |
|
|
|
340 |
|
|
2007-10-19: Improved behaviour of LDA with ASI=0x01 (forced miss).
|
341 |
|
|
LDA with ASI=0x01 does not allocate a cache line now.
|
342 |
|
|
Caches could not be frozen on interrupt.
|
343 |
|
|
|
344 |
|
|
2007-10-18: Fixed bug in GRUSBHC (unlikely to occur) where the UHC
|
345 |
|
|
could get stuck in port resume if SW behaved out-of-spec
|
346 |
|
|
|
347 |
|
|
2007-10-17: Added leon3 template design for Xilinx ML501 board
|
348 |
|
|
|
349 |
|
|
2007-10-17: Improved Proasic3 tech mapping to support PLL.
|
350 |
|
|
|
351 |
|
|
2007-10-15: Added tech support for CylconeIII FPGAs, including
|
352 |
|
|
leon3 template design for Altera NiosII CycloneIII board
|
353 |
|
|
|
354 |
|
|
2007-10-08: Added tech support for Quicklogic Eclipse FPGAs
|
355 |
|
|
|
356 |
|
|
2007-10-08: Improved synchronization in JTAG Debug Link.
|
357 |
|
|
|
358 |
|
|
2007-10-05: Active level of GRUSBHC signals drvvbus and vbusvalid, used
|
359 |
|
|
in UTMI+ interface, is configurable through generics
|
360 |
|
|
|
361 |
|
|
2007-10-05: Signals fault, faultn, enablen, vbus, csn, id was removed from
|
362 |
|
|
GRUSBHC core since they are not ULPI signals but chip specific
|
363 |
|
|
|
364 |
|
|
2007-10-05: Txfifosize was not set correctly when edcl generic was set to 2
|
365 |
|
|
|
366 |
|
|
2007-10-05: AHB/AHB bridge: Interrupt forwarding and read burst to
|
367 |
|
|
non-prefetchable area could fail. All types of AHB
|
368 |
|
|
bursts are now supported.
|
369 |
|
|
|
370 |
|
|
2007-09-27: Moved USBHC to separate library, GRLIB wrapper added
|
371 |
|
|
under gaisler/grusbhc.
|
372 |
|
|
|
373 |
|
|
2007-09-27: GRUSBHC supports 8-bit and 16-bit UTMI+ interface
|
374 |
|
|
|
375 |
|
|
2007-09-24: Greth and greth_gbit did not handle retry/split correctly.
|
376 |
|
|
|
377 |
|
|
2007-09-24: Corrupt packets with incorrect length in type field could
|
378 |
|
|
cause a deadlock in greth.
|
379 |
|
|
|
380 |
|
|
2007-09-24: Reduced block RAM use in EDCL. Maximum fifosize
|
381 |
|
|
increased for greth
|
382 |
|
|
|
383 |
|
|
2007-09-24: Corrected the number of interrupts in plug&play printout
|
384 |
|
|
for GRCTM
|
385 |
|
|
|
386 |
|
|
2007-09-24: Extended pcilib addzero constant to 32-bits to support
|
387 |
|
|
larger decoded areas
|
388 |
|
|
|
389 |
|
|
2007-09-24: Added 16-bit PROM/IO support to SSRCTRL
|
390 |
|
|
|
391 |
|
|
2007-09-21: Added LEON3-RTAX pinout for Ethernet support and multiple
|
392 |
|
|
PCI interrupts
|
393 |
|
|
|
394 |
|
|
2007-09-20: Board support and template design for Hardy HAPS51 board
|
395 |
|
|
|
396 |
|
|
2007-09-14: Renamed tech library apa3 to proasic3
|
397 |
|
|
|
398 |
|
|
2007-09-13: pci_mtf could respond with an unecessary retry cycle
|
399 |
|
|
during target writes
|
400 |
|
|
|
401 |
|
|
2007-08-31: Changed how GRUSBHC turns on/off port power for ULPI chips, now
|
402 |
|
|
it also works with transceivers that use DRVVBUS and
|
403 |
|
|
DRVVBUS_EXTERNAL the other way around from what ULPI spec. says
|
404 |
|
|
|
405 |
|
|
2007-08-29: Changed split transaction isochronous IN max packet size
|
406 |
|
|
from 188 to 192 bytes in GRUSBHC.
|
407 |
|
|
|
408 |
|
|
2007-08-28: Corrected 8-bit EDAC support for multiple PROM banks in FTSRCTRL
|
409 |
|
|
|
410 |
|
|
2007-08-27: Board support and template design for Hardy HAPS31 board
|
411 |
|
|
|
412 |
|
|
2007-08-27: Board support and template design for Xilinx ML505 board
|
413 |
|
|
bow support DDR2 at 200 MHz (DDR400).
|
414 |
|
|
|
415 |
|
|
2007-08-24: Added DDR2 Controller and PHY for virtex-4/5
|
416 |
|
|
|
417 |
|
|
2007-08-22: Added ucf file for gr-4m-can2-spw3 mezzanine to the
|
418 |
|
|
gr-cpci-xc2v board
|
419 |
|
|
|
420 |
|
|
2007-08-22: leon3-avnet-ml401 template design could not be
|
421 |
|
|
synthesized without Gigabit GRETH and GRUSBHC.
|
422 |
|
|
|
423 |
|
|
2007-08-22: Added Greth wrapper with blockrams but without port records
|
424 |
|
|
and plug and play
|
425 |
|
|
|
426 |
|
|
2007-08-21: Board support and template design for Actel COREMP7-1000 board
|
427 |
|
|
|
428 |
|
|
2007-08-20: Added SPI controller
|
429 |
|
|
|
430 |
|
|
2007-08-17: Added GRSPW2
|
431 |
|
|
|
432 |
|
|
2007-08-17: Moved GRETH to separate library
|
433 |
|
|
|
434 |
|
|
2007-07-30: DSU AHB trace buffer index register was written with
|
435 |
|
|
wrong bits when accessed by software.
|
436 |
|
|
|
437 |
|
|
2007-07-20: LEON3: a sequence of two consecutive JMP/JMPL would fail
|
438 |
|
|
to execute the target instruction of the first JMP.
|
439 |
|
|
|
440 |
|
|
2007-07-05: All SR and SD memory controllers updated with "HSPLIT < (others => '0');" statement
|
441 |
|
|
|
442 |
|
|
2007-07-05: FTSRCTRL updated to avoid latching the address when other slaves are accessed
|
443 |
|
|
|
444 |
|
|
2007-06-29: Added port of OC I2C-master
|
445 |
|
|
|
446 |
|
|
2007-06-29: Added USB host controller testbench
|
447 |
|
|
|
448 |
|
|
------------------- Release 1.0.16-b2313 ---------------------------
|
449 |
|
|
|
450 |
|
|
2007-06-27: Writing MMU contex register through DSU could corrupt
|
451 |
|
|
other MMU registers.
|
452 |
|
|
|
453 |
|
|
2007-06-20: Added option to add custom JTAG ID to tap controller
|
454 |
|
|
|
455 |
|
|
2007-06-20: Added scan test signals to AHB/APB records
|
456 |
|
|
|
457 |
|
|
2007-06-20: Added scan support for PCI_MTF, GRETH and FTMCTRL
|
458 |
|
|
|
459 |
|
|
2007-06-20: Worked around synplify-8.8 issue in Altera DDR PHY
|
460 |
|
|
|
461 |
|
|
2007-06-18: GRPCI - Added support for type 1 configuration cycles
|
462 |
|
|
- Configurable AHB slave size (128 MB - 2 GB)
|
463 |
|
|
|
464 |
|
|
2007-06-08: Added number of channels information to GRHCAN, no effect for standard single channel designs
|
465 |
|
|
|
466 |
|
|
2007-06-08: GRFIFO extended with status register, and support for single interrupt and registers with singleirq vhdl generic
|
467 |
|
|
|
468 |
|
|
2007-05-28: Added reset to GRGPIO output flip-flops
|
469 |
|
|
|
470 |
|
|
2007-05-25: Added USB 2.0 Host Controller (commercial only)
|
471 |
|
|
|
472 |
|
|
2007-05-16: Second port added to GRSPW
|
473 |
|
|
|
474 |
|
|
2007-05-15: Added GRPCI CBE tests (designs/pci/cbe_tb)
|
475 |
|
|
|
476 |
|
|
2007-05-12: GRPCI core now supports byte enable changes during PCI bursts.
|
477 |
|
|
|
478 |
|
|
2007-05-09: Added busreset IRQ to BRM wrappers
|
479 |
|
|
|
480 |
|
|
2007-05-07: Made grant signal registered in BRM AHB master interface
|
481 |
|
|
Made waitn signal registered in asynchronous BRM wrapper
|
482 |
|
|
|
483 |
|
|
------------------- Release 1.0.15-b2180 ---------------------------
|
484 |
|
|
|
485 |
|
|
2007-05-06: Added VHDL netlists of GRSPW, GRFPU-Lite and LEON3FT.
|
486 |
|
|
|
487 |
|
|
------------------- Release 1.0.15-b2172 ---------------------------
|
488 |
|
|
|
489 |
|
|
2007-04-29: Added board support and template design for new
|
490 |
|
|
Pender GR-CPCI-XC4V Virtex4-LX100 board
|
491 |
|
|
|
492 |
|
|
2007-04-28: Added board support and template design for
|
493 |
|
|
Xilinx ML505 Virtex5-LX50T board
|
494 |
|
|
|
495 |
|
|
2007-04-27: B1553BRM did not propagate betiming generic to BRM core
|
496 |
|
|
|
497 |
|
|
2007-04-23: Added input/output register bypass capability to GRGPIO
|
498 |
|
|
|
499 |
|
|
------------------- Release 1.0.15-b2149 ---------------------------
|
500 |
|
|
|
501 |
|
|
2007-04-19: Added support to skip unused libraries and files from
|
502 |
|
|
being included into build scripts
|
503 |
|
|
|
504 |
|
|
2007-04-17: Added tech mapping for IHP 0.25 rad-hard library
|
505 |
|
|
|
506 |
|
|
2007-04-16: Improved coverage of cache snooping in SMP systems for
|
507 |
|
|
fast snooping option
|
508 |
|
|
|
509 |
|
|
------------------- Release 1.0.15-b2133 ---------------------------
|
510 |
|
|
|
511 |
|
|
2007-04-07: Added custmom memory controller to Avnet Spartan3
|
512 |
|
|
template design in order to support mezzanine board.
|
513 |
|
|
|
514 |
|
|
2007-03-30: Updated GRLIB/DMA2AHB master interface to issue HSIZE synchronously with HADDR
|
515 |
|
|
|
516 |
|
|
2007-03-30: Added initial support for Virtex5
|
517 |
|
|
|
518 |
|
|
2007-03-30: Added Hynix and Micron DDR2 simulation models
|
519 |
|
|
|
520 |
|
|
2007-03-30: Improved implementation of LEON3 double-clock option
|
521 |
|
|
+ added new features (dynamic clock switching, double
|
522 |
|
|
clocked cores can run at 2x, 3x or 4x AHB freq)
|
523 |
|
|
|
524 |
|
|
2007-03-25: Added support for MINGW shell as development env.
|
525 |
|
|
|
526 |
|
|
2007-03-25: Modified SDRAM controllers to use 8-word bursts
|
527 |
|
|
in addition to page bursts
|
528 |
|
|
|
529 |
|
|
2007-03-22: Added SatCAN wrapper and CAN bus multiplexer
|
530 |
|
|
|
531 |
|
|
2007-03-09: Added support for Actel Libero-7.3, using the
|
532 |
|
|
'make libero-launch' target
|
533 |
|
|
|
534 |
|
|
2007-03-07: PCIDMA did not handle memory accesses to slow memory
|
535 |
|
|
(>2 waitstates) correctly when retry was received
|
536 |
|
|
from the PCI-core. One word was not transfered.
|
537 |
|
|
|
538 |
|
|
2007-03-07: DSU registers could not be read with AHB burst
|
539 |
|
|
|
540 |
|
|
2007-03-07: DSU diagnostic write to instruction trace buffer
|
541 |
|
|
used wrong word address
|
542 |
|
|
|
543 |
|
|
2007-03-07: EDAC did not work correctly in ftsrctrl when prom8en
|
544 |
|
|
generic was 0.
|
545 |
|
|
|
546 |
|
|
------------------- Release 1.0.14-b2053 ---------------------------
|
547 |
|
|
|
548 |
|
|
2007-02-26: Added clock-gating power-down option for LEON3
|
549 |
|
|
|
550 |
|
|
2007-02-23: AMBA monitor split into AHB and APB parts which are
|
551 |
|
|
integrated into ahbctrl and apbctrl.
|
552 |
|
|
|
553 |
|
|
2007-02-23: Improved implementation of LEON3 double-clock option
|
554 |
|
|
|
555 |
|
|
2007-02-22: MCTRL/FTMCTRL memo.bdrive did not change polarity
|
556 |
|
|
when OEPOL = 1
|
557 |
|
|
|
558 |
|
|
2007-02-22: LEON3 ML401 template design used duplicate interrupt
|
559 |
|
|
for PS/2 ports
|
560 |
|
|
|
561 |
|
|
------------------- Release 1.0.14-b2037 ---------------------------
|
562 |
|
|
|
563 |
|
|
2007-02-20: Added tech mapping for Artisan RAMs
|
564 |
|
|
|
565 |
|
|
2007-02-19: Physical cache snooping in leon3 MMU did not work
|
566 |
|
|
with multi-way caches
|
567 |
|
|
|
568 |
|
|
2007-02-17: Always enable broadcast function in IRQMP controller
|
569 |
|
|
if NCPU > 1.
|
570 |
|
|
|
571 |
|
|
------------------- Release 1.0.14-b2028 ---------------------------
|
572 |
|
|
|
573 |
|
|
2007-02-13: Avoid AHB lock-up by inserting idle cycle between two
|
574 |
|
|
consecutive accesses which assert HLOCK (leon3).
|
575 |
|
|
|
576 |
|
|
2007-02-12: Added option to break processor on AHB trace buffer hit.
|
577 |
|
|
|
578 |
|
|
2007-02-10: The delay counter in Leon3 DSU AHB trace buffer should
|
579 |
|
|
decrement each AHB transfer, not each clock.
|
580 |
|
|
|
581 |
|
|
2007-02-10: Added AMBA AHB/APB protocol monitor (commercial only)
|
582 |
|
|
|
583 |
|
|
2007-02-06: Applicable bugfixes from ftmctrl merged to mctrl.
|
584 |
|
|
|
585 |
|
|
2007-02-01: Several bugfixes to ftmctrl. 8-bit edac addressing
|
586 |
|
|
changed for ftmctrl.
|
587 |
|
|
|
588 |
|
|
2007-01-24: Implemented snooping for MMU data cache, enabling
|
589 |
|
|
support for linux SMP on kernel 2.6.18
|
590 |
|
|
|
591 |
|
|
2007-01-23: LEON3 scratch pad RAM size was wrongly defined in
|
592 |
|
|
cache config registers
|
593 |
|
|
|
594 |
|
|
2007-01-22: GRPCI target did not handle AMBA 1 Kbyte limit correctly
|
595 |
|
|
|
596 |
|
|
2007-01-16: Added template design for Digilent spartan3-1000
|
597 |
|
|
|
598 |
|
|
2007-01-15: Added support for Aldec VHDL simulators
|
599 |
|
|
|
600 |
|
|
2007-01-05: Modified Xilinx DDR PHY to allow extra skew for
|
601 |
|
|
read clock phase adjusting.
|
602 |
|
|
|
603 |
|
|
2006-12-24: Added template design for Digilent spartan3e-1600
|
604 |
|
|
|
605 |
|
|
2006-12-23: Added techmap support for Xilinx spartan3e, including
|
606 |
|
|
DDR PHY.
|
607 |
|
|
|
608 |
|
|
2006-12-22: Wrong drive strength and I/O type on some Xilinx pads
|
609 |
|
|
|
610 |
|
|
2006-12-19: Added missing video clock in leon3-gr-xc3s-1500 design
|
611 |
|
|
|
612 |
|
|
2006-12-18: DDRSPA core had wrong DDR initialization sequence
|
613 |
|
|
|
614 |
|
|
2006-12-11: Re-write of the PS/2 core due to several bugs
|
615 |
|
|
|
616 |
|
|
------------------- Release 1.0.13 ---------------------------------
|
617 |
|
|
|
618 |
|
|
2006-12-04: LEON3 DSU break signal was active on falling
|
619 |
|
|
edge instead of rising edge.
|
620 |
|
|
|
621 |
|
|
2006-12-04: Improved read-datapath synchronisation for Xilinx
|
622 |
|
|
verion of DDRSPA PHY to achieve 120 MHz operation
|
623 |
|
|
|
624 |
|
|
2006-11-30: LEON3 MMU could incorrectly update fault status
|
625 |
|
|
register on a TLB flush
|
626 |
|
|
|
627 |
|
|
2006-11-30: Removed option to invert SDRAM clock from clkgen,
|
628 |
|
|
as it is no longer needed.
|
629 |
|
|
|
630 |
|
|
------------------- Release 1.0.12 ---------------------------------
|
631 |
|
|
|
632 |
|
|
2006-11-29: GRSPW DMA write could fail if last data was not
|
633 |
|
|
word aligned and received an AHB retry or split.
|
634 |
|
|
|
635 |
|
|
2006-11-28: PCI bridge could miss a target access on simultaneous
|
636 |
|
|
target and initiator requests.
|
637 |
|
|
|
638 |
|
|
2006-11-24: Added optional JTAG DSU interface to all Altera-based
|
639 |
|
|
template designs.
|
640 |
|
|
|
641 |
|
|
2006-11-20: Added support and template design for Altera
|
642 |
|
|
Straix-II EP2S60 board with SSRAM and DDR
|
643 |
|
|
|
644 |
|
|
2006-11-19: Modifed template design for Avnet Virtex4 Eval board
|
645 |
|
|
to support both LX25 and LX60 devices.
|
646 |
|
|
|
647 |
|
|
2006-11-17: Added support for Altera Virtual JTAG controller
|
648 |
|
|
to AHBJTAG DSU interface
|
649 |
|
|
|
650 |
|
|
2006-11-09: Improve coverage of cache snooping in SMP systems
|
651 |
|
|
|
652 |
|
|
2006-11-09: LEON3 could assert HLOCK one cycle too late for SWAP
|
653 |
|
|
|
654 |
|
|
2006-11-04: Added support and template design for Memec V2MB1000
|
655 |
|
|
board, including 16-bit DDR and P160 mezz. with ethernet
|
656 |
|
|
|
657 |
|
|
2006-11-03: New implementation of GRPCI DMA controller
|
658 |
|
|
|
659 |
|
|
2006-11-02: Added new SVGA video frame buffer with AHB master I/F,
|
660 |
|
|
capable of 640x480, 800x600 and 1024x768 with 8-,
|
661 |
|
|
16- and 32-bit colour depth.
|
662 |
|
|
|
663 |
|
|
2006-10-31: Added support and template design for Altera
|
664 |
|
|
Straix-II EP2S60 board with SDRAM
|
665 |
|
|
|
666 |
|
|
------------------- Release 1.0.11 ---------------------------------
|
667 |
|
|
|
668 |
|
|
2006-10-23: Added pre-compiled netlists of USB-2.0 DSU interface
|
669 |
|
|
|
670 |
|
|
2006-10-21: Added board support and template design for
|
671 |
|
|
Digilent XUP board, including 64-bit DDR controller
|
672 |
|
|
|
673 |
|
|
2006-10-20: AHB controller could loose interrupt when processing
|
674 |
|
|
SPLIT transactions
|
675 |
|
|
|
676 |
|
|
2006-10-18: Added new version of GRETH MAC with giga-bit capability,
|
677 |
|
|
TCP checksum off-loading and scatter-gather DMA
|
678 |
|
|
|
679 |
|
|
2006-10-15: Added new 32-bit DDR266 controller to ML401 template design
|
680 |
|
|
|
681 |
|
|
2006-10-10: Added board support and template design with 16-bit DDR
|
682 |
|
|
for Avnet Virtex4 LX25 Eval board
|
683 |
|
|
|
684 |
|
|
2006-10-08: Added new 16/32/64-bit DDR266 controller with
|
685 |
|
|
separate clocking and modular DDR PHY
|
686 |
|
|
|
687 |
|
|
2006-10-01: GRPCI - Added support for byte-swapping
|
688 |
|
|
- Added interrupt support
|
689 |
|
|
- AHB slave interface did not handle back2back transfers
|
690 |
|
|
- AHB master fifo read out synchronization fix
|
691 |
|
|
- PCI master did not always terminate write bursts
|
692 |
|
|
at correct length
|
693 |
|
|
|
694 |
|
|
2006-09-18: SDRAM clock generation was disabled by mistake
|
695 |
|
|
in leon3-gr-xc3s-1500 template design
|
696 |
|
|
|
697 |
|
|
2006-09-01: GRETH MAC could loose data after excessive AHB retries
|
698 |
|
|
|
699 |
|
|
2006-08-31: All generics did not propagate in pci_mtf core
|
700 |
|
|
|
701 |
|
|
------------------- Release 1.0.10 ---------------------------------
|
702 |
|
|
|
703 |
|
|
2006-08-28: Worked-around some XST synthesis bugs in leon3 MMU
|
704 |
|
|
|
705 |
|
|
2006-08-20: Corrected FIFO/DMA errors in the GRPCI core
|
706 |
|
|
|
707 |
|
|
2006-08-18: Modified the SDRAM inverted clock option to delay SDRAM
|
708 |
|
|
signals rather than then inverting the clock
|
709 |
|
|
|
710 |
|
|
2006-08-17: Improved SDRAM controller timing to meet PC133
|
711 |
|
|
|
712 |
|
|
2006-08-12: Added RMII interface to GRETH ethernet MAC
|
713 |
|
|
|
714 |
|
|
2006-07-20: Added preliminary Libero-7.2 project file generation.
|
715 |
|
|
Does not work yet due to Libero bugs though ...
|
716 |
|
|
|
717 |
|
|
2006-06-15: Leon3 locked transfers could fail after a cache burst
|
718 |
|
|
|
719 |
|
|
------------------- Release 1.0.9 ----------------------------------
|
720 |
|
|
|
721 |
|
|
2006-07-04: Added support for the LAN91C111 ethernet MAC in
|
722 |
|
|
the Altera Cyclone/Nios template design
|
723 |
|
|
|
724 |
|
|
2006-06-07: Added ATA and CF+ interface to applicable template designs
|
725 |
|
|
|
726 |
|
|
2006-06-05: Added ATA disk controller with AHB interface
|
727 |
|
|
|
728 |
|
|
2006-05-30: Leon3 data forwarding could (in theory) fail during
|
729 |
|
|
first trap instruction
|
730 |
|
|
|
731 |
|
|
2006-05-27: Added support for Actel Libero
|
732 |
|
|
|
733 |
|
|
2006-05-25: Added USB-2.0 debug communication link
|
734 |
|
|
|
735 |
|
|
2006-05-20: Added support for Mentor Precision synthesis tool
|
736 |
|
|
|
737 |
|
|
2006-05-03: Cache snooping could fail during cache miss processing
|
738 |
|
|
|
739 |
|
|
2006-04-29: DDR controller also ported to Lattice EC/P
|
740 |
|
|
|
741 |
|
|
2006-04-15: GRETH MAC debug link could loose and/or duplicate packets
|
742 |
|
|
|
743 |
|
|
------------------- Release 1.0.8 ----------------------------------
|
744 |
|
|
|
745 |
|
|
2006-03-29: Added 2-port, 32-bit DDR controller for Virtex2/4 and Lattice
|
746 |
|
|
|
747 |
|
|
2006-03-29: Added DDR clock generator for Virtex2/4 and Lattice
|
748 |
|
|
|
749 |
|
|
2006-03-29: EXTRALIBS in Makefile can point to secondary libs.txt
|
750 |
|
|
|
751 |
|
|
2006-03-29: Leon3 fast snooping option was never enabled by xconfig
|
752 |
|
|
|
753 |
|
|
2006-03-20: Added new 32-bit ZBT SSRAM memory controller
|
754 |
|
|
|
755 |
|
|
2006-03-20: Simulation model of SSRAM allows srecord pre-load
|
756 |
|
|
|
757 |
|
|
2006-03-20: Added template design for Avnet Virtex2-1500 PCI board
|
758 |
|
|
|
759 |
|
|
------------------- Release 1.0.7 ----------------------------------
|
760 |
|
|
|
761 |
|
|
2006-02-26: Added CAN interface to GR-XC3S-1500 design
|
762 |
|
|
|
763 |
|
|
2006-02-23: Added uni- and bi-directional AHB/AHB Bridge
|
764 |
|
|
|
765 |
|
|
2006-02-23: CAN core bug fixes + new data sheet
|
766 |
|
|
|
767 |
|
|
2006-01-20: Timing improvements in GRSPW Spacewire core
|
768 |
|
|
|
769 |
|
|
2006-01-20: Chain mode in gptimer chained with wrong timer
|
770 |
|
|
|
771 |
|
|
2006-01-20: Moved all vendor/device ID codes to grlib.devices
|
772 |
|
|
|
773 |
|
|
2006-01-09: pci_mtf core could not handle 0-ws AHB slaves
|
774 |
|
|
|
775 |
|
|
2006-01-09: config.in script for VGA controller never enabled the core
|
776 |
|
|
|
777 |
|
|
2006-01-08: modified leon3-gr-cpci designs to use correct clocks
|
778 |
|
|
|
779 |
|
|
2006-01-05: TMTC updated to current version of grlib. DMA2AHB improved.
|
780 |
|
|
|
781 |
|
|
2006-01-05: added 32-bit addresses to memory controllers
|
782 |
|
|
|
783 |
|
|
2006-01-05: gptimer watchdog did not reset properly at power-on
|
784 |
|
|
|
785 |
|
|
|
786 |
|
|
------------------- Release 1.0.6 ----------------------------------
|
787 |
|
|
|
788 |
|
|
2005-12-29: grfpwx.vhd was missing in ISE/XST script files
|
789 |
|
|
|
790 |
|
|
2005-12-27: Added LEON3 template design for ML401 Virtex4 board
|
791 |
|
|
|
792 |
|
|
2005-12-27: Added Virtex4 support to JTAG TAP controller
|
793 |
|
|
|
794 |
|
|
2005-12-27: Added simulation model of MT46V16M16 DDR RAM
|
795 |
|
|
|
796 |
|
|
2005-12-21: Added simulation model of CY7C1354B Synchronous SRAM
|
797 |
|
|
|
798 |
|
|
2005-12-21: Added Reed-Solomon Codecs for 16/8 and 32/16 codes
|
799 |
|
|
|
800 |
|
|
------------------- Release 1.0.5 ----------------------------------
|
801 |
|
|
|
802 |
|
|
2005-12-20: Re-organized technology mapping libraries
|
803 |
|
|
|
804 |
|
|
2005-12-18: Added support for Lattice XP/EC/ECP
|
805 |
|
|
|
806 |
|
|
2005-12-18: Added support for Xilinx Virtex-4 JTAG controller
|
807 |
|
|
|
808 |
|
|
2005-12-07: Added new 10/100 Mbit Ethernet MAC (GRETH)
|
809 |
|
|
|
810 |
|
|
2005-12-05: LEON3-GR-PCI-XC2V template design would not simulate
|
811 |
|
|
correctly due to unsupported frequency scaling. Also,
|
812 |
|
|
test bench would fail if Spacewire link not present.
|
813 |
|
|
|
814 |
|
|
------------------- Release 1.0.4 -----------------------------------
|
815 |
|
|
|
816 |
|
|
2005-11-28: Moved all technology mapped blocks to new TECHMAP library.
|
817 |
|
|
|
818 |
|
|
2005-11-24: UMAC/SMAC with pipe option (v8 = 2) did not check
|
819 |
|
|
dependency on result register.
|
820 |
|
|
|
821 |
|
|
2005-11-21: Modified watchdog output on GPTIMER to be sticky.
|
822 |
|
|
|
823 |
|
|
2005-11-13: On-chip logic analyzer (LOGAN) support software did not
|
824 |
|
|
properly display non-binary aligned trace buffer widths.
|
825 |
|
|
|
826 |
|
|
2005-11-11: Wrong chip-select generated by SDRAM controller in
|
827 |
|
|
MCTRL for 512 Mbyte bank size
|
828 |
|
|
|
829 |
|
|
2005-11-09: Added VHDL version of Opencores CAN core;
|
830 |
|
|
|
831 |
|
|
2005-11-10: Nuhorizon spartan3 design no loner needs inverted
|
832 |
|
|
sdram clock due to improved clock generation
|
833 |
|
|
|
834 |
|
|
2005-10-25: Added spacewire support to GR-XC3S-1500 board and other
|
835 |
|
|
design templates
|
836 |
|
|
|
837 |
|
|
2005-10-25: Added GRSPW spacewire core with RMAP support
|
838 |
|
|
|
839 |
|
|
2005-10-24: Added AMBA wrappers for Actel 1553 BC/RT/BRM cores
|
840 |
|
|
|
841 |
|
|
2005-10-10: Extended default AMBA interrupt vector width to 32 bits
|
842 |
|
|
|
843 |
|
|
2005-10-10: Added template design for Gleichmann HPE-MINI Lattice board
|
844 |
|
|
|
845 |
|
|
2005-10-01: GRGPIO I/O port would drive all outputs on reset
|
846 |
|
|
if generic OEPOL = 1.
|
847 |
|
|
|
848 |
|
|
2005-09-30: leon3 test bench could fail due to unmasked interrupts
|
849 |
|
|
|
850 |
|
|
2005-09-28: updated altera clock generator to correctly calculate
|
851 |
|
|
clock period from frequency
|
852 |
|
|
|
853 |
|
|
2005-09-28: swapped read/write ports on altera syncram_2p to
|
854 |
|
|
work-around bug in Cyclone-2 fpgas
|
855 |
|
|
|
856 |
|
|
2005-09-20: Fixed faulty ip header checksum initialization for edcl
|
857 |
|
|
|
858 |
|
|
2005-09-19: virage ram model should not disable output when chip-select
|
859 |
|
|
is de-asserted
|
860 |
|
|
|
861 |
|
|
------------------- Release 1.0.3 -----------------------------------
|
862 |
|
|
|
863 |
|
|
2005-09-11: Updated Altera template designs to use new RAM mapping
|
864 |
|
|
|
865 |
|
|
2005-09-09: Added Altera RAM mapping (altsyncram)
|
866 |
|
|
|
867 |
|
|
2005-09-09: Added template design for Altera Cyclone Eval board
|
868 |
|
|
|
869 |
|
|
------------------- Release 1.0.2 -----------------------------------
|
870 |
|
|
|
871 |
|
|
2005-09-06: Worked around GHDL bug in gptimer, GHDL can now simulate
|
872 |
|
|
complete library and template designs
|
873 |
|
|
|
874 |
|
|
2005-09-06: Improved SMP control LEON3 SMP systems
|
875 |
|
|
|
876 |
|
|
2005-09-02: Improved LEON3 bus request generation for non-overhead
|
877 |
|
|
bus re-arbitration
|
878 |
|
|
|
879 |
|
|
2005-09-02: AHB arbiter now supports all transfer types according
|
880 |
|
|
to the AMBA standard.
|
881 |
|
|
|
882 |
|
|
2005-08-15: Added generation of ISE-7.1 project files
|
883 |
|
|
|
884 |
|
|
2005-07-26: New PS2 keyboard core
|
885 |
|
|
|
886 |
|
|
2005-07-26: New text-based VGA video controller
|
887 |
|
|
|
888 |
|
|
2005-07-08: New on-chip logic analyzer core
|
889 |
|
|
|
890 |
|
|
------------------- Release 1.0.1 -----------------------------------
|
891 |
|
|
|
892 |
|
|
2005-06-03: Allow local ram to be 512 Kbyte
|
893 |
|
|
|
894 |
|
|
2005-05-31: Allow cache set and local ram to be 256 Kbyte
|
895 |
|
|
|
896 |
|
|
2005-05-27: PCI device and vendor id were not handled as hex values
|
897 |
|
|
in template designs
|
898 |
|
|
|
899 |
|
|
2005-05-24: decrease block ram usage for DSU trace buffers on
|
900 |
|
|
virtex2 and spartan3 targets
|
901 |
|
|
|
902 |
|
|
2005-05-20: Leon3 MMU LRU replacement did not work correctly
|
903 |
|
|
|
904 |
|
|
2005-05-13: Fixed wrong bitgen parameters for gr-xc3s-1500 board
|
905 |
|
|
|
906 |
|
|
2005-05-13: removed absolute path to synplify in global makefile
|
907 |
|
|
|
908 |
|
|
------------------- Release 1.0.0 -----------------------------------
|
909 |
|
|
|
910 |
|
|
2005-04-20: Added individual interrupt force register to SMP irq controller
|
911 |
|
|
|
912 |
|
|
2005-04-20: Support and template design for GR-CPCI-AX AX/RTAX2000 board
|
913 |
|
|
|
914 |
|
|
2005-04-19: Support and template design for GR-XC3S-1500 spartan3 board
|
915 |
|
|
|
916 |
|
|
2005-04-08: Improved reset of LEON3 to allow gate-level simulation
|
917 |
|
|
|
918 |
|
|
2005-04-04: Added new leon3/grlib generic test bench
|
919 |
|
|
|
920 |
|
|
2005-03-30: Added IHP 0.25 um technology and template design
|
921 |
|
|
|
922 |
|
|
2005-03-24: Improved scripts for place&route with Actel Designer
|
923 |
|
|
|
924 |
|
|
2005-03-17: added support for Gleichmann HPE-MINI board + template design
|
925 |
|
|
|
926 |
|
|
2005-03-07: added interrupt filtering to GRGPIO module
|
927 |
|
|
|
928 |
|
|
2005-03-04: changed from 2 to 8 refresh cycles in sdctrl initialisation
|
929 |
|
|
|
930 |
|
|
2005-02-28: beta-0.16 released
|
931 |
|
|
|
932 |
|
|
2005-02-27: Added clock pad for xilinx devices
|
933 |
|
|
|
934 |
|
|
2005-02-23: Added support for AHB fixed lentgh bursts to LEON3
|
935 |
|
|
|
936 |
|
|
2005-01-09: Added macros for prom generation to board makefiles
|
937 |
|
|
|
938 |
|
|
2005-01-09: Added clock-specific pad
|
939 |
|
|
|
940 |
|
|
2005-01-09: Added tech port for RH-UMC 0.18 um
|
941 |
|
|
|
942 |
|
|
2004-12-26: Improved pad mapping for Xilinx parts
|
943 |
|
|
|
944 |
|
|
2004-12-26: Added byte enable signals to sram memory controllers.
|
945 |
|
|
|
946 |
|
|
2004-12-26: Added simulation models for 16-bit sram/prom with UB/LB
|
947 |
|
|
byte enable signals.
|
948 |
|
|
|
949 |
|
|
2004-12-24: Support for Avnet Spartan3 Evaluation board, adding board
|
950 |
|
|
templates and a leon3 reference design (leon3mp-avnet-3s1500).
|
951 |
|
|
|
952 |
|
|
2004-12-15: beta-0.15 released
|
953 |
|
|
|
954 |
|
|
2004-12-14: leon3 instruction scratch pad ram added
|
955 |
|
|
|
956 |
|
|
2004-12-14: Graphical GUI for implementation
|
957 |
|
|
|
958 |
|
|
2004-12-14: New makefile system
|
959 |
|
|
|
960 |
|
|
2004-12-14: leon3 MMU added
|
961 |
|
|
|
962 |
|
|
2004-12-14: Support for Quartus GUI including synthesis
|
963 |
|
|
|
964 |
|
|
2004-12-14: Support for Xilinx ISE project navigator
|
965 |
|
|
|
966 |
|
|
2004-12-05: Support for Altera PLL (altpll)
|
967 |
|
|
|
968 |
|
|
2004-11-19: OpenCores CAN core added
|
969 |
|
|
|
970 |
|
|
2004-11-01: leon3 diagnostic cache access failed for multi-set caches
|
971 |
|
|
|
972 |
|
|
2004-11-01: Added reset delay for Xilinx DCM/DLL to allow simulation
|
973 |
|
|
with Xilinx unisim models
|
974 |
|
|
|
975 |
|
|
2004-11-01: leon3 watchpoints were not properly reset
|
976 |
|
|
|
977 |
|
|
2004-10-27: leon3 power-down mode added
|
978 |
|
|
|
979 |
|
|
2004-10-27: Added CCSDS convolutional encoder/decoder IP
|
980 |
|
|
|
981 |
|
|
2004-10-11: ESA mctrl.vhd did not support brdyn streaching for ramsn(4)
|
982 |
|
|
in 8- and 16-bit bus configurations
|
983 |
|
|
|
984 |
|
|
2004-10-10: Removed Opencores PCI bridge since it doesn't fully work and
|
985 |
|
|
we have the Gaisler bridge anyway
|
986 |
|
|
|
987 |
|
|
2004-10-07: Add optional timing improvement to Actel AX regfile by
|
988 |
|
|
hardwiring read enable signals
|