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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [gaisler/] [ddr/] [ddrsp.in] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
 
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  mainmenu_option next_comment
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  comment 'DDR266 SDRAM controller             '
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    bool 'Enable DDR266 SDRAM controller       ' CONFIG_DDRSP
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    if [ "$CONFIG_DDRSP" = "y" ]; then
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      bool 'Enable power-on initialization       ' CONFIG_DDRSP_INIT
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      if [ "$CONFIG_DDRSP_INIT" = "y" ]; then
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        int 'Memory frequency (MHz)  ' CONFIG_DDRSP_FREQ 100
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        int 'Column address bits (9 - 12)  ' CONFIG_DDRSP_COL 9
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        int 'Chip select bank size (Mbyte) ' CONFIG_DDRSP_MBYTE 16
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      fi
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     if [ "$CONFIG_SYN_VIRTEX2" = "y" -o "$CONFIG_SYN_VIRTEX4" = "y" \
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        -o "$CONFIG_SYN_SPARTAN3" = "y" -o "$CONFIG_SYN_VIRTEX5" = "y" \
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        -o "$CONFIG_SYN_SPARTAN3E" = "y" -o "$CONFIG_SYN_CYCLONEIII" = "y" ]; then
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        int 'Read clock phase shift        ' CONFIG_DDRSP_RSKEW 0
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      fi
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    fi
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  endmenu

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