1 |
2 |
dimamali |
------------------------------------------------------------------------------
|
2 |
|
|
-- This file is a part of the GRLIB VHDL IP LIBRARY
|
3 |
|
|
-- Copyright (C) 2003, Gaisler Research
|
4 |
|
|
--
|
5 |
|
|
-- This program is free software; you can redistribute it and/or modify
|
6 |
|
|
-- it under the terms of the GNU General Public License as published by
|
7 |
|
|
-- the Free Software Foundation; either version 2 of the License, or
|
8 |
|
|
-- (at your option) any later version.
|
9 |
|
|
--
|
10 |
|
|
-- This program is distributed in the hope that it will be useful,
|
11 |
|
|
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
12 |
|
|
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
13 |
|
|
-- GNU General Public License for more details.
|
14 |
|
|
--
|
15 |
|
|
-- You should have received a copy of the GNU General Public License
|
16 |
|
|
-- along with this program; if not, write to the Free Software
|
17 |
|
|
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
18 |
|
|
-----------------------------------------------------------------------------
|
19 |
|
|
-- Entity: libcache
|
20 |
|
|
-- File: libcache.vhd
|
21 |
|
|
-- Author: Jiri Gaisler, Edvin Catovic, Gaisler Research
|
22 |
|
|
-- Description: Cache-related types and components
|
23 |
|
|
------------------------------------------------------------------------------
|
24 |
|
|
|
25 |
|
|
library ieee;
|
26 |
|
|
use ieee.std_logic_1164.all;
|
27 |
|
|
library grlib;
|
28 |
|
|
use grlib.amba.all;
|
29 |
|
|
use grlib.stdlib.all;
|
30 |
|
|
library techmap;
|
31 |
|
|
use techmap.gencomp.all;
|
32 |
|
|
library gaisler;
|
33 |
|
|
use gaisler.libiu.all;
|
34 |
|
|
use gaisler.mmuconfig.all;
|
35 |
|
|
use gaisler.mmuiface.all;
|
36 |
|
|
|
37 |
|
|
package libcache is
|
38 |
|
|
|
39 |
|
|
constant TAG_HIGH : integer := 31;
|
40 |
|
|
constant CTAG_LRRPOS : integer := 9;
|
41 |
|
|
constant CTAG_LOCKPOS : integer := 8;
|
42 |
|
|
constant MAXSETS : integer := 4;
|
43 |
|
|
|
44 |
|
|
-- 3-way set permutations
|
45 |
|
|
-- s012 => set 0 - least recently used
|
46 |
|
|
-- set 2 - most recently used
|
47 |
|
|
constant s012 : std_logic_vector(2 downto 0) := "000";
|
48 |
|
|
constant s021 : std_logic_vector(2 downto 0) := "001";
|
49 |
|
|
constant s102 : std_logic_vector(2 downto 0) := "010";
|
50 |
|
|
constant s120 : std_logic_vector(2 downto 0) := "011";
|
51 |
|
|
constant s201 : std_logic_vector(2 downto 0) := "100";
|
52 |
|
|
constant s210 : std_logic_vector(2 downto 0) := "101";
|
53 |
|
|
|
54 |
|
|
|
55 |
|
|
-- 4-way set permutations
|
56 |
|
|
-- s0123 => set 0 - least recently used
|
57 |
|
|
-- set 3 - most recently used
|
58 |
|
|
constant s0123 : std_logic_vector(4 downto 0) := "00000";
|
59 |
|
|
constant s0132 : std_logic_vector(4 downto 0) := "00001";
|
60 |
|
|
constant s0213 : std_logic_vector(4 downto 0) := "00010";
|
61 |
|
|
constant s0231 : std_logic_vector(4 downto 0) := "00011";
|
62 |
|
|
constant s0312 : std_logic_vector(4 downto 0) := "00100";
|
63 |
|
|
constant s0321 : std_logic_vector(4 downto 0) := "00101";
|
64 |
|
|
constant s1023 : std_logic_vector(4 downto 0) := "00110";
|
65 |
|
|
constant s1032 : std_logic_vector(4 downto 0) := "00111";
|
66 |
|
|
constant s1203 : std_logic_vector(4 downto 0) := "01000";
|
67 |
|
|
constant s1230 : std_logic_vector(4 downto 0) := "01001";
|
68 |
|
|
constant s1302 : std_logic_vector(4 downto 0) := "01010";
|
69 |
|
|
constant s1320 : std_logic_vector(4 downto 0) := "01011";
|
70 |
|
|
constant s2013 : std_logic_vector(4 downto 0) := "01100";
|
71 |
|
|
constant s2031 : std_logic_vector(4 downto 0) := "01101";
|
72 |
|
|
constant s2103 : std_logic_vector(4 downto 0) := "01110";
|
73 |
|
|
constant s2130 : std_logic_vector(4 downto 0) := "01111";
|
74 |
|
|
constant s2301 : std_logic_vector(4 downto 0) := "10000";
|
75 |
|
|
constant s2310 : std_logic_vector(4 downto 0) := "10001";
|
76 |
|
|
constant s3012 : std_logic_vector(4 downto 0) := "10010";
|
77 |
|
|
constant s3021 : std_logic_vector(4 downto 0) := "10011";
|
78 |
|
|
constant s3102 : std_logic_vector(4 downto 0) := "10100";
|
79 |
|
|
constant s3120 : std_logic_vector(4 downto 0) := "10101";
|
80 |
|
|
constant s3201 : std_logic_vector(4 downto 0) := "10110";
|
81 |
|
|
constant s3210 : std_logic_vector(4 downto 0) := "10111";
|
82 |
|
|
|
83 |
|
|
type lru_3set_table_vector_type is array(0 to 2) of std_logic_vector(2 downto 0);
|
84 |
|
|
type lru_3set_table_type is array (0 to 7) of lru_3set_table_vector_type;
|
85 |
|
|
|
86 |
|
|
constant lru_3set_table : lru_3set_table_type :=
|
87 |
|
|
( (s120, s021, s012), -- s012
|
88 |
|
|
(s210, s021, s012), -- s021
|
89 |
|
|
(s120, s021, s102), -- s102
|
90 |
|
|
(s120, s201, s102), -- s120
|
91 |
|
|
(s210, s201, s012), -- s201
|
92 |
|
|
(s210, s201, s102), -- s210
|
93 |
|
|
(s210, s201, s102), -- dummy
|
94 |
|
|
(s210, s201, s102) -- dummy
|
95 |
|
|
);
|
96 |
|
|
|
97 |
|
|
type lru_4set_table_vector_type is array(0 to 3) of std_logic_vector(4 downto 0);
|
98 |
|
|
type lru_4set_table_type is array(0 to 31) of lru_4set_table_vector_type;
|
99 |
|
|
|
100 |
|
|
constant lru_4set_table : lru_4set_table_type :=
|
101 |
|
|
( (s1230, s0231, s0132, s0123), -- s0123
|
102 |
|
|
(s1320, s0321, s0132, s0123), -- s0132
|
103 |
|
|
(s2130, s0231, s0132, s0213), -- s0213
|
104 |
|
|
(s2310, s0231, s0312, s0213), -- s0231
|
105 |
|
|
(s3120, s0321, s0312, s0123), -- s0312
|
106 |
|
|
(s3210, s0321, s0312, s0213), -- s0321
|
107 |
|
|
(s1230, s0231, s1032, s1023), -- s1023
|
108 |
|
|
(s1320, s0321, s1032, s1023), -- s1032
|
109 |
|
|
(s1230, s2031, s1032, s1203), -- s1203
|
110 |
|
|
(s1230, s2301, s1302, s1203), -- s1230
|
111 |
|
|
(s1320, s3021, s1302, s1023), -- s1302
|
112 |
|
|
(s1320, s3201, s1302, s1203), -- s1320
|
113 |
|
|
(s2130, s2031, s0132, s2013), -- s2013
|
114 |
|
|
(s2310, s2031, s0312, s2013), -- s2031
|
115 |
|
|
(s2130, s2031, s1032, s2103), -- s2103
|
116 |
|
|
(s2130, s2301, s1302, s2103), -- s2130
|
117 |
|
|
(s2310, s2301, s3012, s2013), -- s2301
|
118 |
|
|
(s2310, s2301, s3102, s2103), -- s2310
|
119 |
|
|
(s3120, s3021, s3012, s0123), -- s3012
|
120 |
|
|
(s3210, s3021, s3012, s0213), -- s3021
|
121 |
|
|
(s3120, s3021, s3102, s1023), -- s3102
|
122 |
|
|
(s3120, s3201, s3102, s1203), -- s3120
|
123 |
|
|
(s3210, s3201, s3012, s2013), -- s3201
|
124 |
|
|
(s3210, s3201, s3102, s2103), -- s3210
|
125 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
126 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
127 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
128 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
129 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
130 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
131 |
|
|
(s3210, s3201, s3102, s2103), -- dummy
|
132 |
|
|
(s3210, s3201, s3102, s2103) -- dummy
|
133 |
|
|
);
|
134 |
|
|
|
135 |
|
|
type lru3_repl_table_single_type is array(0 to 2) of integer range 0 to 2;
|
136 |
|
|
type lru3_repl_table_type is array(0 to 7) of lru3_repl_table_single_type;
|
137 |
|
|
|
138 |
|
|
constant lru3_repl_table : lru3_repl_table_type :=
|
139 |
|
|
( (0, 1, 2), -- s012
|
140 |
|
|
(0, 2, 2), -- s021
|
141 |
|
|
(1, 1, 2), -- s102
|
142 |
|
|
(1, 1, 2), -- s120
|
143 |
|
|
(2, 2, 2), -- s201
|
144 |
|
|
(2, 2, 2), -- s210
|
145 |
|
|
(2, 2, 2), -- dummy
|
146 |
|
|
(2, 2, 2) -- dummy
|
147 |
|
|
);
|
148 |
|
|
|
149 |
|
|
type lru4_repl_table_single_type is array(0 to 3) of integer range 0 to 3;
|
150 |
|
|
type lru4_repl_table_type is array(0 to 31) of lru4_repl_table_single_type;
|
151 |
|
|
|
152 |
|
|
constant lru4_repl_table : lru4_repl_table_type :=
|
153 |
|
|
( (0, 1, 2, 3), -- s0123
|
154 |
|
|
(0, 1, 3, 3), -- s0132
|
155 |
|
|
(0, 2, 2, 3), -- s0213
|
156 |
|
|
(0, 2, 2, 3), -- s0231
|
157 |
|
|
(0, 3, 3, 3), -- s0312
|
158 |
|
|
(0, 3, 3, 3), -- s0321
|
159 |
|
|
(1, 1, 2, 3), -- s1023
|
160 |
|
|
(1, 1, 3, 3), -- s1032
|
161 |
|
|
(1, 1, 2, 3), -- s1203
|
162 |
|
|
(1, 1, 2, 3), -- s1230
|
163 |
|
|
(1, 1, 3, 3), -- s1302
|
164 |
|
|
(1, 1, 3, 3), -- s1320
|
165 |
|
|
(2, 2, 2, 3), -- s2013
|
166 |
|
|
(2, 2, 2, 3), -- s2031
|
167 |
|
|
(2, 2, 2, 3), -- s2103
|
168 |
|
|
(2, 2, 2, 3), -- s2130
|
169 |
|
|
(2, 2, 2, 3), -- s2301
|
170 |
|
|
(2, 2, 2, 3), -- s2310
|
171 |
|
|
(3, 3, 3, 3), -- s3012
|
172 |
|
|
(3, 3, 3, 3), -- s3021
|
173 |
|
|
(3, 3, 3, 3), -- s3102
|
174 |
|
|
(3, 3, 3, 3), -- s3120
|
175 |
|
|
(3, 3, 3, 3), -- s3201
|
176 |
|
|
(3, 3, 3, 3), -- s3210
|
177 |
|
|
(0, 0, 0, 0), -- dummy
|
178 |
|
|
(0, 0, 0, 0), -- dummy
|
179 |
|
|
(0, 0, 0, 0), -- dummy
|
180 |
|
|
(0, 0, 0, 0), -- dummy
|
181 |
|
|
(0, 0, 0, 0), -- dummy
|
182 |
|
|
(0, 0, 0, 0), -- dummy
|
183 |
|
|
(0, 0, 0, 0), -- dummy
|
184 |
|
|
(0, 0, 0, 0) -- dummy
|
185 |
|
|
);
|
186 |
|
|
|
187 |
|
|
type ildram_in_type is record
|
188 |
|
|
enable : std_ulogic;
|
189 |
|
|
read : std_ulogic;
|
190 |
|
|
write : std_ulogic;
|
191 |
|
|
end record;
|
192 |
|
|
|
193 |
|
|
subtype ctxword is std_logic_vector(M_CTX_SZ-1 downto 0);
|
194 |
|
|
type ctxdatatype is array (0 to 3) of ctxword;
|
195 |
|
|
|
196 |
|
|
type icram_in_type is record
|
197 |
|
|
address : std_logic_vector(19 downto 0);
|
198 |
|
|
tag : cdatatype;
|
199 |
|
|
twrite : std_logic_vector(0 to 3);
|
200 |
|
|
tenable : std_ulogic;
|
201 |
|
|
flush : std_ulogic;
|
202 |
|
|
data : std_logic_vector(31 downto 0);
|
203 |
|
|
denable : std_ulogic;
|
204 |
|
|
dwrite : std_logic_vector(0 to 3);
|
205 |
|
|
ldramin : ildram_in_type;
|
206 |
|
|
ctx : std_logic_vector(M_CTX_SZ-1 downto 0);
|
207 |
|
|
tpar : cpartype;
|
208 |
|
|
dpar : std_logic_vector(3 downto 0);
|
209 |
|
|
end record;
|
210 |
|
|
|
211 |
|
|
type icram_out_type is record
|
212 |
|
|
tag : cdatatype;
|
213 |
|
|
data : cdatatype;
|
214 |
|
|
ctx : ctxdatatype;
|
215 |
|
|
tpar : cpartype;
|
216 |
|
|
dpar : cpartype;
|
217 |
|
|
end record;
|
218 |
|
|
|
219 |
|
|
type ldram_in_type is record
|
220 |
|
|
address : std_logic_vector(23 downto 2);
|
221 |
|
|
enable : std_ulogic;
|
222 |
|
|
read : std_ulogic;
|
223 |
|
|
write : std_ulogic;
|
224 |
|
|
end record;
|
225 |
|
|
|
226 |
|
|
type dcram_in_type is record
|
227 |
|
|
address : std_logic_vector(19 downto 0);
|
228 |
|
|
tag : cdatatype; --std_logic_vector(31 downto 0);
|
229 |
|
|
ptag : cdatatype; --std_logic_vector(31 downto 0);
|
230 |
|
|
twrite : std_logic_vector(0 to 3);
|
231 |
|
|
tpwrite : std_logic_vector(0 to 3);
|
232 |
|
|
tenable : std_logic_vector(0 to 3);
|
233 |
|
|
flush : std_ulogic;
|
234 |
|
|
data : cdatatype;
|
235 |
|
|
denable : std_logic_vector(0 to 3);
|
236 |
|
|
dwrite : std_logic_vector(0 to 3);
|
237 |
|
|
senable : std_logic_vector(0 to 3);
|
238 |
|
|
swrite : std_logic_vector(0 to 3);
|
239 |
|
|
saddress : std_logic_vector(19 downto 0);
|
240 |
|
|
stag : std_logic_vector(31 downto 0);
|
241 |
|
|
spar : std_logic;
|
242 |
|
|
ldramin : ldram_in_type;
|
243 |
|
|
ctx : ctxdatatype;
|
244 |
|
|
tpar : cpartype;
|
245 |
|
|
dpar : cpartype;
|
246 |
|
|
tdiag : std_logic_vector(3 downto 0);
|
247 |
|
|
ddiag : std_logic_vector(3 downto 0);
|
248 |
|
|
end record;
|
249 |
|
|
|
250 |
|
|
type dcram_out_type is record
|
251 |
|
|
tag : cdatatype;
|
252 |
|
|
data : cdatatype;
|
253 |
|
|
stag : cdatatype;
|
254 |
|
|
ctx : ctxdatatype;
|
255 |
|
|
tpar : cpartype; -- tag parity
|
256 |
|
|
dpar : cpartype; -- data parity
|
257 |
|
|
spar : std_logic_vector(3 downto 0); -- snoop tag parity
|
258 |
|
|
end record;
|
259 |
|
|
|
260 |
|
|
type cram_in_type is record
|
261 |
|
|
icramin : icram_in_type;
|
262 |
|
|
dcramin : dcram_in_type;
|
263 |
|
|
end record;
|
264 |
|
|
|
265 |
|
|
type cram_out_type is record
|
266 |
|
|
icramo : icram_out_type;
|
267 |
|
|
dcramo : dcram_out_type;
|
268 |
|
|
end record;
|
269 |
|
|
|
270 |
|
|
type memory_ic_in_type is record
|
271 |
|
|
address : std_logic_vector(31 downto 0); -- memory address
|
272 |
|
|
burst : std_ulogic; -- burst request
|
273 |
|
|
req : std_ulogic; -- memory cycle request
|
274 |
|
|
su : std_ulogic; -- supervisor address space
|
275 |
|
|
flush : std_ulogic; -- flush in progress
|
276 |
|
|
end record;
|
277 |
|
|
|
278 |
|
|
type memory_ic_out_type is record
|
279 |
|
|
data : std_logic_vector(31 downto 0); -- memory data
|
280 |
|
|
ready : std_ulogic; -- cycle ready
|
281 |
|
|
grant : std_ulogic; --
|
282 |
|
|
retry : std_ulogic; --
|
283 |
|
|
mexc : std_ulogic; -- memory exception
|
284 |
|
|
cache : std_ulogic; -- cacheable data
|
285 |
|
|
par : std_logic_vector(3 downto 0); -- parity
|
286 |
|
|
scanen : std_ulogic;
|
287 |
|
|
end record;
|
288 |
|
|
|
289 |
|
|
type memory_dc_in_type is record
|
290 |
|
|
address : std_logic_vector(31 downto 0);
|
291 |
|
|
data : std_logic_vector(31 downto 0);
|
292 |
|
|
asi : std_logic_vector(3 downto 0); -- ASI for load/store
|
293 |
|
|
size : std_logic_vector(1 downto 0);
|
294 |
|
|
burst : std_ulogic;
|
295 |
|
|
read : std_ulogic;
|
296 |
|
|
req : std_ulogic;
|
297 |
|
|
lock : std_ulogic;
|
298 |
|
|
cache : std_ulogic;
|
299 |
|
|
end record;
|
300 |
|
|
|
301 |
|
|
type memory_dc_out_type is record
|
302 |
|
|
data : std_logic_vector(31 downto 0); -- memory data
|
303 |
|
|
ready : std_ulogic; -- cycle ready
|
304 |
|
|
grant : std_ulogic;
|
305 |
|
|
retry : std_ulogic;
|
306 |
|
|
mexc : std_ulogic; -- memory exception
|
307 |
|
|
werr : std_ulogic; -- memory write error
|
308 |
|
|
cache : std_ulogic; -- cacheable data
|
309 |
|
|
ba : std_ulogic; -- bus active (used for snooping)
|
310 |
|
|
bg : std_ulogic; -- bus grant (used for snooping)
|
311 |
|
|
par : std_logic_vector(3 downto 0); -- parity
|
312 |
|
|
scanen : std_ulogic;
|
313 |
|
|
testen : std_ulogic;
|
314 |
|
|
end record;
|
315 |
|
|
|
316 |
|
|
constant rnd : integer := 2;
|
317 |
|
|
constant lrr : integer := 1;
|
318 |
|
|
constant lru : integer := 0;
|
319 |
|
|
type cache_replalgbits_type is array (0 to 2) of integer;
|
320 |
|
|
constant creplalg_tbl : cache_replalgbits_type := (0, 1, 0);
|
321 |
|
|
type lru_bits_type is array(1 to 4) of integer;
|
322 |
|
|
constant lru_table : lru_bits_type := (1,1,3,5);
|
323 |
|
|
|
324 |
|
|
component acache
|
325 |
|
|
generic (
|
326 |
|
|
hindex : integer range 0 to NAHBMST-1 := 0;
|
327 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
328 |
|
|
cached : integer := 0;
|
329 |
|
|
clk2x : integer := 0;
|
330 |
|
|
scantest : integer := 0);
|
331 |
|
|
port (
|
332 |
|
|
rst : in std_ulogic;
|
333 |
|
|
clk : in std_ulogic;
|
334 |
|
|
mcii : in memory_ic_in_type;
|
335 |
|
|
mcio : out memory_ic_out_type;
|
336 |
|
|
mcdi : in memory_dc_in_type;
|
337 |
|
|
mcdo : out memory_dc_out_type;
|
338 |
|
|
ahbi : in ahb_mst_in_type;
|
339 |
|
|
ahbo : out ahb_mst_out_type;
|
340 |
|
|
ahbso : in ahb_slv_out_vector;
|
341 |
|
|
hclken : in std_ulogic
|
342 |
|
|
);
|
343 |
|
|
end component;
|
344 |
|
|
|
345 |
|
|
component dcache
|
346 |
|
|
generic (
|
347 |
|
|
dsu : integer range 0 to 1 := 0;
|
348 |
|
|
dcen : integer range 0 to 1 := 0;
|
349 |
|
|
drepl : integer range 0 to 2 := 0;
|
350 |
|
|
dsets : integer range 1 to 4 := 1;
|
351 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
352 |
|
|
dsetsize : integer range 1 to 256 := 1;
|
353 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
354 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
355 |
|
|
dlram : integer range 0 to 1 := 0;
|
356 |
|
|
dlramsize : integer range 1 to 512 := 1;
|
357 |
|
|
dlramstart : integer range 0 to 255 := 16#8f#;
|
358 |
|
|
ilram : integer range 0 to 1 := 0;
|
359 |
|
|
ilramstart : integer range 0 to 255 := 16#8e#;
|
360 |
|
|
memtech : integer range 0 to NTECH := 0;
|
361 |
|
|
cached : integer := 0);
|
362 |
|
|
port (
|
363 |
|
|
rst : in std_ulogic;
|
364 |
|
|
clk : in std_ulogic;
|
365 |
|
|
dci : in dcache_in_type;
|
366 |
|
|
dco : out dcache_out_type;
|
367 |
|
|
ico : in icache_out_type;
|
368 |
|
|
mcdi : out memory_dc_in_type;
|
369 |
|
|
mcdo : in memory_dc_out_type;
|
370 |
|
|
ahbsi : in ahb_slv_in_type;
|
371 |
|
|
dcrami : out dcram_in_type;
|
372 |
|
|
dcramo : in dcram_out_type;
|
373 |
|
|
fpuholdn : in std_ulogic;
|
374 |
|
|
sclk : in std_ulogic
|
375 |
|
|
);
|
376 |
|
|
end component;
|
377 |
|
|
|
378 |
|
|
component icache
|
379 |
|
|
generic (
|
380 |
|
|
icen : integer range 0 to 1 := 0;
|
381 |
|
|
irepl : integer range 0 to 2 := 0;
|
382 |
|
|
isets : integer range 1 to 4 := 1;
|
383 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
384 |
|
|
isetsize : integer range 1 to 256 := 1;
|
385 |
|
|
isetlock : integer range 0 to 1 := 0;
|
386 |
|
|
lram : integer range 0 to 1 := 0;
|
387 |
|
|
lramsize : integer range 1 to 512 := 1;
|
388 |
|
|
lramstart : integer range 0 to 255 := 16#8e#);
|
389 |
|
|
port (
|
390 |
|
|
rst : in std_ulogic;
|
391 |
|
|
clk : in std_ulogic;
|
392 |
|
|
ici : in icache_in_type;
|
393 |
|
|
ico : out icache_out_type;
|
394 |
|
|
dci : in dcache_in_type;
|
395 |
|
|
dco : in dcache_out_type;
|
396 |
|
|
mcii : out memory_ic_in_type;
|
397 |
|
|
mcio : in memory_ic_out_type;
|
398 |
|
|
icrami : out icram_in_type;
|
399 |
|
|
icramo : in icram_out_type;
|
400 |
|
|
fpuholdn : in std_ulogic);
|
401 |
|
|
end component;
|
402 |
|
|
|
403 |
|
|
component cache
|
404 |
|
|
generic (
|
405 |
|
|
hindex : integer := 0;
|
406 |
|
|
dsu : integer range 0 to 1 := 0;
|
407 |
|
|
icen : integer range 0 to 1 := 0;
|
408 |
|
|
irepl : integer range 0 to 2 := 0;
|
409 |
|
|
isets : integer range 1 to 4 := 1;
|
410 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
411 |
|
|
isetsize : integer range 1 to 256:= 1;
|
412 |
|
|
isetlock : integer range 0 to 1 := 0;
|
413 |
|
|
dcen : integer range 0 to 1 := 0;
|
414 |
|
|
drepl : integer range 0 to 2 := 0;
|
415 |
|
|
dsets : integer range 1 to 4 := 1;
|
416 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
417 |
|
|
dsetsize : integer range 1 to 256:= 1;
|
418 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
419 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
420 |
|
|
ilram : integer range 0 to 1 := 0;
|
421 |
|
|
ilramsize : integer range 1 to 512 := 1;
|
422 |
|
|
ilramstart : integer range 0 to 255 := 16#8e#;
|
423 |
|
|
dlram : integer range 0 to 1 := 0;
|
424 |
|
|
dlramsize : integer range 1 to 512 := 1;
|
425 |
|
|
dlramstart : integer range 0 to 255 := 16#8f#;
|
426 |
|
|
cached : integer := 0;
|
427 |
|
|
clk2x : integer := 0;
|
428 |
|
|
memtech : integer range 0 to NTECH := 0;
|
429 |
|
|
scantest : integer := 0);
|
430 |
|
|
port (
|
431 |
|
|
rst : in std_ulogic;
|
432 |
|
|
clk : in std_ulogic;
|
433 |
|
|
ici : in icache_in_type;
|
434 |
|
|
ico : out icache_out_type;
|
435 |
|
|
dci : in dcache_in_type;
|
436 |
|
|
dco : out dcache_out_type;
|
437 |
|
|
ahbi : in ahb_mst_in_type;
|
438 |
|
|
ahbo : out ahb_mst_out_type;
|
439 |
|
|
ahbsi : in ahb_slv_in_type;
|
440 |
|
|
ahbso : in ahb_slv_out_vector;
|
441 |
|
|
crami : out cram_in_type;
|
442 |
|
|
cramo : in cram_out_type;
|
443 |
|
|
fpuholdn : in std_ulogic;
|
444 |
|
|
hclk, sclk : in std_ulogic;
|
445 |
|
|
hclken : in std_ulogic
|
446 |
|
|
);
|
447 |
|
|
end component;
|
448 |
|
|
|
449 |
|
|
component cachemem
|
450 |
|
|
generic (
|
451 |
|
|
tech : integer range 0 to NTECH := 0;
|
452 |
|
|
icen : integer range 0 to 1 := 0;
|
453 |
|
|
irepl : integer range 0 to 2 := 0;
|
454 |
|
|
isets : integer range 1 to 4 := 1;
|
455 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
456 |
|
|
isetsize : integer range 1 to 256 := 1;
|
457 |
|
|
isetlock : integer range 0 to 1 := 0;
|
458 |
|
|
dcen : integer range 0 to 1 := 0;
|
459 |
|
|
drepl : integer range 0 to 2 := 0;
|
460 |
|
|
dsets : integer range 1 to 4 := 1;
|
461 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
462 |
|
|
dsetsize : integer range 1 to 256 := 1;
|
463 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
464 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
465 |
|
|
ilram : integer range 0 to 1 := 0;
|
466 |
|
|
ilramsize : integer range 1 to 512 := 1;
|
467 |
|
|
dlram : integer range 0 to 1 := 0;
|
468 |
|
|
dlramsize : integer range 1 to 512 := 1;
|
469 |
|
|
mmuen : integer range 0 to 1 := 0
|
470 |
|
|
);
|
471 |
|
|
port (
|
472 |
|
|
clk : in std_ulogic;
|
473 |
|
|
crami : in cram_in_type;
|
474 |
|
|
cramo : out cram_out_type;
|
475 |
|
|
sclk : in std_ulogic
|
476 |
|
|
);
|
477 |
|
|
end component;
|
478 |
|
|
|
479 |
|
|
-- mmu versions
|
480 |
|
|
component mmu_acache
|
481 |
|
|
generic (
|
482 |
|
|
hindex : integer range 0 to NAHBMST-1 := 0;
|
483 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
484 |
|
|
cached : integer := 0;
|
485 |
|
|
clk2x : integer := 0;
|
486 |
|
|
scantest : integer := 0);
|
487 |
|
|
port (
|
488 |
|
|
rst : in std_logic;
|
489 |
|
|
clk : in std_logic;
|
490 |
|
|
mcii : in memory_ic_in_type;
|
491 |
|
|
mcio : out memory_ic_out_type;
|
492 |
|
|
mcdi : in memory_dc_in_type;
|
493 |
|
|
mcdo : out memory_dc_out_type;
|
494 |
|
|
mcmmi : in memory_mm_in_type;
|
495 |
|
|
mcmmo : out memory_mm_out_type;
|
496 |
|
|
ahbi : in ahb_mst_in_type;
|
497 |
|
|
ahbo : out ahb_mst_out_type;
|
498 |
|
|
ahbso : in ahb_slv_out_vector;
|
499 |
|
|
hclken : in std_ulogic
|
500 |
|
|
);
|
501 |
|
|
end component;
|
502 |
|
|
|
503 |
|
|
component mmu_icache
|
504 |
|
|
generic (
|
505 |
|
|
irepl : integer range 0 to 2 := 0;
|
506 |
|
|
isets : integer range 1 to 4 := 1;
|
507 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
508 |
|
|
isetsize : integer range 1 to 256 := 1;
|
509 |
|
|
isetlock : integer range 0 to 1 := 0
|
510 |
|
|
);
|
511 |
|
|
port (
|
512 |
|
|
rst : in std_logic;
|
513 |
|
|
clk : in std_logic;
|
514 |
|
|
ici : in icache_in_type;
|
515 |
|
|
ico : out icache_out_type;
|
516 |
|
|
dci : in dcache_in_type;
|
517 |
|
|
dco : in dcache_out_type;
|
518 |
|
|
mcii : out memory_ic_in_type;
|
519 |
|
|
mcio : in memory_ic_out_type;
|
520 |
|
|
icrami : out icram_in_type;
|
521 |
|
|
icramo : in icram_out_type;
|
522 |
|
|
fpuholdn : in std_logic;
|
523 |
|
|
mmudci : in mmudc_in_type;
|
524 |
|
|
mmuici : out mmuic_in_type;
|
525 |
|
|
mmuico : in mmuic_out_type
|
526 |
|
|
);
|
527 |
|
|
end component;
|
528 |
|
|
|
529 |
|
|
component mmu_dcache
|
530 |
|
|
generic (
|
531 |
|
|
dsu : integer range 0 to 1 := 0;
|
532 |
|
|
drepl : integer range 0 to 2 := 0;
|
533 |
|
|
dsets : integer range 1 to 4 := 1;
|
534 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
535 |
|
|
dsetsize : integer range 1 to 256 := 1;
|
536 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
537 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
538 |
|
|
itlbnum : integer range 2 to 64 := 8;
|
539 |
|
|
dtlbnum : integer range 2 to 64 := 8;
|
540 |
|
|
tlb_type : integer range 0 to 3 := 1;
|
541 |
|
|
memtech : integer range 0 to NTECH := 0;
|
542 |
|
|
cached : integer := 0);
|
543 |
|
|
port (
|
544 |
|
|
rst : in std_logic;
|
545 |
|
|
clk : in std_logic;
|
546 |
|
|
dci : in dcache_in_type;
|
547 |
|
|
dco : out dcache_out_type;
|
548 |
|
|
ico : in icache_out_type;
|
549 |
|
|
mcdi : out memory_dc_in_type;
|
550 |
|
|
mcdo : in memory_dc_out_type;
|
551 |
|
|
ahbsi : in ahb_slv_in_type;
|
552 |
|
|
dcrami : out dcram_in_type;
|
553 |
|
|
dcramo : in dcram_out_type;
|
554 |
|
|
fpuholdn : in std_logic;
|
555 |
|
|
mmudci : out mmudc_in_type;
|
556 |
|
|
mmudco : in mmudc_out_type;
|
557 |
|
|
sclk : in std_ulogic
|
558 |
|
|
);
|
559 |
|
|
end component;
|
560 |
|
|
|
561 |
|
|
component mmu_cache
|
562 |
|
|
generic (
|
563 |
|
|
hindex : integer := 0;
|
564 |
|
|
memtech : integer range 0 to NTECH := 0;
|
565 |
|
|
dsu : integer range 0 to 1 := 0;
|
566 |
|
|
icen : integer range 0 to 1 := 0;
|
567 |
|
|
irepl : integer range 0 to 2 := 0;
|
568 |
|
|
isets : integer range 1 to 4 := 1;
|
569 |
|
|
ilinesize : integer range 4 to 8 := 4;
|
570 |
|
|
isetsize : integer range 1 to 256 := 1;
|
571 |
|
|
isetlock : integer range 0 to 1 := 0;
|
572 |
|
|
dcen : integer range 0 to 1 := 0;
|
573 |
|
|
drepl : integer range 0 to 2 := 0;
|
574 |
|
|
dsets : integer range 1 to 4 := 1;
|
575 |
|
|
dlinesize : integer range 4 to 8 := 4;
|
576 |
|
|
dsetsize : integer range 1 to 256 := 1;
|
577 |
|
|
dsetlock : integer range 0 to 1 := 0;
|
578 |
|
|
dsnoop : integer range 0 to 6 := 0;
|
579 |
|
|
itlbnum : integer range 2 to 64 := 8;
|
580 |
|
|
dtlbnum : integer range 2 to 64 := 8;
|
581 |
|
|
tlb_type : integer range 0 to 3 := 1;
|
582 |
|
|
tlb_rep : integer range 0 to 1 := 0;
|
583 |
|
|
cached : integer := 0;
|
584 |
|
|
clk2x : integer := 0;
|
585 |
|
|
scantest : integer := 0);
|
586 |
|
|
port (
|
587 |
|
|
rst : in std_ulogic;
|
588 |
|
|
clk : in std_ulogic;
|
589 |
|
|
ici : in icache_in_type;
|
590 |
|
|
ico : out icache_out_type;
|
591 |
|
|
dci : in dcache_in_type;
|
592 |
|
|
dco : out dcache_out_type;
|
593 |
|
|
ahbi : in ahb_mst_in_type;
|
594 |
|
|
ahbo : out ahb_mst_out_type;
|
595 |
|
|
ahbsi : in ahb_slv_in_type;
|
596 |
|
|
ahbso : in ahb_slv_out_vector;
|
597 |
|
|
crami : out cram_in_type;
|
598 |
|
|
cramo : in cram_out_type;
|
599 |
|
|
fpuholdn : in std_ulogic;
|
600 |
|
|
hclk, sclk : in std_ulogic;
|
601 |
|
|
hclken : in std_ulogic
|
602 |
|
|
);
|
603 |
|
|
end component;
|
604 |
|
|
|
605 |
|
|
component clk2xqual
|
606 |
|
|
port (
|
607 |
|
|
rst : in std_ulogic;
|
608 |
|
|
clk : in std_ulogic;
|
609 |
|
|
clk2 : in std_ulogic;
|
610 |
|
|
clken : out std_ulogic);
|
611 |
|
|
end component;
|
612 |
|
|
|
613 |
|
|
component clk2xsync
|
614 |
|
|
generic (hindex : integer := 0;
|
615 |
|
|
clk2x : integer := 1);
|
616 |
|
|
port (
|
617 |
|
|
rst : in std_ulogic;
|
618 |
|
|
hclk : in std_ulogic;
|
619 |
|
|
clk : in std_ulogic;
|
620 |
|
|
ahbi : in ahb_mst_in_type;
|
621 |
|
|
ahbi2 : out ahb_mst_in_type;
|
622 |
|
|
ahbo : in ahb_mst_out_type;
|
623 |
|
|
ahbo2 : out ahb_mst_out_type;
|
624 |
|
|
ahbsi : in ahb_slv_in_type;
|
625 |
|
|
ahbsi2 : out ahb_slv_in_type;
|
626 |
|
|
mcii : in memory_ic_in_type;
|
627 |
|
|
mcdi : in memory_dc_in_type;
|
628 |
|
|
mcdo : in memory_dc_out_type;
|
629 |
|
|
mmreq : in std_ulogic;
|
630 |
|
|
mmgrant: in std_ulogic;
|
631 |
|
|
hclken : in std_ulogic
|
632 |
|
|
);
|
633 |
|
|
end component;
|
634 |
|
|
|
635 |
|
|
function cache_cfg(repl, sets, linesize, setsize, lock, snoop,
|
636 |
|
|
lram, lramsize, lramstart, mmuen : integer) return std_logic_vector;
|
637 |
|
|
|
638 |
|
|
end;
|
639 |
|
|
|
640 |
|
|
package body libcache is
|
641 |
|
|
|
642 |
|
|
function cache_cfg(repl, sets, linesize, setsize, lock, snoop,
|
643 |
|
|
lram, lramsize, lramstart, mmuen : integer) return std_logic_vector is
|
644 |
|
|
variable cfg : std_logic_vector(31 downto 0);
|
645 |
|
|
begin
|
646 |
|
|
cfg := (others => '0');
|
647 |
|
|
cfg(31 downto 31) := conv_std_logic_vector(lock, 1);
|
648 |
|
|
cfg(30 downto 28) := conv_std_logic_vector(repl+1, 3);
|
649 |
|
|
if snoop /= 0 then cfg(27) := '1'; end if;
|
650 |
|
|
--cfg(27 downto 27) := conv_std_logic_vector(snoop, 1);
|
651 |
|
|
cfg(26 downto 24) := conv_std_logic_vector(sets-1, 3);
|
652 |
|
|
cfg(23 downto 20) := conv_std_logic_vector(log2(setsize), 4);
|
653 |
|
|
cfg(19 downto 19) := conv_std_logic_vector(lram, 1);
|
654 |
|
|
cfg(18 downto 16) := conv_std_logic_vector(log2(linesize), 3);
|
655 |
|
|
cfg(15 downto 12) := conv_std_logic_vector(log2(lramsize), 4);
|
656 |
|
|
cfg(11 downto 4) := conv_std_logic_vector(lramstart, 8);
|
657 |
|
|
cfg(3 downto 3) := conv_std_logic_vector(mmuen, 1);
|
658 |
|
|
return(cfg);
|
659 |
|
|
end;
|
660 |
|
|
end;
|