URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [gaisler/] [pci/] [pcitb_monitor.vhd] - Blame information for rev 2

Details | Compare with Previous | View Log


------------------------------------------------------------------------------
--  This file is a part of the GRLIB VHDL IP LIBRARY
--  Copyright (C) 2003, Gaisler Research
--
--  This program is free software; you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation; either version 2 of the License, or
--  (at your option) any later version.
--
--  This program is distributed in the hope that it will be useful,
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--  GNU General Public License for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with this program; if not, write to the Free Software
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
-----------------------------------------------------------------------------
-- Entity:      pcitb_monitor
-- File:        pcitb_monitor.vhd
-- Author:      Alf Vaerneus, Gaisler Research
-- Description: PCI Monitor.
------------------------------------------------------------------------------
 
-- pragma translate_off
 
library ieee;
use ieee.std_logic_1164.all;
 
library gaisler;
use gaisler.pcitb.all;
use gaisler.ambatest.all;
library grlib;
use grlib.stdlib.xorv;
 
 
entity pcitb_monitor is
  generic (dbglevel : integer := 1);
  port (pciin     : in pci_type);
end pcitb_monitor;
 
architecture tb of pcitb_monitor is
 
constant T_O : integer := 9;
 
type pci_array_type is array(0 to 2) of pci_type;
 
type reg_type is record
  pci : pci_array_type;
  frame_deass : boolean;
  m_wait_data_phase : boolean;
  t_wait_data_phase : boolean;
  stop_asserted : boolean;
  device_sel : boolean;
  first : boolean;
  current_master : integer;
  master_cnt : integer;
  irdy_cnt : integer;
  trdy_cnt : integer;
end record;
 
signal r,rin : reg_type;
signal init_done : boolean := false;
 
begin
 
  init : process
  begin
    if init_done = false then
      wait until pciin.syst.rst = '0';
      wait until pciin.syst.rst = '1';
      init_done <= true;
    else
      wait until pciin.syst.rst = '0';
      init_done <= false;
    end if;
  end process;
 
 
  comb : process(pciin)
  variable i : integer;
  variable v : reg_type;
  begin
    v := r;
    v.pci(0) := pciin; v.pci(1) := r.pci(0); v.pci(2) := r.pci(1);
 
    if r.pci(0).ifc.frame = 'H' then v.frame_deass := false;
    elsif (r.pci(0).ifc.frame and not r.pci(1).ifc.frame) = '1' then  v.frame_deass := true; end if;
 
    if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) or r.pci(0).ifc.irdy) = '0' then v.m_wait_data_phase := false;
    elsif r.pci(0).ifc.irdy = '0' then v.m_wait_data_phase := true; end if;
 
    if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) or r.pci(0).ifc.irdy) = '0' then v.t_wait_data_phase := false;
    elsif (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '0' then v.t_wait_data_phase := true; end if;
 
    if r.pci(0).ifc.frame = '0' and r.pci(1).ifc.frame = 'H' then
      for i in 0 to 20 loop
        if r.pci(0).arb.gnt(i) = '0' then v.current_master := i; end if;
      end loop;
    end if;
 
    if (r.pci(0).ifc.frame and r.pci(0).ifc.irdy) = '0' then
      if (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '1' then
        v.master_cnt := r.master_cnt+1;
      else v.master_cnt := 0; end if;
    else v.master_cnt := 0; end if;
 
 
    if (r.pci(0).ifc.irdy and not r.pci(0).ifc.frame) = '1' then
      v.irdy_cnt := r.irdy_cnt+1;
    else v.irdy_cnt := 0; end if;
 
    if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) and not (r.pci(0).ifc.frame and r.pci(0).ifc.irdy)) = '1' then
      v.trdy_cnt := r.trdy_cnt+1;
    else v.trdy_cnt := 0; end if;
 
    if r.pci(0).ifc.devsel = '0' then v.device_sel := true;
    elsif (to_x01(r.pci(1).ifc.devsel) and not (r.pci(0).ifc.frame and r.pci(0).ifc.irdy)) = '1' then v.device_sel := false; end if;
 
    if r.pci(0).ifc.stop = '0' then v.stop_asserted := true;
    elsif r.pci(0).ifc.frame = '0' then v.stop_asserted := false; end if;
 
    if (r.pci(1).ifc.frame = 'H' and r.pci(0).ifc.frame = '0') then v.first := true;
    elsif (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '0' then v.first := false; end if;
 
    rin <= v;
  end process;
 
  clkprc : process(pciin.syst)
  begin
    if rising_edge(pciin.syst.clk) then
      r <= rin;
 
      if init_done then
 
        if (r.pci(0).ifc.frame = '0' and r.frame_deass = true) then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: FRAME# was reasserted during the same transaction.");
          end if;
        end if;
 
        if (r.pci(0).ifc.frame and r.pci(0).ifc.irdy and not r.pci(1).ifc.frame) = '1' then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: FRAME# was deasserted without IRDY# asserted.");
          end if;
        end if;
 
        if (r.m_wait_data_phase and r.device_sel) then
          if (r.pci(0).ifc.frame /= r.pci(1).ifc.frame) or (r.pci(0).ifc.irdy /= r.pci(1).ifc.irdy) then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Current master changed IRDY# or FRAME# before current data phase was completed.");
            end if;
          end if;
        end if;
 
        if ((r.pci(1).ifc.irdy and r.pci(1).ifc.frame and not r.pci(2).ifc.irdy) = '1' and r.stop_asserted = true) then
          if not ((r.pci(1).arb.req(r.current_master) and (r.pci(0).arb.req(r.current_master) or r.pci(2).arb.req(r.current_master))) = '1') then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Current master at slot %d did not release its REQ# when the bus returned to idle state.",r.current_master);
            end if;
          end if;
        end if;
 
        if (r.pci(0).ifc.stop and not r.pci(1).ifc.stop and not r.pci(0).ifc.frame) = '1' then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Target did not keep STOP# asserted until FRAME# was deasserted.");
          end if;
        end if;
 
        if (r.pci(0).ifc.frame and r.pci(1).ifc.frame and not r.pci(0).ifc.stop and not r.pci(1).ifc.stop) = '1' then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Target did not release STOP# after FRAME# was deasserted.");
          end if;
        end if;
 
        if r.t_wait_data_phase = true then
          if (r.pci(0).ifc.devsel /= r.pci(1).ifc.devsel) or (r.pci(0).ifc.trdy /= r.pci(1).ifc.trdy) or (r.pci(0).ifc.stop /= r.pci(1).ifc.stop) then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Current target changed DEVSEL#, STOP# or TRDY# before current data phase was completed.");
            end if;
          end if;
        end if;
 
        if (r.pci(0).ifc.frame and r.pci(0).ifc.stop and not r.pci(1).ifc.frame and not r.pci(1).ifc.stop) = '1' then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Target did not keep STOP# asserted until the last data phase.");
          end if;
        end if;
 
        if (r.pci(2).ifc.frame and not (r.pci(2).ifc.trdy and r.pci(2).ifc.stop)) = '1' then
          if r.pci(1).ifc.irdy = '0' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Master kept IRDY# asserted after last data phase.");
            end if;
          end if;
          if r.pci(1).ifc.trdy = '0' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Target kept TRDY# asserted after last data phase.");
            end if;
          end if;
          if r.pci(1).ifc.stop = '0' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Target kept STOP# asserted after last data phase.");
            end if;
          end if;
          if r.pci(1).ifc.frame /= 'H' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Master did not tri-state FRAME# after turn-around cycle.");
            end if;
          end if;
          if r.pci(0).ifc.irdy /= 'H' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Master did not tri-state IRDY# after turn-around cycle.");
            end if;
          end if;
          if r.pci(0).ifc.trdy /= 'H' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Target did not tri-state TRDY# after turn-around cycle.");
            end if;
          end if;
          if r.pci(0).ifc.stop /= 'H' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Target did not tri-state STOP# after turn-around cycle.");
            end if;
          end if;
        end if;
 
        if (r.master_cnt > 16 and r.first = true) then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Target did not complete its initial data phase in 16 clkc.");
          end if;
        end if;
 
        if r.irdy_cnt > 8 then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Master did not complete its initial data phase in 8 clkc.");
          end if;
        end if;
 
        if (r.trdy_cnt > 8 and r.device_sel = true and r.first = false) then
          if dbglevel > 0 then
            assert false
            report "***PCI ERROR***"
            severity warning;
            printf("PCI_MONITOR: Target did not complete a data phase in 8 clkc.");
          end if;
        end if;
 
        if not r.device_sel then
          if (r.pci(0).ifc.irdy and not r.pci(1).ifc.irdy) = '1' then
            if dbglevel > 0 then
              assert false
              report "**"
              severity note;
              printf("PCI_MONITOR: Master abort detected.");
            end if;
          end if;
        end if;
 
        if ((r.pci(1).ifc.irdy = 'H' and r.pci(1).ifc.frame = '0')
        or (r.pci(1).ifc.irdy or r.pci(1).ifc.trdy) = '0') then
          if r.pci(0).ad.par = 'Z' then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Current Master/Target is not generating parity during a data phase.");
            end if;
          elsif r.pci(0).ad.par /= xorv(r.pci(1).ad.ad & r.pci(1).ad.cbe) then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: Parity error detected.");
            end if;
          end if;
        end if;
 
      end if;
 
    end if;
  end process;
 
  adchk : process(pciin.ad)
  begin
 
    if init_done then
 
--      for i in 0 to 31 loop
--        if pciin.ad.ad(i) = 'X' then
--          if dbglevel > 0 then
--            assert false
--            report " **"
--            severity warning;
--            printf("PCI_MONITOR: AD lines have multiple drivers.");
--          end if;
--        end if;
--      end loop;
 
      for i in 0 to 3 loop
        if pciin.ad.cbe(i) = 'X' then
          if dbglevel > 0 then
            assert false
            report " **"
            severity warning;
            printf("PCI_MONITOR: CBE# lines have multiple drivers.");
          end if;
        end if;
      end loop;
 
--      if pciin.ad.par = 'X' then
--        if dbglevel > 0 then
--          assert false
--          report " **"
--          severity warning;
--          printf("PCI_MONITOR: PAR line has multiple drivers.");
--        end if;
--      end if;
 
    end if;
 
  end process;
 
  ifcchk : process(pciin.ifc)
  begin
 
    if init_done then
 
      if pciin.ifc.frame = 'X' then
        if dbglevel > 0 then
          assert false
          report " **"
          severity warning;
          printf("PCI_MONITOR: FRAME# line has multiple drivers.");
        end if;
      end if;
      if pciin.ifc.irdy = 'X' then
        if dbglevel > 0 then
          assert false
          report " **"
          severity warning;
          printf("PCI_MONITOR: IRDY# line has multiple drivers.");
        end if;
      end if;
      if pciin.ifc.trdy = 'X' then
        if dbglevel > 0 then
          assert false
          report " **"
          severity warning;
          printf("PCI_MONITOR: TRDY# line has multiple drivers.");
        end if;
      end if;
      if pciin.ifc.stop = 'X' then
        if dbglevel > 0 then
          assert false
          report " **"
          severity warning;
          printf("PCI_MONITOR: STOP# line has multiple drivers.");
        end if;
      end if;
      if pciin.ifc.devsel = 'X' then
        if dbglevel > 0 then
          assert false
          report " **"
          severity warning;
          printf("PCI_MONITOR: DEVSEL# line has multiple drivers.");
        end if;
      end if;
 
    end if;
 
  end process;
 
  arbchk : process(pciin.arb)
  variable gnt_set : boolean;
  begin
    gnt_set := false;
 
    if init_done then
 
      for i in 0 to 20 loop
        if pciin.arb.gnt(i) = '0' then
          if gnt_set then
            if dbglevel > 0 then
              assert false
              report "***PCI ERROR***"
              severity warning;
              printf("PCI_MONITOR: GNT# is asserted for more than one PCI master.");
            end if;
          else gnt_set := true; end if;
        end if;
      end loop;
 
    end if;
 
  end process;
 
end;
 
-- pragma translate_on

Browse

Tools

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [gaisler/] [pci/] [pcitb_monitor.vhd] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	dimamali	`------------------------------------------------------------------------------`
2			`-- This file is a part of the GRLIB VHDL IP LIBRARY`
3			`-- Copyright (C) 2003, Gaisler Research`
4			`--`
5			`-- This program is free software; you can redistribute it and/or modify`
6			`-- it under the terms of the GNU General Public License as published by`
7			`-- the Free Software Foundation; either version 2 of the License, or`
8			`-- (at your option) any later version.`
9			`--`
10			`-- This program is distributed in the hope that it will be useful,`
11			`-- but WITHOUT ANY WARRANTY; without even the implied warranty of`
12			`-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
13			`-- GNU General Public License for more details.`
14			`--`
15			`-- You should have received a copy of the GNU General Public License`
16			`-- along with this program; if not, write to the Free Software`
17			`-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA`
18			`-----------------------------------------------------------------------------`
19			`-- Entity: pcitb_monitor`
20			`-- File: pcitb_monitor.vhd`
21			`-- Author: Alf Vaerneus, Gaisler Research`
22			`-- Description: PCI Monitor.`
23			`------------------------------------------------------------------------------`
24
25			`-- pragma translate_off`
26
27			`library ieee;`
28			`use ieee.std_logic_1164.all;`
29
30			`library gaisler;`
31			`use gaisler.pcitb.all;`
32			`use gaisler.ambatest.all;`
33			`library grlib;`
34			`use grlib.stdlib.xorv;`
35
36
37			`entity pcitb_monitor is`
38			`generic (dbglevel : integer := 1);`
39			`port (pciin : in pci_type);`
40			`end pcitb_monitor;`
41
42			`architecture tb of pcitb_monitor is`
43
44			`constant T_O : integer := 9;`
45
46			`type pci_array_type is array(0 to 2) of pci_type;`
47
48			`type reg_type is record`
49			`pci : pci_array_type;`
50			`frame_deass : boolean;`
51			`m_wait_data_phase : boolean;`
52			`t_wait_data_phase : boolean;`
53			`stop_asserted : boolean;`
54			`device_sel : boolean;`
55			`first : boolean;`
56			`current_master : integer;`
57			`master_cnt : integer;`
58			`irdy_cnt : integer;`
59			`trdy_cnt : integer;`
60			`end record;`
61
62			`signal r,rin : reg_type;`
63			`signal init_done : boolean := false;`
64
65			`begin`
66
67			`init : process`
68			`begin`
69			`if init_done = false then`
70			`wait until pciin.syst.rst = '0';`
71			`wait until pciin.syst.rst = '1';`
72			`init_done <= true;`
73			`else`
74			`wait until pciin.syst.rst = '0';`
75			`init_done <= false;`
76			`end if;`
77			`end process;`
78
79
80			`comb : process(pciin)`
81			`variable i : integer;`
82			`variable v : reg_type;`
83			`begin`
84			`v := r;`
85			`v.pci(0) := pciin; v.pci(1) := r.pci(0); v.pci(2) := r.pci(1);`
86
87			`if r.pci(0).ifc.frame = 'H' then v.frame_deass := false;`
88			`elsif (r.pci(0).ifc.frame and not r.pci(1).ifc.frame) = '1' then v.frame_deass := true; end if;`
89
90			`if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) or r.pci(0).ifc.irdy) = '0' then v.m_wait_data_phase := false;`
91			`elsif r.pci(0).ifc.irdy = '0' then v.m_wait_data_phase := true; end if;`
92
93			`if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) or r.pci(0).ifc.irdy) = '0' then v.t_wait_data_phase := false;`
94			`elsif (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '0' then v.t_wait_data_phase := true; end if;`
95
96			`if r.pci(0).ifc.frame = '0' and r.pci(1).ifc.frame = 'H' then`
97			`for i in 0 to 20 loop`
98			`if r.pci(0).arb.gnt(i) = '0' then v.current_master := i; end if;`
99			`end loop;`
100			`end if;`
101
102			`if (r.pci(0).ifc.frame and r.pci(0).ifc.irdy) = '0' then`
103			`if (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '1' then`
104			`v.master_cnt := r.master_cnt+1;`
105			`else v.master_cnt := 0; end if;`
106			`else v.master_cnt := 0; end if;`
107
108
109			`if (r.pci(0).ifc.irdy and not r.pci(0).ifc.frame) = '1' then`
110			`v.irdy_cnt := r.irdy_cnt+1;`
111			`else v.irdy_cnt := 0; end if;`
112
113			`if ((r.pci(0).ifc.trdy and r.pci(0).ifc.stop) and not (r.pci(0).ifc.frame and r.pci(0).ifc.irdy)) = '1' then`
114			`v.trdy_cnt := r.trdy_cnt+1;`
115			`else v.trdy_cnt := 0; end if;`
116
117			`if r.pci(0).ifc.devsel = '0' then v.device_sel := true;`
118			`elsif (to_x01(r.pci(1).ifc.devsel) and not (r.pci(0).ifc.frame and r.pci(0).ifc.irdy)) = '1' then v.device_sel := false; end if;`
119
120			`if r.pci(0).ifc.stop = '0' then v.stop_asserted := true;`
121			`elsif r.pci(0).ifc.frame = '0' then v.stop_asserted := false; end if;`
122
123			`if (r.pci(1).ifc.frame = 'H' and r.pci(0).ifc.frame = '0') then v.first := true;`
124			`elsif (r.pci(0).ifc.trdy and r.pci(0).ifc.stop) = '0' then v.first := false; end if;`
125
126			`rin <= v;`
127			`end process;`
128
129			`clkprc : process(pciin.syst)`
130			`begin`
131			`if rising_edge(pciin.syst.clk) then`
132			`r <= rin;`
133
134			`if init_done then`
135
136			`if (r.pci(0).ifc.frame = '0' and r.frame_deass = true) then`
137			`if dbglevel > 0 then`
138			`assert false`
139			`report "*PCI ERROR*"`
140			`severity warning;`
141			`printf("PCI_MONITOR: FRAME# was reasserted during the same transaction.");`
142			`end if;`
143			`end if;`
144
145			`if (r.pci(0).ifc.frame and r.pci(0).ifc.irdy and not r.pci(1).ifc.frame) = '1' then`
146			`if dbglevel > 0 then`
147			`assert false`
148			`report "*PCI ERROR*"`
149			`severity warning;`
150			`printf("PCI_MONITOR: FRAME# was deasserted without IRDY# asserted.");`
151			`end if;`
152			`end if;`
153
154			`if (r.m_wait_data_phase and r.device_sel) then`
155			`if (r.pci(0).ifc.frame /= r.pci(1).ifc.frame) or (r.pci(0).ifc.irdy /= r.pci(1).ifc.irdy) then`
156			`if dbglevel > 0 then`
157			`assert false`
158			`report "*PCI ERROR*"`
159			`severity warning;`
160			`printf("PCI_MONITOR: Current master changed IRDY# or FRAME# before current data phase was completed.");`
161			`end if;`
162			`end if;`
163			`end if;`
164
165			`if ((r.pci(1).ifc.irdy and r.pci(1).ifc.frame and not r.pci(2).ifc.irdy) = '1' and r.stop_asserted = true) then`
166			`if not ((r.pci(1).arb.req(r.current_master) and (r.pci(0).arb.req(r.current_master) or r.pci(2).arb.req(r.current_master))) = '1') then`
167			`if dbglevel > 0 then`
168			`assert false`
169			`report "*PCI ERROR*"`
170			`severity warning;`
171			`printf("PCI_MONITOR: Current master at slot %d did not release its REQ# when the bus returned to idle state.",r.current_master);`
172			`end if;`
173			`end if;`
174			`end if;`
175
176			`if (r.pci(0).ifc.stop and not r.pci(1).ifc.stop and not r.pci(0).ifc.frame) = '1' then`
177			`if dbglevel > 0 then`
178			`assert false`
179			`report "*PCI ERROR*"`
180			`severity warning;`
181			`printf("PCI_MONITOR: Target did not keep STOP# asserted until FRAME# was deasserted.");`
182			`end if;`
183			`end if;`
184
185			`if (r.pci(0).ifc.frame and r.pci(1).ifc.frame and not r.pci(0).ifc.stop and not r.pci(1).ifc.stop) = '1' then`
186			`if dbglevel > 0 then`
187			`assert false`
188			`report "*PCI ERROR*"`
189			`severity warning;`
190			`printf("PCI_MONITOR: Target did not release STOP# after FRAME# was deasserted.");`
191			`end if;`
192			`end if;`
193
194			`if r.t_wait_data_phase = true then`
195			`if (r.pci(0).ifc.devsel /= r.pci(1).ifc.devsel) or (r.pci(0).ifc.trdy /= r.pci(1).ifc.trdy) or (r.pci(0).ifc.stop /= r.pci(1).ifc.stop) then`
196			`if dbglevel > 0 then`
197			`assert false`
198			`report "*PCI ERROR*"`
199			`severity warning;`
200			`printf("PCI_MONITOR: Current target changed DEVSEL#, STOP# or TRDY# before current data phase was completed.");`
201			`end if;`
202			`end if;`
203			`end if;`
204
205			`if (r.pci(0).ifc.frame and r.pci(0).ifc.stop and not r.pci(1).ifc.frame and not r.pci(1).ifc.stop) = '1' then`
206			`if dbglevel > 0 then`
207			`assert false`
208			`report "*PCI ERROR*"`
209			`severity warning;`
210			`printf("PCI_MONITOR: Target did not keep STOP# asserted until the last data phase.");`
211			`end if;`
212			`end if;`
213
214			`if (r.pci(2).ifc.frame and not (r.pci(2).ifc.trdy and r.pci(2).ifc.stop)) = '1' then`
215			`if r.pci(1).ifc.irdy = '0' then`
216			`if dbglevel > 0 then`
217			`assert false`
218			`report "*PCI ERROR*"`
219			`severity warning;`
220			`printf("PCI_MONITOR: Master kept IRDY# asserted after last data phase.");`
221			`end if;`
222			`end if;`
223			`if r.pci(1).ifc.trdy = '0' then`
224			`if dbglevel > 0 then`
225			`assert false`
226			`report "*PCI ERROR*"`
227			`severity warning;`
228			`printf("PCI_MONITOR: Target kept TRDY# asserted after last data phase.");`
229			`end if;`
230			`end if;`
231			`if r.pci(1).ifc.stop = '0' then`
232			`if dbglevel > 0 then`
233			`assert false`
234			`report "*PCI ERROR*"`
235			`severity warning;`
236			`printf("PCI_MONITOR: Target kept STOP# asserted after last data phase.");`
237			`end if;`
238			`end if;`
239			`if r.pci(1).ifc.frame /= 'H' then`
240			`if dbglevel > 0 then`
241			`assert false`
242			`report "*PCI ERROR*"`
243			`severity warning;`
244			`printf("PCI_MONITOR: Master did not tri-state FRAME# after turn-around cycle.");`
245			`end if;`
246			`end if;`
247			`if r.pci(0).ifc.irdy /= 'H' then`
248			`if dbglevel > 0 then`
249			`assert false`
250			`report "*PCI ERROR*"`
251			`severity warning;`
252			`printf("PCI_MONITOR: Master did not tri-state IRDY# after turn-around cycle.");`
253			`end if;`
254			`end if;`
255			`if r.pci(0).ifc.trdy /= 'H' then`
256			`if dbglevel > 0 then`
257			`assert false`
258			`report "*PCI ERROR*"`
259			`severity warning;`
260			`printf("PCI_MONITOR: Target did not tri-state TRDY# after turn-around cycle.");`
261			`end if;`
262			`end if;`
263			`if r.pci(0).ifc.stop /= 'H' then`
264			`if dbglevel > 0 then`
265			`assert false`
266			`report "*PCI ERROR*"`
267			`severity warning;`
268			`printf("PCI_MONITOR: Target did not tri-state STOP# after turn-around cycle.");`
269			`end if;`
270			`end if;`
271			`end if;`
272
273			`if (r.master_cnt > 16 and r.first = true) then`
274			`if dbglevel > 0 then`
275			`assert false`
276			`report "*PCI ERROR*"`
277			`severity warning;`
278			`printf("PCI_MONITOR: Target did not complete its initial data phase in 16 clkc.");`
279			`end if;`
280			`end if;`
281
282			`if r.irdy_cnt > 8 then`
283			`if dbglevel > 0 then`
284			`assert false`
285			`report "*PCI ERROR*"`
286			`severity warning;`
287			`printf("PCI_MONITOR: Master did not complete its initial data phase in 8 clkc.");`
288			`end if;`
289			`end if;`
290
291			`if (r.trdy_cnt > 8 and r.device_sel = true and r.first = false) then`
292			`if dbglevel > 0 then`
293			`assert false`
294			`report "*PCI ERROR*"`
295			`severity warning;`
296			`printf("PCI_MONITOR: Target did not complete a data phase in 8 clkc.");`
297			`end if;`
298			`end if;`
299
300			`if not r.device_sel then`
301			`if (r.pci(0).ifc.irdy and not r.pci(1).ifc.irdy) = '1' then`
302			`if dbglevel > 0 then`
303			`assert false`
304			`report "**"`
305			`severity note;`
306			`printf("PCI_MONITOR: Master abort detected.");`
307			`end if;`
308			`end if;`
309			`end if;`
310
311			`if ((r.pci(1).ifc.irdy = 'H' and r.pci(1).ifc.frame = '0')`
312			`or (r.pci(1).ifc.irdy or r.pci(1).ifc.trdy) = '0') then`
313			`if r.pci(0).ad.par = 'Z' then`
314			`if dbglevel > 0 then`
315			`assert false`
316			`report "*PCI ERROR*"`
317			`severity warning;`
318			`printf("PCI_MONITOR: Current Master/Target is not generating parity during a data phase.");`
319			`end if;`
320			`elsif r.pci(0).ad.par /= xorv(r.pci(1).ad.ad & r.pci(1).ad.cbe) then`
321			`if dbglevel > 0 then`
322			`assert false`
323			`report "*PCI ERROR*"`
324			`severity warning;`
325			`printf("PCI_MONITOR: Parity error detected.");`
326			`end if;`
327			`end if;`
328			`end if;`
329
330			`end if;`
331
332			`end if;`
333			`end process;`
334
335			`adchk : process(pciin.ad)`
336			`begin`
337
338			`if init_done then`
339
340			`-- for i in 0 to 31 loop`
341			`-- if pciin.ad.ad(i) = 'X' then`
342			`-- if dbglevel > 0 then`
343			`-- assert false`
344			`-- report " **"`
345			`-- severity warning;`
346			`-- printf("PCI_MONITOR: AD lines have multiple drivers.");`
347			`-- end if;`
348			`-- end if;`
349			`-- end loop;`
350
351			`for i in 0 to 3 loop`
352			`if pciin.ad.cbe(i) = 'X' then`
353			`if dbglevel > 0 then`
354			`assert false`
355			`report " **"`
356			`severity warning;`
357			`printf("PCI_MONITOR: CBE# lines have multiple drivers.");`
358			`end if;`
359			`end if;`
360			`end loop;`
361
362			`-- if pciin.ad.par = 'X' then`
363			`-- if dbglevel > 0 then`
364			`-- assert false`
365			`-- report " **"`
366			`-- severity warning;`
367			`-- printf("PCI_MONITOR: PAR line has multiple drivers.");`
368			`-- end if;`
369			`-- end if;`
370
371			`end if;`
372
373			`end process;`
374
375			`ifcchk : process(pciin.ifc)`
376			`begin`
377
378			`if init_done then`
379
380			`if pciin.ifc.frame = 'X' then`
381			`if dbglevel > 0 then`
382			`assert false`
383			`report " **"`
384			`severity warning;`
385			`printf("PCI_MONITOR: FRAME# line has multiple drivers.");`
386			`end if;`
387			`end if;`
388			`if pciin.ifc.irdy = 'X' then`
389			`if dbglevel > 0 then`
390			`assert false`
391			`report " **"`
392			`severity warning;`
393			`printf("PCI_MONITOR: IRDY# line has multiple drivers.");`
394			`end if;`
395			`end if;`
396			`if pciin.ifc.trdy = 'X' then`
397			`if dbglevel > 0 then`
398			`assert false`
399			`report " **"`
400			`severity warning;`
401			`printf("PCI_MONITOR: TRDY# line has multiple drivers.");`
402			`end if;`
403			`end if;`
404			`if pciin.ifc.stop = 'X' then`
405			`if dbglevel > 0 then`
406			`assert false`
407			`report " **"`
408			`severity warning;`
409			`printf("PCI_MONITOR: STOP# line has multiple drivers.");`
410			`end if;`
411			`end if;`
412			`if pciin.ifc.devsel = 'X' then`
413			`if dbglevel > 0 then`
414			`assert false`
415			`report " **"`
416			`severity warning;`
417			`printf("PCI_MONITOR: DEVSEL# line has multiple drivers.");`
418			`end if;`
419			`end if;`
420
421			`end if;`
422
423			`end process;`
424
425			`arbchk : process(pciin.arb)`
426			`variable gnt_set : boolean;`
427			`begin`
428			`gnt_set := false;`
429
430			`if init_done then`
431
432			`for i in 0 to 20 loop`
433			`if pciin.arb.gnt(i) = '0' then`
434			`if gnt_set then`
435			`if dbglevel > 0 then`
436			`assert false`
437			`report "*PCI ERROR*"`
438			`severity warning;`
439			`printf("PCI_MONITOR: GNT# is asserted for more than one PCI master.");`
440			`end if;`
441			`else gnt_set := true; end if;`
442			`end if;`
443			`end loop;`
444
445			`end if;`
446
447			`end process;`
448
449			`end;`
450
451			`-- pragma translate_on`