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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [grlib/] [sparc/] [sparc_disas.vhd] - Blame information for rev 2

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1 2 dimamali 
------------------------------------------------------------------------------
2 
--  This file is a part of the GRLIB VHDL IP LIBRARY
3 
--  Copyright (C) 2003, Gaisler Research
4 
--
5 
--  This program is free software; you can redistribute it and/or modify
6 
--  it under the terms of the GNU General Public License as published by
7 
--  the Free Software Foundation; either version 2 of the License, or
8 
--  (at your option) any later version.
9 
--
10 
--  This program is distributed in the hope that it will be useful,
11 
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 
--  GNU General Public License for more details.
14 
--
15 
--  You should have received a copy of the GNU General Public License
16 
--  along with this program; if not, write to the Free Software
17 
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 
-----------------------------------------------------------------------------
19 
-- Package:     sparc_disas
20 
-- File:        sparc_disas.vhd
21 
-- Author:      Jiri Gaisler, Gaisler Research
22 
-- Description: SPARC disassembler according to SPARC V8 manual
23 
------------------------------------------------------------------------------
24 
 
25 
-- pragma translate_off
26 
 
27 
library ieee;
28 
use ieee.std_logic_1164.all;
29 
use ieee.numeric_std.all;
30 
library grlib;
31 
use grlib.stdlib.all;
32 
use grlib.sparc.all;
33 
use std.textio.all;
34 
 
35 
package sparc_disas is
36 
  function tostf(v:std_logic_vector) return string;
37 
  procedure print_insn(ndx: integer; pc, op, res : std_logic_vector(31 downto 0);
38 
        valid, trap, wr, rest : boolean);
39 
  procedure print_fpinsn(ndx: integer; pc, op : std_logic_vector(31 downto 0);
40 
                       res : std_logic_vector(63 downto 0);
41 
                       dpres, valid, trap, wr : boolean);
42 
  function ins2st(pc, op : std_logic_vector(31 downto 0)) return string;
43 
end;
44 
 
45 
package body sparc_disas is
46 
 
47 
type base_type is (hex, dec);
48 
subtype nibble is std_logic_vector(3 downto 0);
49 
type pc_op_type is record
50 
  pc, op : std_logic_vector(31 downto 0);
51 
end record;
52 
 
53 
function tostd(v:std_logic_vector) return string;
54 
function tosth(v:std_logic_vector) return string;
55 
function tostrd(n:integer) return string;
56 
function tohex(n:nibble) return character is
57 
begin
58 
  case n is
59 
  when "0000" => return('0');
60 
  when "0001" => return('1');
61 
  when "0010" => return('2');
62 
  when "0011" => return('3');
63 
  when "0100" => return('4');
64 
  when "0101" => return('5');
65 
  when "0110" => return('6');
66 
  when "0111" => return('7');
67 
  when "1000" => return('8');
68 
  when "1001" => return('9');
69 
  when "1010" => return('a');
70 
  when "1011" => return('b');
71 
  when "1100" => return('c');
72 
  when "1101" => return('d');
73 
  when "1110" => return('e');
74 
  when "1111" => return('f');
75 
  when others => return('X');
76 
  end case;
77 
end;
78 
 
79 
type carr is array (0 to 9) of character;
80 
constant darr : carr := ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9');
81 
function tostd(v:std_logic_vector) return string is
82 
variable s : string(1 to 2);
83 
variable val : integer;
84 
begin
85 
  val := conv_integer(v); s(1) := darr(val / 10); s(2) := darr(val mod 10);
86 
  return(s);
87 
end;
88 
 
89 
function tosth(v:std_logic_vector) return string is
90 
constant vlen : natural := v'length; --'
91 
constant slen : natural := (vlen+3)/4;
92 
variable vv : std_logic_vector(vlen-1 downto 0);
93 
variable s : string(1 to slen);
94 
begin
95 
  vv := v;
96 
  for i in slen downto 1 loop
97 
    s(i) := tohex(vv(3 downto 0));
98 
    vv(vlen-5 downto 0) := vv(vlen-1 downto 4);
99 
  end loop;
100 
  return(s);
101 
end;
102 
 
103 
function tostf(v:std_logic_vector) return string is
104 
constant vlen : natural := v'length; --'
105 
constant slen : natural := (vlen+3)/4;
106 
variable vv : std_logic_vector(vlen-1 downto 0);
107 
variable s : string(1 to slen);
108 
begin
109 
  vv := v;
110 
  for i in slen downto 1 loop
111 
    s(i) := tohex(vv(3 downto 0));
112 
    vv(vlen-5 downto 0) := vv(vlen-1 downto 4);
113 
  end loop;
114 
  return("0x" & s);
115 
end;
116 
 
117 
function tostrd(n:integer) return string is
118 
variable len : integer := 0;
119 
variable tmp : string(10 downto 1);
120 
variable v : integer := n;
121 
begin
122 
  for i in 0 to 9 loop
123 
     tmp(i+1) := darr(v mod 10);
124 
     if tmp(i+1) /= '0'  then
125 
        len := i;
126 
     end if;
127 
     v := v/10;
128 
  end loop;
129 
  return(tmp(len+1 downto 1));
130 
end;
131 
 
132 
function ireg2st(v : std_logic_vector) return string is
133 
  variable ctmp : character;
134 
  variable reg : std_logic_vector(4 downto 0);
135 
  begin
136 
    reg := v;
137 
    case reg(4 downto 3) is
138 
    when "00" => ctmp := 'g'; when "01" => ctmp := 'o';
139 
    when "10" => ctmp := 'l'; when "11" => ctmp := 'i';
140 
    when others => ctmp := 'X';
141 
    end case;
142 
    if v(4 downto 0) = "11110" then return("%fp");
143 
    elsif v(4 downto 0) = "01110" then return("%sp");
144 
    else return('%' & ctmp & tost('0' & reg(2 downto 0))); end if;
145 
end;
146 
 
147 
function simm13dec(insn : pc_op_type; base : base_type; merge : boolean) return string is
148 
  variable simm : std_logic_vector(12 downto 0) := insn.op(12 downto 0);
149 
  variable rs1 : std_logic_vector(4 downto 0)   := insn.op(18 downto 14);
150 
  variable i : std_ulogic := insn.op(13);
151 
  variable sig : character;
152 
  variable fill : std_logic_vector(31 downto 13) := (others => simm(12));
153 
begin
154 
  if i = '0' then
155 
    return("");
156 
  else
157 
    if (simm(12) = '1') and (base = dec) then
158 
      sig := '-'; simm := (not simm) + 1;
159 
    else
160 
      sig := '+';
161 
    end if;
162 
    if base = dec then
163 
      if merge then
164 
        if rs1 = "00000" then
165 
          return(tost(simm));
166 
        else
167 
          return(sig & tost(simm));
168 
        end if;
169 
      else
170 
        if rs1 = "00000" then
171 
          return(tost(simm));
172 
        else
173 
          if sig = '-' then
174 
            return(", " & sig & tost(simm));
175 
          else
176 
            return(", " & tost(simm));
177 
          end if;
178 
        end if;
179 
      end if;
180 
    else
181 
      if rs1 = "00000" then
182 
        if simm(12) = '1' then return(tost(fill & simm));
183 
        else return(tost(simm)); end if;
184 
      else
185 
        if simm(12) = '1' then return(", " & tost(fill & simm));
186 
        else return(", " & tost(simm)); end if;
187 
      end if;
188 
    end if;
189 
  end if;
190 
end;
191 
 
192 
function freg2(insn : pc_op_type) return string is
193 
  variable rs1, rs2, rd : std_logic_vector(4 downto 0);
194 
  variable i : std_ulogic;
195 
begin
196 
  rs2   := insn.op(4 downto 0);
197 
  rd    := insn.op(29 downto 25);
198 
  return("%f" & tostd(rs2) &
199 
         ", %f" & tostd(rd));
200 
end;
201 
 
202 
function creg3(insn : pc_op_type) return string is
203 
  variable rs1, rs2, rd : std_logic_vector(4 downto 0);
204 
  variable i : std_ulogic;
205 
begin
206 
  rs1   := insn.op(18 downto 14);
207 
  rs2   := insn.op(4 downto 0);
208 
  rd    := insn.op(29 downto 25);
209 
  return("%c" & tostd(rs1) & ", %c" & tostd(rs2) & ", %c" & tostd(rd));
210 
end;
211 
 
212 
function freg3(insn : pc_op_type) return string is
213 
  variable rs1, rs2, rd : std_logic_vector(4 downto 0);
214 
  variable i : std_ulogic;
215 
begin
216 
  rs1   := insn.op(18 downto 14);
217 
  rs2   := insn.op(4 downto 0);
218 
  rd    := insn.op(29 downto 25);
219 
  return("%f" & tostd(rs1) & ", %f" & tostd(rs2) & ", %f" & tostd(rd));
220 
end;
221 
 
222 
function fregc(insn : pc_op_type) return string is
223 
  variable rs1, rs2 : std_logic_vector(4 downto 0);
224 
  variable i : std_ulogic;
225 
begin
226 
  rs1   := insn.op(18 downto 14);
227 
  rs2   := insn.op(4 downto 0);
228 
  return("%f" & tostd(rs1) & ", %f" & tostd(rs2));
229 
end;
230 
 
231 
function regimm(insn : pc_op_type; base : base_type; merge : boolean) return string is
232 
  variable rs1, rs2 : std_logic_vector(4 downto 0);
233 
  variable i : std_ulogic;
234 
begin
235 
  rs1   := insn.op(18 downto 14);
236 
  rs2   := insn.op(4 downto 0);
237 
  i     := insn.op(13);
238 
  if i = '0' then
239 
    if (rs1 = "00000") then
240 
      if (rs2 = "00000") then return("0");
241 
      else return(ireg2st(rs2)); end if;
242 
    else
243 
      if (rs2 = "00000") then return(ireg2st(rs1));
244 
      elsif merge then return(ireg2st(rs1) & " + " & ireg2st(rs2));
245 
      else return(ireg2st(rs1) & ", " & ireg2st(rs2)); end if;
246 
    end if;
247 
  else
248 
    if (rs1 = "00000") then return(simm13dec(insn, base, merge));
249 
    elsif insn.op(12 downto 0) = "0000000000000" then return(ireg2st(rs1));
250 
    else return(ireg2st(rs1) & simm13dec(insn, base, merge)); end if;
251 
  end if;
252 
end;
253 
 
254 
function regres(insn : pc_op_type; base : base_type) return string is
255 
  variable rs1, rs2, rd : std_logic_vector(4 downto 0);
256 
  variable i : std_ulogic;
257 
begin
258 
  rd    := insn.op(29 downto 25);
259 
  return(regimm(insn, base,false) & ", " & ireg2st(rd ));
260 
end;
261 
 
262 
function branchop(insn : pc_op_type) return string is
263 
  variable simm : std_logic_vector(31 downto 0);
264 
begin
265 
  case insn.op(28 downto 25) is
266 
  when "0000" => return("n");
267 
  when "0001" => return("e");
268 
  when "0010" => return("le");
269 
  when "0011" => return("l");
270 
  when "0100" => return("leu");
271 
  when "0101" => return("cs");
272 
  when "0110" => return("neg");
273 
  when "0111" => return("vs");
274 
  when "1000" => return("a");
275 
  when "1001" => return("ne");
276 
  when "1010" => return("g");
277 
  when "1011" => return("ge");
278 
  when "1100" => return("gu");
279 
  when "1101" => return("cc");
280 
  when "1110" => return("pos");
281 
  when "1111" => return("vc");
282 
  when others => return("XXX");
283 
  end case;
284 
end;
285 
 
286 
function fbranchop(insn : pc_op_type) return string is
287 
  variable simm : std_logic_vector(31 downto 0);
288 
begin
289 
  case insn.op(28 downto 25) is
290 
  when "0000" => return("n");
291 
  when "0001" => return("ne");
292 
  when "0010" => return("lg");
293 
  when "0011" => return("ul");
294 
  when "0100" => return("l");
295 
  when "0101" => return("ug");
296 
  when "0110" => return("g");
297 
  when "0111" => return("u");
298 
  when "1000" => return("a");
299 
  when "1001" => return("e");
300 
  when "1010" => return("ue");
301 
  when "1011" => return("ge");
302 
  when "1100" => return("uge");
303 
  when "1101" => return("le");
304 
  when "1110" => return("ule");
305 
  when "1111" => return("o");
306 
  when others => return("XXX");
307 
  end case;
308 
end;
309 
 
310 
function ldparcp(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
311 
begin
312 
  return("[" & regimm(insn,dec,true) & "]" & ", " & "%c" & tost(rd));
313 
end;
314 
 
315 
function ldparf(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
316 
begin
317 
  return("[" & regimm(insn,dec,true) & "]" & ", " & "%f" & tostd(rd));
318 
end;
319 
 
320 
function ldpar(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
321 
begin
322 
  return("[" & regimm(insn,dec,true) & "]" & ", " & ireg2st(rd));
323 
end;
324 
function ldpara(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
325 
begin
326 
  return("[" & regimm(insn,dec,true) & "]" & " " & tost(insn.op(12 downto 5)) & ", " & ireg2st(rd));
327 
end;
328 
function stparc(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
329 
begin
330 
  if rd = "00000" then
331 
    return("[" & regimm(insn,dec,true) & "]");
332 
  else
333 
    return(ireg2st(rd) & ", [" & regimm(insn,dec,true) & "]");
334 
  end if;
335 
end;
336 
function stparcp(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
337 
begin
338 
  return("%c" & tost(rd) & ", [" & regimm(insn,dec,true) & "]");
339 
end;
340 
function stparf(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
341 
begin
342 
  return("%f" & tostd(rd) & ", [" & regimm(insn,dec,true) & "]");
343 
end;
344 
function stpar(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
345 
begin
346 
  return(ireg2st(rd) & ", [" & regimm(insn,dec,true) & "]");
347 
end;
348 
function stpara(insn : pc_op_type; rd : std_logic_vector; base : base_type) return string is
349 
begin
350 
  return(ireg2st(rd) & ", [" & regimm(insn,dec,true) & "]" & " " & tost(insn.op(12 downto 5)));
351 
end;
352 
 
353 
function ins2st(pc, op : std_logic_vector(31 downto 0)) return string is
354 
  constant STMAX  : natural := 9;
355 
  constant bl2    : string(1 to 2) := (others => ' ');
356 
  constant bb     : string(1 to 4) := (others => ' ');
357 
  variable op1    : std_logic_vector(1 downto 0);
358 
  variable op2    : std_logic_vector(2 downto 0);
359 
  variable op3    : std_logic_vector(5 downto 0);
360 
  variable opf    : std_logic_vector(8 downto 0);
361 
  variable cond   : std_logic_vector(3 downto 0);
362 
  variable rs1, rs2, rd : std_logic_vector(4 downto 0);
363 
  variable addr   : std_logic_vector(31 downto 0);
364 
  variable annul  : std_ulogic;
365 
  variable i      : std_ulogic;
366 
  variable simm : std_logic_vector(12 downto 0);
367 
  variable insn : pc_op_type;
368 
 
369 
begin
370 
 
371 
    op1   := op(31 downto 30);
372 
    op2   := op(24 downto 22);
373 
    op3   := op(24 downto 19);
374 
    opf   := op(13 downto 5);
375 
    cond  := op(28 downto 25);
376 
    annul := op(29);
377 
    rs1   := op(18 downto 14);
378 
    rs2   := op(4 downto 0);
379 
    rd    := op(29 downto 25);
380 
    i     := op(13);
381 
    simm  := op(12 downto 0);
382 
    insn.op := op;
383 
    insn.pc := pc;
384 
 
385 
    case op1 is
386 
    when CALL =>
387 
      addr := pc + (op(29 downto 0) & "00");
388 
      return(tostf(pc) & bb & "call" & bl2 & tost(addr));
389 
    when FMT2 =>
390 
      case op2 is
391 
      when SETHI =>
392 
        if rd = "00000" then
393 
          return(tostf(pc) & bb & "nop");
394 
        else
395 
          return(tostf(pc) & bb & "sethi" & bl2 & "%hi(" &
396 
                tost(op(21 downto 0) & "0000000000") & "), " & ireg2st(rd));
397 
        end if;
398 
      when BICC | FBFCC =>
399 
        addr(31 downto 24) := (others => '0');
400 
        addr(1 downto 0) := (others => '0');
401 
        addr(23 downto 2) := op(21 downto 0);
402 
        if addr(23) = '1' then
403 
          addr(31 downto 24) := (others => '1');
404 
        else
405 
          addr(31 downto 24) := (others => '0');
406 
        end if;
407 
        addr := addr + pc;
408 
        if op2 = BICC then
409 
          if op(29) = '1' then
410 
            return(tostf(pc) & bb & 'b' & branchop(insn) & ",a" & bl2 &
411 
                tost(addr));
412 
          else
413 
            return(tostf(pc) & bb & 'b' & branchop(insn) & bl2 &
414 
                tost(addr));
415 
          end if;
416 
        else
417 
          if op(29) = '1' then
418 
            return(tostf(pc) & bb & "fb" & fbranchop(insn) & ",a" & bl2 &
419 
                tost(addr));
420 
          else
421 
            return(tostf(pc) & bb & "fb" & fbranchop(insn) & bl2 &
422 
                tost(addr));
423 
          end if;
424 
        end if;
425 
--      when CBCCC => cptrap := '1';
426 
      when others => return(tostf(pc) & bb & "unimp");
427 
      end case;
428 
    when FMT3 =>
429 
      case op3 is
430 
      when IAND => return(tostf(pc) & bb & "and" & bl2 & regres(insn,hex));
431 
      when IADD => return(tostf(pc) & bb & "add" & bl2 & regres(insn,dec));
432 
      when IOR  =>
433 
        if ((i = '0') and (rs1 = "00000") and (rs2 = "00000")) then
434 
          return(tostf(pc) & bb & "clr" & bl2 & ireg2st(rd));
435 
        elsif ((i = '1') and (simm = "0000000000000")) or (rs1 = "00000") then
436 
          return(tostf(pc) & bb & "mov" & bl2 & regres(insn,hex));
437 
        else
438 
          return(tostf(pc) & bb & "or " & bl2 & regres(insn,hex));
439 
        end if;
440 
      when IXOR => return(tostf(pc) & bb & "xor" & bl2 & regres(insn,hex));
441 
      when ISUB => return(tostf(pc) & bb & "sub" & bl2 & regres(insn,dec));
442 
      when ANDN => return(tostf(pc) & bb & "andn" & bl2 & regres(insn,hex));
443 
      when ORN  => return(tostf(pc) & bb & "orn" & bl2 & regres(insn,hex));
444 
      when IXNOR =>
445 
        if ((i = '0') and ((rs1 = rd) or (rs2 = "00000"))) then
446 
          return(tostf(pc) & bb & "not" & bl2 & ireg2st(rd));
447 
        else
448 
          return(tostf(pc) & bb & "xnor" & bl2 & ireg2st(rd));
449 
        end if;
450 
      when ADDX => return(tostf(pc) & bb & "addx" & bl2 & regres(insn,dec));
451 
      when SUBX => return(tostf(pc) & bb & "subx" & bl2 & regres(insn,dec));
452 
      when ADDCC => return(tostf(pc) & bb & "addcc" & bl2 & regres(insn,dec));
453 
      when ANDCC => return(tostf(pc) & bb & "andcc" & bl2 & regres(insn,hex));
454 
      when ORCC => return(tostf(pc) & bb & "orcc" & bl2 & regres(insn,hex));
455 
      when XORCC => return(tostf(pc) & bb & "xorcc" & bl2 & regres(insn,hex));
456 
      when SUBCC => return(tostf(pc) & bb & "subcc" & bl2 & regres(insn,dec));
457 
      when ANDNCC => return(tostf(pc) & bb & "andncc" & bl2 & regres(insn,hex));
458 
      when ORNCC => return(tostf(pc) & bb & "orncc" & bl2 & regres(insn,hex));
459 
      when XNORCC => return(tostf(pc) & bb & "xnorcc" & bl2 & regres(insn,hex));
460 
      when ADDXCC => return(tostf(pc) & bb & "addxcc" & bl2 & regres(insn,hex));
461 
      when UMAC   => return(tostf(pc) & bb & "umac" & bl2 & regres(insn,dec));
462 
      when SMAC   => return(tostf(pc) & bb & "smac" & bl2 & regres(insn,dec));
463 
      when UMUL   => return(tostf(pc) & bb & "umul" & bl2 & regres(insn,dec));
464 
      when SMUL   => return(tostf(pc) & bb & "smul" & bl2 & regres(insn,dec));
465 
      when UMULCC => return(tostf(pc) & bb & "umulcc" & bl2 & regres(insn,dec));
466 
      when SMULCC => return(tostf(pc) & bb & "smulcc" & bl2 & regres(insn,dec));
467 
      when SUBXCC => return(tostf(pc) & bb & "subxcc" & bl2 & regres(insn,dec));
468 
      when UDIV   => return(tostf(pc) & bb & "udiv" & bl2 & regres(insn,dec));
469 
      when SDIV   => return(tostf(pc) & bb & "sdiv" & bl2 & regres(insn,dec));
470 
      when UDIVCC => return(tostf(pc) & bb & "udivcc" & bl2 & regres(insn,dec));
471 
      when SDIVCC => return(tostf(pc) & bb & "sdivcc" & bl2 & regres(insn,dec));
472 
      when TADDCC => return(tostf(pc) & bb & "taddcc" & bl2 & regres(insn,dec));
473 
      when TSUBCC => return(tostf(pc) & bb & "tsubcc" & bl2 & regres(insn,dec));
474 
      when TADDCCTV => return(tostf(pc) & bb & "taddcctv" & bl2 & regres(insn,dec));
475 
      when TSUBCCTV => return(tostf(pc) & bb & "tsubcctv" & bl2 & regres(insn,dec));
476 
      when MULSCC => return(tostf(pc) & bb & "mulscc" & bl2 & regres(insn,dec));
477 
      when ISLL => return(tostf(pc) & bb & "sll" & bl2 & regres(insn,dec));
478 
      when ISRL => return(tostf(pc) & bb & "srl" & bl2 & regres(insn,dec));
479 
      when ISRA => return(tostf(pc) & bb & "sra" & bl2 & regres(insn,dec));
480 
      when RDY  =>
481 
        if rs1 /= "00000" then
482 
          return(tostf(pc) & bb & "mov" & bl2 & "%asr" &
483 
                 tostd(rs1) & ", " & ireg2st(rd));
484 
        else
485 
          return(tostf(pc) & bb & "mov" & bl2 & "%y, " & ireg2st(rd));
486 
        end if;
487 
      when RDPSR  => return(tostf(pc) & bb & "mov" & bl2 & "%psr, " & ireg2st(rd));
488 
      when RDWIM  => return(tostf(pc) & bb & "mov" & bl2 & "%wim, " & ireg2st(rd));
489 
      when RDTBR  => return(tostf(pc) & bb & "mov" & bl2 & "%tbr, " & ireg2st(rd));
490 
      when WRY  =>
491 
        if (rs1 = "00000") or (rs2 = "00000") then
492 
          if rd /= "00000" then
493 
            return(tostf(pc) & bb & "mov" & bl2
494 
                 & regimm(insn,hex,false) & ", %asr" & tostd(rd));
495 
          else
496 
            return(tostf(pc) & bb & "mov" & bl2 & regimm(insn,hex,false) & ", %y");
497 
          end if;
498 
        else
499 
          if rd /= "00000" then
500 
            return(tostf(pc) & bb & "wr " & bl2 & "%asr"
501 
                 & regimm(insn,hex,false) & ", %asr" & tostd(rd));
502 
          else
503 
            return(tostf(pc) & bb & "wr " & bl2 & regimm(insn,hex,false) & ", %y");
504 
          end if;
505 
        end if;
506 
      when WRPSR  =>
507 
        if (rs1 = "00000") or (rs2 = "00000") then
508 
          return(tostf(pc) & bb & "mov" & bl2 & regimm(insn,hex,false) & ", %psr");
509 
        else
510 
          return(tostf(pc) & bb & "wr " & bl2 & regimm(insn,hex,false) & ", %psr");
511 
        end if;
512 
      when WRWIM  =>
513 
        if (rs1 = "00000") or (rs2 = "00000") then
514 
          return(tostf(pc) & bb & "mov" & bl2 & regimm(insn,hex,false) & ", %wim");
515 
        else
516 
          return(tostf(pc) & bb & "wr " & bl2 & regimm(insn,hex,false) & ", %wim");
517 
        end if;
518 
      when WRTBR  =>
519 
        if (rs1 = "00000") or (rs2 = "00000") then
520 
          return(tostf(pc) & bb & "mov" & bl2 & regimm(insn,hex,false) & ", %tbr");
521 
        else
522 
          return(tostf(pc) & bb & "wr " & bl2 & regimm(insn,hex,false) & ", %tbr");
523 
        end if;
524 
      when JMPL =>
525 
        if (rd = "00000") then
526 
          if (i = '1') and (simm = "0000000001000") then
527 
            if (rs1 = "11111") then return(tostf(pc) & bb & "ret");
528 
            elsif (rs1 = "01111") then return(tostf(pc) & bb & "retl");
529 
            else return(tostf(pc) & bb & "jmp" & bl2 & regimm(insn,dec,true));
530 
            end if;
531 
          else return(tostf(pc) & bb & "jmp" & bl2 & regimm(insn,dec,true));
532 
          end if;
533 
        else return(tostf(pc) & bb & "jmpl" & bl2 & regres(insn,dec));
534 
        end if;
535 
      when TICC =>
536 
        return(tostf(pc) & bb & 't' & branchop(insn) & bl2 & regimm(insn,hex,false));
537 
      when FLUSH =>
538 
        return(tostf(pc) & bb & "flush" & bl2 & regimm(insn,hex,false));
539 
      when RETT =>
540 
        return(tostf(pc) & bb & "rett" & bl2 & regimm(insn,dec,true));
541 
      when RESTORE =>
542 
        if (rd = "00000") then
543 
          return(tostf(pc) & bb & "restore");
544 
        else
545 
          return(tostf(pc) & bb & "restore" & bl2 & regres(insn,hex));
546 
        end if;
547 
      when SAVE =>
548 
        if (rd = "00000") then return(tostf(pc) & bb & "save");
549 
        else return(tostf(pc) & bb & "save" & bl2 & regres(insn,dec)); end if;
550 
      when FPOP1 =>
551 
        case opf is
552 
        when FITOS => return(tostf(pc) & bb & "fitos" & bl2 & freg2(insn));
553 
        when FITOD => return(tostf(pc) & bb & "fitod" & bl2 & freg2(insn));
554 
        when FSTOI => return(tostf(pc) & bb & "fstoi" & bl2 & freg2(insn));
555 
        when FDTOI => return(tostf(pc) & bb & "fdtoi" & bl2 & freg2(insn));
556 
        when FSTOD => return(tostf(pc) & bb & "fstod" & bl2 & freg2(insn));
557 
        when FDTOS => return(tostf(pc) & bb & "fdtos" & bl2 & freg2(insn));
558 
        when FMOVS => return(tostf(pc) & bb & "fmovs" & bl2 & freg2(insn));
559 
        when FNEGS => return(tostf(pc) & bb & "fnegs" & bl2 & freg2(insn));
560 
        when FABSS => return(tostf(pc) & bb & "fabss" & bl2 & freg2(insn));
561 
        when FSQRTS => return(tostf(pc) & bb & "fsqrts" & bl2 & freg2(insn));
562 
        when FSQRTD => return(tostf(pc) & bb & "fsqrtd" & bl2 & freg2(insn));
563 
        when FADDS => return(tostf(pc) & bb & "fadds" & bl2 & freg3(insn));
564 
        when FADDD => return(tostf(pc) & bb & "faddd" & bl2 & freg3(insn));
565 
        when FSUBS => return(tostf(pc) & bb & "fsubs" & bl2 & freg3(insn));
566 
        when FSUBD => return(tostf(pc) & bb & "fsubd" & bl2 & freg3(insn));
567 
        when FMULS => return(tostf(pc) & bb & "fmuls" & bl2 & freg3(insn));
568 
        when FMULD => return(tostf(pc) & bb & "fmuld" & bl2 & freg3(insn));
569 
        when FSMULD => return(tostf(pc) & bb & "fsmuld" & bl2 & freg3(insn));
570 
        when FDIVS => return(tostf(pc) & bb & "fdivs" & bl2 & freg3(insn));
571 
        when FDIVD => return(tostf(pc) & bb & "fdivd" & bl2 & freg3(insn));
572 
        when others => return(tostf(pc) & bb & "unknown FOP1: " & tost(op));
573 
        end case;
574 
      when FPOP2 =>
575 
        case opf is
576 
        when FCMPS => return(tostf(pc) & bb & "fcmps" & bl2 & fregc(insn));
577 
        when FCMPD => return(tostf(pc) & bb & "fcmpd" & bl2 & fregc(insn));
578 
        when FCMPES => return(tostf(pc) & bb & "fcmpes" & bl2 & fregc(insn));
579 
        when FCMPED => return(tostf(pc) & bb & "fcmped" & bl2 & fregc(insn));
580 
        when others => return(tostf(pc) & bb & "unknown FOP2: " & tost(insn.op));
581 
        end case;
582 
      when CPOP1 =>
583 
        return(tostf(pc) & bb & "cpop1" & bl2 & tost("000"&opf) & ", " &creg3(insn));
584 
      when CPOP2 =>
585 
        return(tostf(pc) & bb & "cpop2" & bl2 & tost("000"&opf) & ", " &creg3(insn));
586 
      when others => return(tostf(pc) & bb & "unknown opcode: " & tost(insn.op));
587 
      end case;
588 
    when LDST =>
589 
      case op3 is
590 
      when STC =>
591 
        return(tostf(pc) & bb & "st" & bl2 & stparcp(insn, rd, dec));
592 
      when STF =>
593 
        return(tostf(pc) & bb & "st" & bl2 & stparf(insn, rd, dec));
594 
      when ST =>
595 
        if rd = "00000" then
596 
          return(tostf(pc) & bb & "clr" & bl2 & stparc(insn, rd, dec));
597 
        else
598 
          return(tostf(pc) & bb & "st" & bl2 & stpar(insn, rd, dec));
599 
        end if;
600 
      when STB =>
601 
        if rd = "00000" then
602 
          return(tostf(pc) & bb & "clrb" & bl2 & stparc(insn, rd, dec));
603 
        else
604 
          return(tostf(pc) & bb & "stb" & bl2 & stpar(insn, rd, dec));
605 
        end if;
606 
      when STH =>
607 
        if rd = "00000" then
608 
          return(tostf(pc) & bb & "clrh" & bl2 & stparc(insn, rd, dec));
609 
        else
610 
          return(tostf(pc) & bb & "sth" & bl2 & stpar(insn, rd, dec));
611 
        end if;
612 
      when STDC =>
613 
        return(tostf(pc) & bb & "std" & bl2 & stparcp(insn, rd, dec));
614 
      when STDF =>
615 
        return(tostf(pc) & bb & "std" & bl2 & stparf(insn, rd, dec));
616 
      when STCSR =>
617 
        return(tostf(pc) & bb & "st" & bl2 & "%csr, [" & regimm(insn,dec,true) & "]");
618 
      when STFSR =>
619 
        return(tostf(pc) & bb & "st" & bl2 & "%fsr, [" & regimm(insn,dec,true) & "]");
620 
      when STDCQ =>
621 
        return(tostf(pc) & bb & "std" & bl2 & "%cq, [" & regimm(insn,dec,true) & "]");
622 
      when STDFQ =>
623 
        return(tostf(pc) & bb & "std" & bl2 & "%fq, [" & regimm(insn,dec,true) & "]");
624 
      when ISTD =>
625 
        return(tostf(pc) & bb & "std" & bl2 & stpar(insn, rd, dec));
626 
      when STA =>
627 
        return(tostf(pc) & bb & "sta" & bl2 & stpara(insn, rd, dec));
628 
      when STBA =>
629 
        return(tostf(pc) & bb & "stba" & bl2 & stpara(insn, rd, dec));
630 
      when STHA =>
631 
        return(tostf(pc) & bb & "stha" & bl2 & stpara(insn, rd, dec));
632 
      when STDA =>
633 
        return(tostf(pc) & bb & "stda" & bl2 & stpara(insn, rd, dec));
634 
      when LDC =>
635 
        return(tostf(pc) & bb & "ld" & bl2 & ldparcp(insn, rd, dec));
636 
      when LDF =>
637 
        return(tostf(pc) & bb & "ld" & bl2 & ldparf(insn, rd, dec));
638 
      when LDCSR =>
639 
        return(tostf(pc) & bb & "ld" & bl2 & "[" & regimm(insn,dec,true) & "]" & ", %csr");
640 
      when LDFSR =>
641 
        return(tostf(pc) & bb & "ld" & bl2 & "[" & regimm(insn,dec,true) & "]" & ", %fsr");
642 
      when LD =>
643 
        return(tostf(pc) & bb & "ld" & bl2 & ldpar(insn, rd, dec));
644 
      when LDUB =>
645 
        return(tostf(pc) & bb & "ldub" & bl2 & ldpar(insn, rd, dec));
646 
      when LDUH =>
647 
        return(tostf(pc) & bb & "lduh" & bl2 & ldpar(insn, rd, dec));
648 
      when LDDC =>
649 
        return(tostf(pc) & bb & "ldd" & bl2 & ldparcp(insn, rd, dec));
650 
      when LDDF =>
651 
        return(tostf(pc) & bb & "ldd" & bl2 & ldparf(insn, rd, dec));
652 
      when LDD =>
653 
        return(tostf(pc) & bb & "ldd" & bl2 & ldpar(insn, rd, dec));
654 
      when LDSB =>
655 
        return(tostf(pc) & bb & "ldsb" & bl2 & ldpar(insn, rd, dec));
656 
      when LDSH =>
657 
        return(tostf(pc) & bb & "ldsh" & bl2 & ldpar(insn, rd, dec));
658 
      when LDSTUB =>
659 
        return(tostf(pc) & bb & "ldstub" & bl2 & ldpar(insn, rd, dec));
660 
      when SWAP   =>
661 
        return(tostf(pc) & bb & "swap" & bl2 & ldpar(insn, rd, dec));
662 
      when LDA =>
663 
        return(tostf(pc) & bb & "lda" & bl2 & ldpara(insn, rd, dec));
664 
      when LDUBA =>
665 
        return(tostf(pc) & bb & "lduba" & bl2 & ldpara(insn, rd, dec));
666 
      when LDUHA =>
667 
        return(tostf(pc) & bb & "lduha" & bl2 & ldpara(insn, rd, dec));
668 
      when LDDA =>
669 
        return(tostf(pc) & bb & "ldda" & bl2 & ldpara(insn, rd, dec));
670 
      when LDSBA =>
671 
        return(tostf(pc) & bb & "ldsba" & bl2 & ldpara(insn, rd, dec));
672 
      when LDSHA =>
673 
        return(tostf(pc) & bb & "ldsha" & bl2 & ldpara(insn, rd, dec));
674 
      when LDSTUBA =>
675 
        return(tostf(pc) & bb & "ldstuba" & bl2 & ldpara(insn, rd, dec));
676 
      when SWAPA   =>
677 
        return(tostf(pc) & bb & "swapa" & bl2 & ldpara(insn, rd, dec));
678 
 
679 
      when others => return(tostf(pc) & bb & "unknown opcode: " & tost(op));
680 
      end case;
681 
    when others => return(tostf(pc) & bb & "unknown opcode: " & tost(op));
682 
    end case;
683 
end;
684 
 
685 
procedure print_insn(ndx: integer; pc, op, res : std_logic_vector(31 downto 0);
686 
         valid, trap, wr, rest : boolean) is
687 
variable t : integer;
688 
begin
689 
  if valid then
690 
    t := now / 1 ns;
691 
    if trap then print (tost(t) & " cpu" & tost(ndx) &": " & ins2st(pc, op) & "  (trapped)");
692 
    elsif rest then print (tost(t) & " cpu" & tost(ndx) &": " & ins2st(pc, op) & "  (restart)");
693 
    elsif wr then print (tost(t) & " cpu" & tost(ndx) & ": " & ins2st(pc, op) & "  [" & tost(res) & "]");
694 
    else print (tost(t) & " cpu" & tost(ndx) & ": " & ins2st(pc, op)); end if;
695 
  end if;
696 
end;
697 
 
698 
procedure print_fpinsn(ndx: integer; pc, op : std_logic_vector(31 downto 0);
699 
                       res : std_logic_vector(63 downto 0);
700 
                       dpres, valid, trap, wr : boolean) is
701 
variable t : integer;
702 
begin
703 
  if valid then
704 
    t := now / 1 ns;
705 
    if trap then print (tost(t) & " cpu" & tost(ndx) &": " & ins2st(pc, op) & "  (trapped)");
706 
    elsif wr then
707 
      if dpres then print (tost(t) & " cpu" & tost(ndx) & ": " & ins2st(pc, op) & "  [" & tost(res) & "]");
708 
      else print (tost(t) & " cpu" & tost(ndx) & ": " & ins2st(pc, op) & "  [" & tost(res(63 downto 32)) & "]"); end if;
709 
    else print (tost(t) & " cpu" & tost(ndx) & ": " & ins2st(pc, op)); end if;
710 
  end if;
711 
end;
712 
 
713 
end;
714 
-- pragma translate_on

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