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------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2006, Gaisler Research AB - all rights reserved.
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--
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-- ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
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-- ACCORDANCE WITH THE GAISLER LICENSE AGREEMENT AND MUST BE APPROVED
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-- IN ADVANCE IN WRITING.
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-----------------------------------------------------------------------------
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-- Package: stdlib
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-- File: stdlib.vhd
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-- Author: Jiri Gaisler - Gaisler Research
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-- Description: Package for common VHDL functions
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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-- pragma translate_off
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use std.textio.all;
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-- pragma translate_on
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library grlib;
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use grlib.version.all;
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package stdlib is
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constant LIBVHDL_VERSION : integer := grlib_version;
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constant LIBVHDL_BUILD : integer := grlib_build;
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-- pragma translate_off
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constant LIBVHDL_DATE : string := grlib_date;
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-- pragma translate_on
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constant zero32 : std_logic_vector(31 downto 0) := (others => '0');
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constant zero64 : std_logic_vector(63 downto 0) := (others => '0');
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constant one32 : std_logic_vector(31 downto 0) := (others => '1');
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type log2arr is array(0 to 512) of integer;
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constant log2 : log2arr := (
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0,0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
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6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
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7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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others => 9);
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constant log2x : log2arr := (
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0,1,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
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6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
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7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
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7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
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others => 9);
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function decode(v : std_logic_vector) return std_logic_vector;
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function genmux(s,v : std_logic_vector) return std_ulogic;
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function xorv(d : std_logic_vector) return std_ulogic;
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function orv(d : std_logic_vector) return std_ulogic;
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function andv(d : std_logic_vector) return std_ulogic;
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function notx(d : std_logic_vector) return boolean;
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function notx(d : std_ulogic) return boolean;
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function "-" (d : std_logic_vector; i : integer) return std_logic_vector;
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function "-" (i : integer; d : std_logic_vector) return std_logic_vector;
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function "+" (d : std_logic_vector; i : integer) return std_logic_vector;
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function "+" (i : integer; d : std_logic_vector) return std_logic_vector;
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function "-" (d : std_logic_vector; i : std_ulogic) return std_logic_vector;
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function "+" (d : std_logic_vector; i : std_ulogic) return std_logic_vector;
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function "-" (a, b : std_logic_vector) return std_logic_vector;
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function "+" (a, b : std_logic_vector) return std_logic_vector;
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function "*" (a, b : std_logic_vector) return std_logic_vector;
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function signed_mul (a, b : std_logic_vector) return std_logic_vector;
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--function ">" (a, b : std_logic_vector) return boolean;
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function "<" (i : integer; b : std_logic_vector) return boolean;
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function conv_integer(v : std_logic_vector) return integer;
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function conv_integer(v : std_logic) return integer;
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function conv_std_logic_vector(i : integer; w : integer) return std_logic_vector;
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function conv_std_logic_vector_signed(i : integer; w : integer) return std_logic_vector;
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function conv_std_logic(b : boolean) return std_ulogic;
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-- Reporting and diagnostics
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-- pragma translate_off
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function tost(v:std_logic_vector) return string;
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function tost(v:std_logic) return string;
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function tost(i : integer) return string;
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procedure print(s : string);
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component report_version
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generic (msg1, msg2, msg3, msg4 : string := ""; mdel : integer := 4);
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end component;
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-- pragma translate_on
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end;
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package body stdlib is
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function notx(d : std_logic_vector) return boolean is
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variable res : boolean;
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begin
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res := true;
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-- pragma translate_off
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res := not is_x(d);
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-- pragma translate_on
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return (res);
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end;
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function notx(d : std_ulogic) return boolean is
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variable res : boolean;
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begin
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res := true;
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-- pragma translate_off
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res := not is_x(d);
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-- pragma translate_on
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return (res);
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end;
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-- generic decoder
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function decode(v : std_logic_vector) return std_logic_vector is
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variable res : std_logic_vector((2**v'length)-1 downto 0);
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variable i : integer range res'range;
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begin
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res := (others => '0'); i := 0;
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if notx(v) then i := to_integer(unsigned(v)); end if;
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res(i) := '1';
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return(res);
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end;
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-- generic multiplexer
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function genmux(s,v : std_logic_vector) return std_ulogic is
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variable res : std_logic_vector(v'length-1 downto 0);
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variable i : integer range res'range;
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begin
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res := v; i := 0;
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if notx(s) then i := to_integer(unsigned(s)); end if;
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return(res(i));
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end;
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-- vector XOR
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function xorv(d : std_logic_vector) return std_ulogic is
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variable tmp : std_ulogic;
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begin
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tmp := '0';
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for i in d'range loop tmp := tmp xor d(i); end loop;
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return(tmp);
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end;
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-- vector OR
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function orv(d : std_logic_vector) return std_ulogic is
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variable tmp : std_ulogic;
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begin
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tmp := '0';
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for i in d'range loop tmp := tmp or d(i); end loop;
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return(tmp);
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end;
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-- vector AND
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function andv(d : std_logic_vector) return std_ulogic is
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variable tmp : std_ulogic;
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begin
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tmp := '1';
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for i in d'range loop tmp := tmp and d(i); end loop;
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return(tmp);
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end;
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-- unsigned multiplication
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function "*" (a, b : std_logic_vector) return std_logic_vector is
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variable z : std_logic_vector(a'length+b'length-1 downto 0);
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begin
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if notx(a&b) then
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return(std_logic_vector(unsigned(a) * unsigned(b)));
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-- pragma translate_off
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else
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z := (others =>'X'); return(z);
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-- pragma translate_on
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end if;
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end;
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-- signed multiplication
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function signed_mul (a, b : std_logic_vector) return std_logic_vector is
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variable z : std_logic_vector(a'length+b'length-1 downto 0);
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begin
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if notx(a&b) then
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return(std_logic_vector(signed(a) * signed(b)));
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-- pragma translate_off
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else
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z := (others =>'X'); return(z);
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-- pragma translate_on
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end if;
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end;
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-- unsigned addition
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function "+" (a, b : std_logic_vector) return std_logic_vector is
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variable x : std_logic_vector(a'length-1 downto 0);
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variable y : std_logic_vector(b'length-1 downto 0);
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begin
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if notx(a&b) then
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return(std_logic_vector(unsigned(a) + unsigned(b)));
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-- pragma translate_off
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else
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x := (others =>'X'); y := (others =>'X');
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if (x'length > y'length) then return(x); else return(y); end if;
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-- pragma translate_on
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end if;
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end;
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function "+" (i : integer; d : std_logic_vector) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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begin
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if notx(d) then
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return(std_logic_vector(unsigned(d) + i));
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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function "+" (d : std_logic_vector; i : integer) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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begin
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if notx(d) then
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return(std_logic_vector(unsigned(d) + i));
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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function "+" (d : std_logic_vector; i : std_ulogic) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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variable y : std_logic_vector(0 downto 0);
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begin
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y(0) := i;
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if notx(d) then
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return(std_logic_vector(unsigned(d) + unsigned(y)));
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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-- unsigned subtraction
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function "-" (a, b : std_logic_vector) return std_logic_vector is
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variable x : std_logic_vector(a'length-1 downto 0);
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variable y : std_logic_vector(b'length-1 downto 0);
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begin
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if notx(a&b) then
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return(std_logic_vector(unsigned(a) - unsigned(b)));
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-- pragma translate_off
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else
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x := (others =>'X'); y := (others =>'X');
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if (x'length > y'length) then return(x); else return(y); end if;
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-- pragma translate_on
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end if;
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end;
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268 |
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269 |
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function "-" (d : std_logic_vector; i : integer) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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begin
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if notx(d) then
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return(std_logic_vector(unsigned(d) - i));
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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280 |
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function "-" (i : integer; d : std_logic_vector) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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begin
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if notx(d) then
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return(std_logic_vector(i - unsigned(d)));
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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291 |
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function "-" (d : std_logic_vector; i : std_ulogic) return std_logic_vector is
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variable x : std_logic_vector(d'length-1 downto 0);
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variable y : std_logic_vector(0 downto 0);
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begin
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y(0) := i;
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if notx(d) then
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return(std_logic_vector(unsigned(d) - unsigned(y)));
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298 |
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-- pragma translate_off
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else x := (others =>'X'); return(x);
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-- pragma translate_on
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end if;
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end;
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303 |
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304 |
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function ">=" (a, b : std_logic_vector) return boolean is
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305 |
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begin
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306 |
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return(unsigned(a) >= unsigned(b));
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end;
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308 |
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309 |
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function "<" (i : integer; b : std_logic_vector) return boolean is
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310 |
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begin
|
311 |
|
|
return( i < to_integer(unsigned(b)));
|
312 |
|
|
end;
|
313 |
|
|
|
314 |
|
|
function ">" (a, b : std_logic_vector) return boolean is
|
315 |
|
|
begin
|
316 |
|
|
return(unsigned(a) > unsigned(b));
|
317 |
|
|
end;
|
318 |
|
|
|
319 |
|
|
function conv_integer(v : std_logic_vector) return integer is
|
320 |
|
|
begin
|
321 |
|
|
if notx(v) then return(to_integer(unsigned(v)));
|
322 |
|
|
else return(0); end if;
|
323 |
|
|
end;
|
324 |
|
|
|
325 |
|
|
function conv_integer(v : std_logic) return integer is
|
326 |
|
|
begin
|
327 |
|
|
if notx(v) then
|
328 |
|
|
if v = '1' then return(1);
|
329 |
|
|
else return(0); end if;
|
330 |
|
|
else return(0); end if;
|
331 |
|
|
end;
|
332 |
|
|
|
333 |
|
|
function conv_std_logic_vector(i : integer; w : integer) return std_logic_vector is
|
334 |
|
|
variable tmp : std_logic_vector(w-1 downto 0);
|
335 |
|
|
begin
|
336 |
|
|
tmp := std_logic_vector(to_unsigned(i, w));
|
337 |
|
|
return(tmp);
|
338 |
|
|
end;
|
339 |
|
|
|
340 |
|
|
function conv_std_logic_vector_signed(i : integer; w : integer) return std_logic_vector is
|
341 |
|
|
variable tmp : std_logic_vector(w-1 downto 0);
|
342 |
|
|
begin
|
343 |
|
|
tmp := std_logic_vector(to_signed(i, w));
|
344 |
|
|
return(tmp);
|
345 |
|
|
end;
|
346 |
|
|
|
347 |
|
|
function conv_std_logic(b : boolean) return std_ulogic is
|
348 |
|
|
begin
|
349 |
|
|
if b then return('1'); else return('0'); end if;
|
350 |
|
|
end;
|
351 |
|
|
|
352 |
|
|
-- pragma translate_off
|
353 |
|
|
subtype nibble is std_logic_vector(3 downto 0);
|
354 |
|
|
|
355 |
|
|
function todec(i:integer) return character is
|
356 |
|
|
begin
|
357 |
|
|
case i is
|
358 |
|
|
when 0 => return('0');
|
359 |
|
|
when 1 => return('1');
|
360 |
|
|
when 2 => return('2');
|
361 |
|
|
when 3 => return('3');
|
362 |
|
|
when 4 => return('4');
|
363 |
|
|
when 5 => return('5');
|
364 |
|
|
when 6 => return('6');
|
365 |
|
|
when 7 => return('7');
|
366 |
|
|
when 8 => return('8');
|
367 |
|
|
when 9 => return('9');
|
368 |
|
|
when others => return('0');
|
369 |
|
|
end case;
|
370 |
|
|
end;
|
371 |
|
|
|
372 |
|
|
function tohex(n:nibble) return character is
|
373 |
|
|
begin
|
374 |
|
|
case n is
|
375 |
|
|
when "0000" => return('0');
|
376 |
|
|
when "0001" => return('1');
|
377 |
|
|
when "0010" => return('2');
|
378 |
|
|
when "0011" => return('3');
|
379 |
|
|
when "0100" => return('4');
|
380 |
|
|
when "0101" => return('5');
|
381 |
|
|
when "0110" => return('6');
|
382 |
|
|
when "0111" => return('7');
|
383 |
|
|
when "1000" => return('8');
|
384 |
|
|
when "1001" => return('9');
|
385 |
|
|
when "1010" => return('a');
|
386 |
|
|
when "1011" => return('b');
|
387 |
|
|
when "1100" => return('c');
|
388 |
|
|
when "1101" => return('d');
|
389 |
|
|
when "1110" => return('e');
|
390 |
|
|
when "1111" => return('f');
|
391 |
|
|
when others => return('X');
|
392 |
|
|
end case;
|
393 |
|
|
end;
|
394 |
|
|
|
395 |
|
|
function tost(v:std_logic_vector) return string is
|
396 |
|
|
constant vlen : natural := v'length; --'
|
397 |
|
|
constant slen : natural := (vlen+3)/4;
|
398 |
|
|
variable vv : std_logic_vector(0 to slen*4-1) := (others => '0');
|
399 |
|
|
variable s : string(1 to slen);
|
400 |
|
|
variable nz : boolean := false;
|
401 |
|
|
variable index : integer := -1;
|
402 |
|
|
begin
|
403 |
|
|
vv(slen*4-vlen to slen*4-1) := v;
|
404 |
|
|
for i in 0 to slen-1 loop
|
405 |
|
|
if (vv(i*4 to i*4+3) = "0000") and nz and (i /= (slen-1)) then
|
406 |
|
|
index := i;
|
407 |
|
|
else
|
408 |
|
|
nz := false;
|
409 |
|
|
s(i+1) := tohex(vv(i*4 to i*4+3));
|
410 |
|
|
end if;
|
411 |
|
|
end loop;
|
412 |
|
|
if ((index +2) = slen) then return(s(slen to slen));
|
413 |
|
|
else return(string'("0x") & s(index+2 to slen)); end if; --'
|
414 |
|
|
end;
|
415 |
|
|
|
416 |
|
|
function tost(v:std_logic) return string is
|
417 |
|
|
begin
|
418 |
|
|
if to_x01(v) = '1' then return("1"); else return("0"); end if;
|
419 |
|
|
end;
|
420 |
|
|
|
421 |
|
|
function tost(i : integer) return string is
|
422 |
|
|
variable L : line;
|
423 |
|
|
variable s, x : string(1 to 128);
|
424 |
|
|
variable n, tmp : integer := 0;
|
425 |
|
|
begin
|
426 |
|
|
tmp := i;
|
427 |
|
|
loop
|
428 |
|
|
s(128-n) := todec(tmp mod 10);
|
429 |
|
|
tmp := tmp / 10;
|
430 |
|
|
n := n+1;
|
431 |
|
|
if tmp = 0 then exit; end if;
|
432 |
|
|
end loop;
|
433 |
|
|
x(1 to n) := s(129-n to 128);
|
434 |
|
|
return(x(1 to n));
|
435 |
|
|
end;
|
436 |
|
|
|
437 |
|
|
procedure print(s : string) is
|
438 |
|
|
variable L : line;
|
439 |
|
|
begin
|
440 |
|
|
L := new string'(s); writeline(output, L);
|
441 |
|
|
end;
|
442 |
|
|
|
443 |
|
|
-- pragma translate_on
|
444 |
|
|
end;
|
445 |
|
|
|
446 |
|
|
|