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dimamali |
------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2003, Gaisler Research
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-----------------------------------------------------------------------------
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-- Package: atmel_components
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-- File: atmel_components.vhd
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-- Author: Jiri Gaisler - Gaisler Research
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-- Description: ATMEL ATC18 component declarations
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package atc18_components is
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-- input pad
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component pc33d00 port (pad : in std_logic; cin : out std_logic); end component;
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-- input pad with pull-up
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component pc33d00u port (pad : in std_logic; cin : out std_logic); end component;
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-- schmitt input pad
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component pc33d20 port (pad : in std_logic; cin : out std_logic); end component;
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-- schmitt input pad with pull-up
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component pt33d20u port (pad : inout std_logic; cin : out std_logic); end component;
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-- output pads
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component pt33o01 port (i : in std_logic; pad : out std_logic); end component;
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component pt33o02 port (i : in std_logic; pad : out std_logic); end component;
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component pt33o03 port (i : in std_logic; pad : out std_logic); end component;
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component pt33o04 port (i : in std_logic; pad : out std_logic); end component;
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-- tri-state output pads
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component pt33t01 port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t02 port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t03 port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t04 port (i, oen : in std_logic; pad : out std_logic); end component;
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-- tri-state output pads with pull-up
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component pt33t01u port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t02u port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t03u port (i, oen : in std_logic; pad : out std_logic); end component;
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component pt33t04u port (i, oen : in std_logic; pad : out std_logic); end component;
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-- bidirectional pads
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component pt33b01
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b02
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b03
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b04
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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-- bidirectional pads with pull-up
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component pt33b01u
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b02u
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b03u
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pt33b04u
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port (i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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--PCI pads
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component pp33o01
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port (i : in std_logic; pad : out std_logic);
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end component;
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component pp33b015vt
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port ( i, oen : in std_logic; cin : out std_logic; pad : inout std_logic);
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end component;
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component pp33t015vt
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port (i, oen : in std_logic; pad : out std_logic);
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end component;
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end;
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