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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [tech/] [unisim/] [simprims/] [xilinx_mem.vhd] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
------------------------------------------------------------------------------
2
--  This file is a part of the GRLIB VHDL IP LIBRARY
3
--  Copyright (C) 2003, Gaisler Research
4
--
5
--  This program is free software; you can redistribute it and/or modify
6
--  it under the terms of the GNU General Public License as published by
7
--  the Free Software Foundation; either version 2 of the License, or
8
--  (at your option) any later version.
9
--
10
--  This program is distributed in the hope that it will be useful,
11
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
12
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
--  GNU General Public License for more details.
14
--
15
--  You should have received a copy of the GNU General Public License
16
--  along with this program; if not, write to the Free Software
17
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
18
----------------------------------------------------------------------------
19
-- Simple simulation models for Xilinx block rams
20
-- Author: Jiri Gaisler
21
----------------------------------------------------------------------------
22
 
23
-- pragma translate_off
24
 
25
-- simulation models for block-rams
26
 
27
library ieee;
28
use ieee.std_logic_1164.all;
29
library unisim;
30
use unisim.simple_simprim.all;
31
 
32
entity RAMB4_S16 is
33
  port (
34
    do   : out std_logic_vector (15 downto 0);
35
    addr : in  std_logic_vector (7 downto 0);
36
    clk  : in  std_ulogic;
37
    di   : in  std_logic_vector (15 downto 0);
38
    en, rst, we : in std_ulogic);
39
end;
40
architecture behav of RAMB4_S16 is
41
begin x : ramb4_generic generic map (8,16)
42
          port map (di, en, we, rst, clk, addr, do);
43
end;
44
 
45
library ieee;
46
use ieee.std_logic_1164.all;
47
library unisim;
48
use unisim.simple_simprim.all;
49
 
50
entity RAMB4_S8 is
51
  port (do   : out std_logic_vector (7 downto 0);
52
        addr : in  std_logic_vector (8 downto 0);
53
        clk  : in  std_ulogic;
54
        di   : in  std_logic_vector (7 downto 0);
55
        en, rst, we : in std_ulogic);
56
end;
57
architecture behav of RAMB4_S8 is
58
begin x : ramb4_generic generic map (9,8)
59
          port map (di, en, we, rst, clk, addr, do);
60
end;
61
 
62
library ieee;
63
use ieee.std_logic_1164.all;
64
library unisim;
65
use unisim.simple_simprim.all;
66
 
67
entity RAMB4_S4 is
68
  port (do   : out std_logic_vector (3 downto 0);
69
        addr : in  std_logic_vector (9 downto 0);
70
        clk  : in  std_ulogic;
71
        di   : in  std_logic_vector (3 downto 0);
72
        en, rst, we : in std_ulogic);
73
end;
74
architecture behav of RAMB4_S4 is
75
begin x : ramb4_generic generic map (10,4)
76
          port map (di, en, we, rst, clk, addr, do);
77
end;
78
 
79
library ieee;
80
use ieee.std_logic_1164.all;
81
library unisim;
82
use unisim.simple_simprim.all;
83
 
84
entity RAMB4_S2 is
85
  port (do   : out std_logic_vector (1 downto 0);
86
        addr : in  std_logic_vector (10 downto 0);
87
        clk  : in  std_ulogic;
88
        di   : in  std_logic_vector (1 downto 0);
89
        en, rst, we : in std_ulogic);
90
end;
91
architecture behav of RAMB4_S2 is
92
begin x : ramb4_generic generic map (11,2)
93
          port map (di, en, we, rst, clk, addr, do);
94
end;
95
 
96
library ieee;
97
use ieee.std_logic_1164.all;
98
library unisim;
99
use unisim.simple_simprim.all;
100
 
101
entity RAMB4_S1 is
102
  port (do   : out std_logic_vector (0 downto 0);
103
        addr : in  std_logic_vector (11 downto 0);
104
        clk  : in  std_ulogic;
105
        di   : in  std_logic_vector (0 downto 0);
106
        en, rst, we : in std_ulogic);
107
end;
108
architecture behav of RAMB4_S1 is
109
begin x : ramb4_generic generic map (12,1)
110
          port map (di, en, we, rst, clk, addr, do);
111
end;
112
 
113
library ieee;
114
use ieee.std_logic_1164.all;
115
use ieee.numeric_std.all;
116
 
117
entity RAMB4_SX_SX is
118
  generic (abits : integer := 10; dbits : integer := 8 );
119
  port (DIA    : in std_logic_vector (dbits-1 downto 0);
120
        DIB    : in std_logic_vector (dbits-1 downto 0);
121
        ENA    : in std_ulogic;
122
        ENB    : in std_ulogic;
123
        WEA    : in std_ulogic;
124
        WEB    : in std_ulogic;
125
        RSTA   : in std_ulogic;
126
        RSTB   : in std_ulogic;
127
        CLKA   : in std_ulogic;
128
        CLKB   : in std_ulogic;
129
        ADDRA  : in std_logic_vector (abits-1 downto 0);
130
        ADDRB  : in std_logic_vector (abits-1 downto 0);
131
        DOA    : out std_logic_vector (dbits-1 downto 0);
132
        DOB    : out std_logic_vector (dbits-1 downto 0)
133
       );
134
end;
135
architecture behav of RAMB4_SX_SX is
136
begin
137
  rp : process(clka, clkb)
138
  subtype dword is std_logic_vector(dbits-1 downto 0);
139
  type dregtype is array (0 to 2**abits-1) of DWord;
140
  variable rfd : dregtype := (others => (others => '0'));
141
  begin
142
    if rising_edge(clka) and not is_x (addra) then
143
      if ena = '1' then
144
        doa <= rfd(to_integer(unsigned(addra)));
145
        if wea = '1' then rfd(to_integer(unsigned(addra))) := dia; end if;
146
      end if;
147
    end if;
148
    if rising_edge(clkb) and not is_x (addrb) then
149
      if enb = '1' then
150
        dob <= rfd(to_integer(unsigned(addrb)));
151
        if web = '1' then rfd(to_integer(unsigned(addrb))) := dib; end if;
152
      end if;
153
    end if;
154
  end process;
155
end;
156
 
157
library ieee;
158
use ieee.std_logic_1164.all;
159
use ieee.numeric_std.all;
160
library unisim;
161
use unisim.simple_simprim.all;
162
 
163
entity RAMB4_S1_S1 is
164
  port (
165
        doa    : out std_logic_vector (0 downto 0);
166
        dob    : out std_logic_vector (0 downto 0);
167
        addra  : in  std_logic_vector (11 downto 0);
168
        addrb  : in  std_logic_vector (11 downto 0);
169
        clka   : in  std_ulogic;
170
        clkb   : in  std_ulogic;
171
        dia    : in  std_logic_vector (0 downto 0);
172
        dib    : in  std_logic_vector (0 downto 0);
173
        ena    : in  std_ulogic;
174
        enb    : in  std_ulogic;
175
        rsta   : in  std_ulogic;
176
        rstb   : in  std_ulogic;
177
        wea    : in  std_ulogic;
178
        web    : in  std_ulogic
179
       );
180
end;
181
architecture behav of RAMB4_S1_S1 is
182
begin
183
  u0 : RAMB4_Sx_Sx generic map (12, 1)
184
       port map (DIA, DIB, ENA, ENB, WEA, WEB, RSTA, RSTB, CLKA, CLKB, ADDRA,
185
       ADDRB, DOA, DOB);
186
end;
187
 
188
library ieee;
189
use ieee.std_logic_1164.all;
190
library unisim;
191
use unisim.simple_simprim.all;
192
 
193
entity RAMB4_S2_S2 is
194
  port (
195
        doa    : out std_logic_vector (1 downto 0);
196
        dob    : out std_logic_vector (1 downto 0);
197
        addra  : in  std_logic_vector (10 downto 0);
198
        addrb  : in  std_logic_vector (10 downto 0);
199
        clka   : in  std_ulogic;
200
        clkb   : in  std_ulogic;
201
        dia    : in  std_logic_vector (1 downto 0);
202
        dib    : in  std_logic_vector (1 downto 0);
203
        ena    : in  std_ulogic;
204
        enb    : in  std_ulogic;
205
        rsta   : in  std_ulogic;
206
        rstb   : in  std_ulogic;
207
        wea    : in  std_ulogic;
208
        web    : in  std_ulogic
209
       );
210
end;
211
architecture behav of RAMB4_S2_S2 is
212
begin
213
  u0 : RAMB4_Sx_Sx generic map (11, 2)
214
       port map (DIA, DIB, ENA, ENB, WEA, WEB, RSTA, RSTB, CLKA, CLKB, ADDRA,
215
       ADDRB, DOA, DOB);
216
end;
217
 
218
library ieee;
219
use ieee.std_logic_1164.all;
220
library unisim;
221
use unisim.simple_simprim.all;
222
 
223
entity RAMB4_S8_S8 is
224
  port (
225
        doa    : out std_logic_vector (7 downto 0);
226
        dob    : out std_logic_vector (7 downto 0);
227
        addra  : in  std_logic_vector (8 downto 0);
228
        addrb  : in  std_logic_vector (8 downto 0);
229
        clka   : in  std_ulogic;
230
        clkb   : in  std_ulogic;
231
        dia    : in  std_logic_vector (7 downto 0);
232
        dib    : in  std_logic_vector (7 downto 0);
233
        ena    : in  std_ulogic;
234
        enb    : in  std_ulogic;
235
        rsta   : in  std_ulogic;
236
        rstb   : in  std_ulogic;
237
        wea    : in  std_ulogic;
238
        web    : in  std_ulogic
239
       );
240
end;
241
 
242
architecture behav of RAMB4_S8_S8 is
243
begin
244
  u0 : RAMB4_Sx_Sx generic map (9, 8)
245
       port map (DIA, DIB, ENA, ENB, WEA, WEB, RSTA, RSTB, CLKA, CLKB, ADDRA,
246
       ADDRB, DOA, DOB);
247
end;
248
 
249
library ieee;
250
use ieee.std_logic_1164.all;
251
library unisim;
252
use unisim.simple_simprim.all;
253
 
254
entity RAMB4_S4_S4 is
255
  port (
256
        doa    : out std_logic_vector (3 downto 0);
257
        dob    : out std_logic_vector (3 downto 0);
258
        addra  : in  std_logic_vector (9 downto 0);
259
        addrb  : in  std_logic_vector (9 downto 0);
260
        clka   : in  std_ulogic;
261
        clkb   : in  std_ulogic;
262
        dia    : in  std_logic_vector (3 downto 0);
263
        dib    : in  std_logic_vector (3 downto 0);
264
        ena    : in  std_ulogic;
265
        enb    : in  std_ulogic;
266
        rsta   : in  std_ulogic;
267
        rstb   : in  std_ulogic;
268
        wea    : in  std_ulogic;
269
        web    : in  std_ulogic
270
       );
271
end;
272
architecture behav of RAMB4_S4_S4 is
273
begin
274
  u0 : RAMB4_Sx_Sx generic map (10, 4)
275
       port map (DIA, DIB, ENA, ENB, WEA, WEB, RSTA, RSTB, CLKA, CLKB, ADDRA,
276
       ADDRB, DOA, DOB);
277
end;
278
 
279
library ieee;
280
use ieee.std_logic_1164.all;
281
library unisim;
282
use unisim.simple_simprim.all;
283
 
284
entity RAMB4_S16_S16 is
285
  port (
286
        doa    : out std_logic_vector (15 downto 0);
287
        dob    : out std_logic_vector (15 downto 0);
288
        addra  : in  std_logic_vector (7 downto 0);
289
        addrb  : in  std_logic_vector (7 downto 0);
290
        clka   : in  std_ulogic;
291
        clkb   : in  std_ulogic;
292
        dia    : in  std_logic_vector (15 downto 0);
293
        dib    : in  std_logic_vector (15 downto 0);
294
        ena    : in  std_ulogic;
295
        enb    : in  std_ulogic;
296
        rsta   : in  std_ulogic;
297
        rstb   : in  std_ulogic;
298
        wea    : in  std_ulogic;
299
        web    : in  std_ulogic
300
       );
301
end;
302
architecture behav of RAMB4_S16_S16 is
303
begin
304
  u0 : RAMB4_Sx_Sx generic map (8, 16)
305
       port map (DIA, DIB, ENA, ENB, WEA, WEB, RSTA, RSTB, CLKA, CLKB, ADDRA,
306
       ADDRB, DOA, DOB);
307
end;
308
 
309
library ieee;
310
use ieee.std_logic_1164.all;
311
library unisim;
312
use unisim.simple_simprim.all;
313
 
314
entity RAMB16_S1 is
315
-- pragma translate_off
316
        generic
317
        (
318
                INIT : bit_vector := X"0";
319
                SRVAL : bit_vector := X"0";
320
                WRITE_MODE : string := "WRITE_FIRST";
321
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
322
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
323
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
324
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
325
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
326
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
327
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
328
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
329
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
330
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
331
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
332
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
333
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
334
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
335
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
336
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
337
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
338
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
339
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
340
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
341
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
342
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
343
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
344
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
345
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
346
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
347
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
348
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
349
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
350
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
351
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
352
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
353
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
354
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
355
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
356
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
357
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
358
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
359
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
360
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
361
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
362
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
363
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
364
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
365
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
366
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
367
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
368
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
369
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
370
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
371
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
372
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
373
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
374
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
375
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
376
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
377
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
378
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
379
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
380
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
381
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
382
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
383
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
384
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
385
        );
386
-- pragma translate_on
387
 port (
388
   DO : out std_logic_vector (0 downto 0);
389
   ADDR : in std_logic_vector (13 downto 0);
390
   CLK : in std_ulogic;
391
   DI : in std_logic_vector (0 downto 0);
392
   EN : in std_ulogic;
393
   SSR : in std_ulogic;
394
   WE : in std_ulogic
395
 );
396
end;
397
architecture behav of RAMB16_S1 is
398
begin x : ramb16_sx generic map (14,1)
399
          port map (do, addr, di, en, clk, we, ssr);
400
end;
401
 
402
library ieee;
403
use ieee.std_logic_1164.all;
404
library unisim;
405
use unisim.simple_simprim.all;
406
 
407
entity RAMB16_S2 is
408
-- pragma translate_off
409
        generic
410
        (
411
                INIT : bit_vector := X"0";
412
                SRVAL : bit_vector := X"0";
413
                WRITE_MODE : string := "WRITE_FIRST";
414
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
415
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
416
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
417
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
418
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
419
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
420
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
421
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
422
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
423
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
424
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
425
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
426
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
427
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
428
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
429
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
430
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
431
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
432
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
433
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
434
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
435
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
436
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
437
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
438
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
439
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
440
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
441
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
442
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
443
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
444
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
445
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
446
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
447
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
448
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
449
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
450
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
451
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
452
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
453
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
454
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
455
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
456
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
457
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
458
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
459
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
460
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
461
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
462
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
463
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
464
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
465
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
466
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
467
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
468
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
469
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
470
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
471
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
472
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
473
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
474
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
475
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
476
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
477
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
478
        );
479
-- pragma translate_on
480
 port (
481
   DO : out std_logic_vector (1 downto 0);
482
   ADDR : in std_logic_vector (12 downto 0);
483
   CLK : in std_ulogic;
484
   DI : in std_logic_vector (1 downto 0);
485
   EN : in std_ulogic;
486
   SSR : in std_ulogic;
487
   WE : in std_ulogic
488
 );
489
end;
490
architecture behav of RAMB16_S2 is
491
begin x : ramb16_sx generic map (13,2)
492
          port map (do, addr, di, en, clk, we, ssr);
493
end;
494
 
495
library ieee;
496
use ieee.std_logic_1164.all;
497
library unisim;
498
use unisim.simple_simprim.all;
499
 
500
entity RAMB16_S4 is
501
-- pragma translate_off
502
        generic
503
        (
504
                INIT : bit_vector := X"0";
505
                SRVAL : bit_vector := X"0";
506
                WRITE_MODE : string := "WRITE_FIRST";
507
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
508
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
509
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
510
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
511
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
512
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
513
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
514
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
515
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
516
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
517
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
518
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
519
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
520
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
521
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
522
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
523
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
524
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
525
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
526
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
527
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
528
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
529
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
530
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
531
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
532
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
533
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
534
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
535
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
536
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
537
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
538
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
539
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
540
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
541
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
542
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
543
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
544
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
545
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
546
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
547
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
548
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
549
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
550
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
551
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
552
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
553
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
554
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
555
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
556
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
557
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
558
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
559
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
560
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
561
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
562
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
563
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
564
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
565
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
566
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
567
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
568
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
569
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
570
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
571
        );
572
-- pragma translate_on
573
 port (
574
   DO : out std_logic_vector (3 downto 0);
575
   ADDR : in std_logic_vector (11 downto 0);
576
   CLK : in std_ulogic;
577
   DI : in std_logic_vector (3 downto 0);
578
   EN : in std_ulogic;
579
   SSR : in std_ulogic;
580
   WE : in std_ulogic
581
 );
582
end;
583
architecture behav of RAMB16_S4 is
584
begin x : ramb16_sx generic map (12,4)
585
          port map (do, addr, di, en, clk, we, ssr);
586
end;
587
 
588
library ieee;
589
use ieee.std_logic_1164.all;
590
library unisim;
591
use unisim.simple_simprim.all;
592
 
593
entity RAMB16_S9 is
594
-- pragma translate_off
595
        generic
596
        (
597
                INIT : bit_vector := X"000";
598
                SRVAL : bit_vector := X"000";
599
                WRITE_MODE : string := "WRITE_FIRST";
600
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
601
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
602
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
603
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
604
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
605
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
606
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
607
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
608
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
609
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
610
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
611
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
612
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
613
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
614
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
615
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
616
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
617
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
618
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
619
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
620
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
621
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
622
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
623
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
624
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
625
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
626
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
627
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
628
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
629
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
630
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
631
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
632
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
633
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
634
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
635
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
636
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
637
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
638
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
639
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
640
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
641
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
642
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
643
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
644
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
645
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
646
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
647
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
648
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
649
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
650
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
651
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
652
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
653
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
654
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
655
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
656
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
657
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
658
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
659
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
660
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
661
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
662
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
663
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
664
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
665
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
666
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
667
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
668
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
669
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
670
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
671
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
672
        );
673
-- pragma translate_on
674
 port (
675
   DO : out std_logic_vector (7 downto 0);
676
   DOP : out std_logic_vector (0 downto 0);
677
   ADDR : in std_logic_vector (10 downto 0);
678
   CLK : in std_ulogic;
679
   DI : in std_logic_vector (7 downto 0);
680
   DIP : in std_logic_vector (0 downto 0);
681
   EN : in std_ulogic;
682
   SSR : in std_ulogic;
683
   WE : in std_ulogic
684
 );
685
end;
686
architecture behav of RAMB16_S9 is
687
signal dix, dox : std_logic_vector (8 downto 0);
688
begin x : ramb16_sx generic map (11,9)
689
          port map (dox, addr, dix, en, clk, we, ssr);
690
  dix <= dip & di; dop <= dox(8 downto 8); do <= dox(7 downto 0);
691
end;
692
 
693
library ieee;
694
use ieee.std_logic_1164.all;
695
library unisim;
696
use unisim.simple_simprim.all;
697
 
698
entity RAMB16_S18 is
699
-- pragma translate_off
700
        generic
701
        (
702
                INIT : bit_vector := X"00000";
703
                SRVAL : bit_vector := X"00000";
704
                write_mode : string := "WRITE_FIRST";
705
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
706
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
707
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
708
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
709
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
710
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
711
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
712
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
713
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
714
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
715
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
716
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
717
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
718
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
719
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
720
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
721
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
722
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
723
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
724
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
725
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
726
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
727
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
728
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
729
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
730
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
731
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
732
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
733
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
734
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
735
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
736
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
737
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
738
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
739
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
740
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
741
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
742
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
743
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
744
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
745
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
746
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
747
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
748
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
749
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
750
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
751
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
752
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
753
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
754
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
755
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
756
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
757
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
758
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
759
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
760
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
761
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
762
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
763
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
764
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
765
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
766
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
767
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
768
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
769
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
770
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
771
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
772
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
773
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
774
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
775
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
776
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
777
        );
778
-- pragma translate_on
779
 port (
780
    DO : out std_logic_vector (15 downto 0);
781
    DOP : out std_logic_vector (1 downto 0);
782
    ADDR : in std_logic_vector (9 downto 0);
783
    CLK : in std_ulogic;
784
    DI : in std_logic_vector (15 downto 0);
785
    DIP : in std_logic_vector (1 downto 0);
786
    EN : in std_ulogic;
787
    SSR : in std_ulogic;
788
    WE : in std_ulogic
789
 );
790
end;
791
architecture behav of RAMB16_S18 is
792
signal dix, dox : std_logic_vector (17 downto 0);
793
begin x : ramb16_sx generic map (10,18)
794
          port map (dox, addr, dix, en, clk, we, ssr);
795
  dix <= dip & di; dop <= dox(17 downto 16); do <= dox(15 downto 0);
796
end;
797
 
798
library ieee;
799
use ieee.std_logic_1164.all;
800
library unisim;
801
use unisim.simple_simprim.all;
802
 
803
entity RAMB16_S36 is
804
-- pragma translate_off
805
        generic
806
        (
807
                INIT : bit_vector := X"000000000";
808
                SRVAL : bit_vector := X"000000000";
809
                WRITE_MODE : string := "WRITE_FIRST";
810
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
811
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
812
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
813
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
814
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
815
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
816
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
817
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
818
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
819
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
820
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
821
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
822
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
823
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
824
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
825
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
826
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
827
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
828
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
829
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
830
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
831
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
832
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
833
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
834
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
835
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
836
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
837
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
838
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
839
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
840
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
841
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
842
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
843
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
844
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
845
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
846
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
847
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
848
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
849
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
850
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
851
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
852
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
853
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
854
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
855
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
856
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
857
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
858
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
859
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
860
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
861
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
862
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
863
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
864
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
865
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
866
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
867
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
868
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
869
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
870
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
871
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
872
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
873
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
874
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
875
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
876
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
877
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
878
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
879
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
880
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
881
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
882
        );
883
-- pragma translate_on
884
 port (
885
   DO : out std_logic_vector (31 downto 0);
886
   DOP : out std_logic_vector (3 downto 0);
887
   ADDR : in std_logic_vector (8 downto 0);
888
   CLK : in std_ulogic;
889
   DI : in std_logic_vector (31 downto 0);
890
   DIP : in std_logic_vector (3 downto 0);
891
   EN : in std_ulogic;
892
   SSR : in std_ulogic;
893
   WE : in std_ulogic
894
 );
895
end;
896
architecture behav of RAMB16_S36 is
897
signal dix, dox : std_logic_vector (35 downto 0);
898
begin x : ramb16_sx generic map (9, 36)
899
          port map (dox, addr, dix, en, clk, we, ssr);
900
  dix <= dip & di; dop <= dox(35 downto 32); do <= dox(31 downto 0);
901
end;
902
 
903
 
904
library ieee;
905
use ieee.std_logic_1164.all;
906
library unisim;
907
use unisim.simple_simprim.all;
908
 
909
entity RAMB16_S1_S1 is
910
-- pragma translate_off
911
        generic
912
        (
913
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
914
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
915
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
916
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
917
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
918
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
919
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
920
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
921
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
922
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
923
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
924
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
925
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
926
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
927
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
928
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
929
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
930
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
931
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
932
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
933
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
934
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
935
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
936
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
937
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
938
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
939
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
940
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
941
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
942
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
943
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
944
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
945
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
946
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
947
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
948
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
949
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
950
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
951
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
952
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
953
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
954
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
955
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
956
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
957
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
958
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
959
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
960
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
961
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
962
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
963
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
964
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
965
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
966
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
967
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
968
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
969
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
970
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
971
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
972
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
973
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
974
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
975
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
976
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
977
                INIT_A : bit_vector := X"0";
978
                INIT_B : bit_vector := X"0";
979
                SIM_COLLISION_CHECK : string := "ALL";
980
                SRVAL_A : bit_vector := X"0";
981
                SRVAL_B : bit_vector := X"0";
982
                WRITE_MODE_A : string := "WRITE_FIRST";
983
                WRITE_MODE_B : string := "WRITE_FIRST"
984
        );
985
-- pragma translate_on
986
  port (
987
   DOA : out std_logic_vector (0 downto 0);
988
   DOB : out std_logic_vector (0 downto 0);
989
   ADDRA : in std_logic_vector (13 downto 0);
990
   ADDRB : in std_logic_vector (13 downto 0);
991
   CLKA : in std_ulogic;
992
   CLKB : in std_ulogic;
993
   DIA : in std_logic_vector (0 downto 0);
994
   DIB : in std_logic_vector (0 downto 0);
995
   ENA : in std_ulogic;
996
   ENB : in std_ulogic;
997
   SSRA : in std_ulogic;
998
   SSRB : in std_ulogic;
999
   WEA : in std_ulogic;
1000
   WEB : in std_ulogic
1001
  );
1002
end;
1003
architecture behav of RAMB16_S1_S1 is
1004
begin
1005
  x : ram16_sx_sx generic map (14, 1)
1006
  port map (doa, dob, addra, clka, dia, ena, wea, addrb, clkb, dib, enb, web);
1007
end;
1008
 
1009
library ieee;
1010
use ieee.std_logic_1164.all;
1011
library unisim;
1012
use unisim.simple_simprim.all;
1013
 
1014
entity RAMB16_S2_S2 is
1015
-- pragma translate_off
1016
        generic
1017
        (
1018
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1019
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1020
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1021
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1022
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1023
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1024
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1025
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1026
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1027
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1028
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1029
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1030
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1031
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1032
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1033
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1034
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1035
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1036
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1037
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1038
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1039
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1040
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1041
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1042
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1043
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1044
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1045
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1046
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1047
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1048
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1049
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1050
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1051
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1052
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1053
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1054
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1055
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1056
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1057
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1058
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1059
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1060
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1061
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1062
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1063
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1064
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1065
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1066
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1067
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1068
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1069
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1070
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1071
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1072
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1073
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1074
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1075
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1076
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1077
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1078
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1079
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1080
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1081
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1082
                INIT_A : bit_vector := X"0";
1083
                INIT_B : bit_vector := X"0";
1084
                SIM_COLLISION_CHECK : string := "ALL";
1085
                SRVAL_A : bit_vector := X"0";
1086
                SRVAL_B : bit_vector := X"0";
1087
                WRITE_MODE_A : string := "WRITE_FIRST";
1088
                WRITE_MODE_B : string := "WRITE_FIRST"
1089
        );
1090
-- pragma translate_on
1091
  port (
1092
   DOA : out std_logic_vector (1 downto 0);
1093
   DOB : out std_logic_vector (1 downto 0);
1094
   ADDRA : in std_logic_vector (12 downto 0);
1095
   ADDRB : in std_logic_vector (12 downto 0);
1096
   CLKA : in std_ulogic;
1097
   CLKB : in std_ulogic;
1098
   DIA : in std_logic_vector (1 downto 0);
1099
   DIB : in std_logic_vector (1 downto 0);
1100
   ENA : in std_ulogic;
1101
   ENB : in std_ulogic;
1102
   SSRA : in std_ulogic;
1103
   SSRB : in std_ulogic;
1104
   WEA : in std_ulogic;
1105
   WEB : in std_ulogic
1106
  );
1107
end;
1108
architecture behav of RAMB16_S2_S2 is
1109
begin
1110
  x : ram16_sx_sx generic map (13, 2)
1111
  port map (doa, dob, addra, clka, dia, ena, wea, addrb, clkb, dib, enb, web);
1112
end;
1113
 
1114
 
1115
library ieee;
1116
use ieee.std_logic_1164.all;
1117
library unisim;
1118
use unisim.simple_simprim.all;
1119
 
1120
entity RAMB16_S4_S4 is
1121
-- pragma translate_off
1122
        generic
1123
        (
1124
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1125
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1126
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1127
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1128
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1129
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1130
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1131
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1132
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1133
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1134
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1135
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1136
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1137
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1138
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1139
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1140
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1141
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1142
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1143
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1144
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1145
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1146
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1147
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1148
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1149
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1150
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1151
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1152
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1153
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1154
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1155
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1156
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1157
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1158
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1159
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1160
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1161
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1162
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1163
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1164
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1165
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1166
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1167
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1168
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1169
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1170
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1171
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1172
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1173
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1174
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1175
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1176
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1177
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1178
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1179
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1180
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1181
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1182
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1183
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1184
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1185
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1186
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1187
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1188
                INIT_A : bit_vector := X"0";
1189
                INIT_B : bit_vector := X"0";
1190
                SIM_COLLISION_CHECK : string := "ALL";
1191
                SRVAL_A : bit_vector := X"0";
1192
                SRVAL_B : bit_vector := X"0";
1193
                WRITE_MODE_A : string := "WRITE_FIRST";
1194
                WRITE_MODE_B : string := "WRITE_FIRST"
1195
        );
1196
-- pragma translate_on
1197
  port (
1198
   DOA : out std_logic_vector (3 downto 0);
1199
   DOB : out std_logic_vector (3 downto 0);
1200
   ADDRA : in std_logic_vector (11 downto 0);
1201
   ADDRB : in std_logic_vector (11 downto 0);
1202
   CLKA : in std_ulogic;
1203
   CLKB : in std_ulogic;
1204
   DIA : in std_logic_vector (3 downto 0);
1205
   DIB : in std_logic_vector (3 downto 0);
1206
   ENA : in std_ulogic;
1207
   ENB : in std_ulogic;
1208
   SSRA : in std_ulogic;
1209
   SSRB : in std_ulogic;
1210
   WEA : in std_ulogic;
1211
   WEB : in std_ulogic
1212
  );
1213
end;
1214
architecture behav of RAMB16_S4_S4 is
1215
begin
1216
  x : ram16_sx_sx generic map (12, 4)
1217
  port map (doa, dob, addra, clka, dia, ena, wea, addrb, clkb, dib, enb, web);
1218
end;
1219
 
1220
library ieee;
1221
use ieee.std_logic_1164.all;
1222
library unisim;
1223
use unisim.simple_simprim.all;
1224
 
1225
entity RAMB16_S9_S9 is
1226
-- pragma translate_off
1227
        generic
1228
        (
1229
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1230
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1231
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1232
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1233
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1234
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1235
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1236
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1237
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1238
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1239
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1240
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1241
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1242
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1243
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1244
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1245
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1246
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1247
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1248
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1249
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1250
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1251
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1252
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1253
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1254
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1255
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1256
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1257
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1258
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1259
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1260
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1261
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1262
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1263
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1264
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1265
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1266
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1267
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1268
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1269
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1270
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1271
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1272
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1273
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1274
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1275
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1276
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1277
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1278
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1279
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1280
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1281
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1282
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1283
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1284
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1285
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1286
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1287
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1288
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1289
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1290
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1291
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1292
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1293
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1294
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1295
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1296
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1297
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1298
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1299
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1300
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1301
                INIT_A : bit_vector := X"000";
1302
                INIT_B : bit_vector := X"000";
1303
                SIM_COLLISION_CHECK : string := "ALL";
1304
                SRVAL_A : bit_vector := X"000";
1305
                SRVAL_B : bit_vector := X"000";
1306
                WRITE_MODE_A : string := "WRITE_FIRST";
1307
                WRITE_MODE_B : string := "WRITE_FIRST"
1308
        );
1309
-- pragma translate_on
1310
  port (
1311
   DOA : out std_logic_vector (7 downto 0);
1312
   DOB : out std_logic_vector (7 downto 0);
1313
   DOPA : out std_logic_vector (0 downto 0);
1314
   DOPB : out std_logic_vector (0 downto 0);
1315
   ADDRA : in std_logic_vector (10 downto 0);
1316
   ADDRB : in std_logic_vector (10 downto 0);
1317
   CLKA : in std_ulogic;
1318
   CLKB : in std_ulogic;
1319
   DIA : in std_logic_vector (7 downto 0);
1320
   DIB : in std_logic_vector (7 downto 0);
1321
   DIPA : in std_logic_vector (0 downto 0);
1322
   DIPB : in std_logic_vector (0 downto 0);
1323
   ENA : in std_ulogic;
1324
   ENB : in std_ulogic;
1325
   SSRA : in std_ulogic;
1326
   SSRB : in std_ulogic;
1327
   WEA : in std_ulogic;
1328
   WEB : in std_ulogic
1329
 );
1330
end;
1331
architecture behav of RAMB16_S9_S9 is
1332
signal diax, doax, dibx, dobx : std_logic_vector (8 downto 0);
1333
begin
1334
  x : ram16_sx_sx generic map (11, 9)
1335
  port map (doax, dobx, addra, clka, diax, ena, wea, addrb, clkb, dibx, enb, web);
1336
  diax <= dipa & dia; dopa <= doax(8 downto 8); doa <= doax(7 downto 0);
1337
  dibx <= dipb & dib; dopb <= dobx(8 downto 8); dob <= dobx(7 downto 0);
1338
end;
1339
 
1340
library ieee;
1341
use ieee.std_logic_1164.all;
1342
library unisim;
1343
use unisim.simple_simprim.all;
1344
 
1345
entity RAMB16_S18_S18 is
1346
-- pragma translate_off
1347
        generic
1348
        (
1349
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1350
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1351
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1352
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1353
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1354
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1355
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1356
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1357
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1358
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1359
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1360
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1361
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1362
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1363
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1364
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1365
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1366
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1367
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1368
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1369
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1370
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1371
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1372
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1373
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1374
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1375
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1376
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1377
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1378
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1379
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1380
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1381
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1382
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1383
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1384
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1385
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1386
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1387
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1388
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1389
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1390
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1391
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1392
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1393
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1394
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1395
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1396
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1397
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1398
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1399
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1400
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1401
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1402
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1403
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1404
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1405
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1406
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1407
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1408
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1409
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1410
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1411
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1412
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1413
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1414
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1415
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1416
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1417
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1418
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1419
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1420
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1421
                INIT_A : bit_vector := X"00000";
1422
                INIT_B : bit_vector := X"00000";
1423
                SIM_COLLISION_CHECK : string := "ALL";
1424
                SRVAL_A : bit_vector := X"00000";
1425
                SRVAL_B : bit_vector := X"00000";
1426
                WRITE_MODE_A : string := "WRITE_FIRST";
1427
                WRITE_MODE_B : string := "WRITE_FIRST"
1428
        );
1429
-- pragma translate_on
1430
  port (
1431
    DOA : out std_logic_vector (15 downto 0);
1432
    DOB : out std_logic_vector (15 downto 0);
1433
    DOPA : out std_logic_vector (1 downto 0);
1434
    DOPB : out std_logic_vector (1 downto 0);
1435
    ADDRA : in std_logic_vector (9 downto 0);
1436
    ADDRB : in std_logic_vector (9 downto 0);
1437
    CLKA : in std_ulogic;
1438
    CLKB : in std_ulogic;
1439
    DIA : in std_logic_vector (15 downto 0);
1440
    DIB : in std_logic_vector (15 downto 0);
1441
    DIPA : in std_logic_vector (1 downto 0);
1442
    DIPB : in std_logic_vector (1 downto 0);
1443
    ENA : in std_ulogic;
1444
    ENB : in std_ulogic;
1445
    SSRA : in std_ulogic;
1446
    SSRB : in std_ulogic;
1447
    WEA : in std_ulogic;
1448
    WEB : in std_ulogic);
1449
end;
1450
architecture behav of RAMB16_S18_S18 is
1451
signal diax, doax, dibx, dobx : std_logic_vector (17 downto 0);
1452
begin
1453
  x : ram16_sx_sx generic map (10, 18)
1454
  port map (doax, dobx, addra, clka, diax, ena, wea, addrb, clkb, dibx, enb, web);
1455
  diax <= dipa & dia; dopa <= doax(17 downto 16); doa <= doax(15 downto 0);
1456
  dibx <= dipb & dib; dopb <= dobx(17 downto 16); dob <= dobx(15 downto 0);
1457
end;
1458
 
1459
library ieee;
1460
use ieee.std_logic_1164.all;
1461
library unisim;
1462
use unisim.simple_simprim.all;
1463
 
1464
entity RAMB16_S36_S36 is
1465
-- pragma translate_off
1466
        generic
1467
        (
1468
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1469
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1470
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1471
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1472
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1473
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1474
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1475
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1476
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1477
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1478
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1479
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1480
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1481
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1482
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1483
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1484
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1485
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1486
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1487
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1488
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1489
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1490
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1491
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1492
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1493
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1494
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1495
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1496
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1497
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1498
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1499
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1500
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1501
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1502
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1503
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1504
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1505
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1506
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1507
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1508
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1509
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1510
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1511
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1512
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1513
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1514
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1515
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1516
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1517
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1518
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1519
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1520
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1521
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1522
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1523
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1524
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1525
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1526
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1527
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1528
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1529
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1530
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1531
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1532
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1533
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1534
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1535
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1536
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1537
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1538
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1539
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1540
                INIT_A : bit_vector := X"000000000";
1541
                INIT_B : bit_vector := X"000000000";
1542
                SIM_COLLISION_CHECK : string := "ALL";
1543
                SRVAL_A : bit_vector := X"000000000";
1544
                SRVAL_B : bit_vector := X"000000000";
1545
                WRITE_MODE_A : string := "WRITE_FIRST";
1546
                WRITE_MODE_B : string := "WRITE_FIRST"
1547
        );
1548
-- pragma translate_on
1549
  port (
1550
    DOA : out std_logic_vector (31 downto 0);
1551
    DOB : out std_logic_vector (31 downto 0);
1552
    DOPA : out std_logic_vector (3 downto 0);
1553
    DOPB : out std_logic_vector (3 downto 0);
1554
    ADDRA : in std_logic_vector (8 downto 0);
1555
    ADDRB : in std_logic_vector (8 downto 0);
1556
    CLKA : in std_ulogic;
1557
    CLKB : in std_ulogic;
1558
    DIA : in std_logic_vector (31 downto 0);
1559
    DIB : in std_logic_vector (31 downto 0);
1560
    DIPA : in std_logic_vector (3 downto 0);
1561
    DIPB : in std_logic_vector (3 downto 0);
1562
    ENA : in std_ulogic;
1563
    ENB : in std_ulogic;
1564
    SSRA : in std_ulogic;
1565
    SSRB : in std_ulogic;
1566
    WEA : in std_ulogic;
1567
    WEB : in std_ulogic);
1568
end;
1569
architecture behav of RAMB16_S36_S36 is
1570
signal diax, doax, dibx, dobx : std_logic_vector (35 downto 0);
1571
begin
1572
  x : ram16_sx_sx generic map (9, 36)
1573
  port map (doax, dobx, addra, clka, diax, ena, wea, addrb, clkb, dibx, enb, web);
1574
  diax <= dipa & dia; dopa <= doax(35 downto 32); doa <= doax(31 downto 0);
1575
  dibx <= dipb & dib; dopb <= dobx(35 downto 32); dob <= dobx(31 downto 0);
1576
end;
1577
 
1578
-- pragma translate_on

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