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dimamali |
------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2003, Gaisler Research
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-----------------------------------------------------------------------------
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-- Entity: grusbhc_axcelerator
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-- File: grusbhc_axcelerator.vhd
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-- Author: Jonas Ekergarn - Gaisler Research
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-- Description: tech wrapper for axcelerator GRUSBHC netlist
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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library axcelerator;
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use axcelerator.all;
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library techmap;
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use techmap.grusbhc_axceleratorpkg.all;
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use techmap.gencomp.all;
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entity grusbhc_axcelerator is
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generic (
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nports : integer range 1 to 15 := 1;
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ehcgen : integer range 0 to 1 := 1;
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uhcgen : integer range 0 to 1 := 1;
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n_cc : integer range 1 to 15 := 1;
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n_pcc : integer range 1 to 15 := 1;
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prr : integer range 0 to 1 := 0;
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portroute1 : integer := 0;
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portroute2 : integer := 0;
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endian_conv : integer range 0 to 1 := 1;
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be_regs : integer range 0 to 1 := 0;
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be_desc : integer range 0 to 1 := 0;
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uhcblo : integer range 0 to 255 := 2;
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bwrd : integer range 1 to 256 := 16;
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utm_type : integer range 0 to 2 := 2;
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vbusconf : integer range 0 to 3 := 3;
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ramtest : integer range 0 to 1 := 0;
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urst_time : integer := 250;
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oepol : integer range 0 to 1 := 0;
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scantest : integer := 0;
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memtech : integer range 0 to NTECH := DEFMEMTECH
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);
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port (
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clk : in std_ulogic;
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uclk : in std_ulogic;
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rst : in std_ulogic;
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-- EHC apb_slv_in_type unwrapped
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ehc_apbsi_psel : in std_ulogic;
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ehc_apbsi_penable : in std_ulogic;
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ehc_apbsi_paddr : in std_logic_vector(31 downto 0);
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ehc_apbsi_pwrite : in std_ulogic;
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ehc_apbsi_pwdata : in std_logic_vector(31 downto 0);
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ehc_apbsi_testen : in std_ulogic;
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ehc_apbsi_testrst : in std_ulogic;
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ehc_apbsi_scanen : in std_ulogic;
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-- EHC apb_slv_out_type unwrapped
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ehc_apbso_prdata : out std_logic_vector(31 downto 0);
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ehc_apbso_pirq : out std_ulogic;
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-- EHC/UHC ahb_mst_in_type unwrapped
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ahbmi_hgrant : in std_logic_vector(n_cc*uhcgen downto 0);
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ahbmi_hready : in std_ulogic;
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ahbmi_hresp : in std_logic_vector(1 downto 0);
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ahbmi_hrdata : in std_logic_vector(31 downto 0);
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ahbmi_hcache : in std_ulogic;
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ahbmi_testen : in std_ulogic;
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ahbmi_testrst : in std_ulogic;
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ahbmi_scanen : in std_ulogic;
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-- UHC ahb_slv_in_type unwrapped
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uhc_ahbsi_hsel : in std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbsi_haddr : in std_logic_vector(31 downto 0);
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uhc_ahbsi_hwrite : in std_ulogic;
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uhc_ahbsi_htrans : in std_logic_vector(1 downto 0);
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uhc_ahbsi_hsize : in std_logic_vector(2 downto 0);
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uhc_ahbsi_hwdata : in std_logic_vector(31 downto 0);
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uhc_ahbsi_hready : in std_ulogic;
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uhc_ahbsi_testen : in std_ulogic;
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uhc_ahbsi_testrst : in std_ulogic;
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uhc_ahbsi_scanen : in std_ulogic;
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-- EHC ahb_mst_out_type_unwrapped
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ehc_ahbmo_hbusreq : out std_ulogic;
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ehc_ahbmo_hlock : out std_ulogic;
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ehc_ahbmo_htrans : out std_logic_vector(1 downto 0);
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ehc_ahbmo_haddr : out std_logic_vector(31 downto 0);
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ehc_ahbmo_hwrite : out std_ulogic;
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ehc_ahbmo_hsize : out std_logic_vector(2 downto 0);
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ehc_ahbmo_hburst : out std_logic_vector(2 downto 0);
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ehc_ahbmo_hprot : out std_logic_vector(3 downto 0);
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ehc_ahbmo_hwdata : out std_logic_vector(31 downto 0);
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-- UHC ahb_mst_out_vector_type unwrapped
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uhc_ahbmo_hbusreq : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hlock : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_htrans : out std_logic_vector((n_cc*2)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_haddr : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hwrite : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hsize : out std_logic_vector((n_cc*3)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hburst : out std_logic_vector((n_cc*3)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hprot : out std_logic_vector((n_cc*4)*uhcgen downto 1*uhcgen);
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uhc_ahbmo_hwdata : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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-- UHC ahb_slv_out_vector_type unwrapped
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uhc_ahbso_hready : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbso_hresp : out std_logic_vector((n_cc*2)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hrdata : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hsplit : out std_logic_vector((n_cc*16)*uhcgen downto 1*uhcgen);
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uhc_ahbso_hcache : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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uhc_ahbso_hirq : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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-- grusb_out_type_vector unwrapped
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xcvrsel : out std_logic_vector(((nports*2)-1) downto 0);
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termsel : out std_logic_vector((nports-1) downto 0);
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opmode : out std_logic_vector(((nports*2)-1) downto 0);
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txvalid : out std_logic_vector((nports-1) downto 0);
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drvvbus : out std_logic_vector((nports-1) downto 0);
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dataho : out std_logic_vector(((nports*8)-1) downto 0);
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validho : out std_logic_vector((nports-1) downto 0);
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stp : out std_logic_vector((nports-1) downto 0);
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datao : out std_logic_vector(((nports*8)-1) downto 0);
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utm_rst : out std_logic_vector((nports-1) downto 0);
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dctrlo : out std_logic_vector((nports-1) downto 0);
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suspendm : out std_ulogic;
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dbus16_8 : out std_ulogic;
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dppulldown : out std_ulogic;
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dmpulldown : out std_ulogic;
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idpullup : out std_ulogic;
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dischrgvbus : out std_ulogic;
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chrgvbus : out std_ulogic;
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txbitstuffenable : out std_ulogic;
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txbitstuffenableh : out std_ulogic;
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fslsserialmode : out std_ulogic;
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txenablen : out std_ulogic;
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txdat : out std_ulogic;
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txse0 : out std_ulogic;
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-- grusb_in_type_vector unwrapped
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linestate : in std_logic_vector(((nports*2)-1) downto 0);
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txready : in std_logic_vector((nports-1) downto 0);
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rxvalid : in std_logic_vector((nports-1) downto 0);
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rxactive : in std_logic_vector((nports-1) downto 0);
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rxerror : in std_logic_vector((nports-1) downto 0);
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vbusvalid : in std_logic_vector((nports-1) downto 0);
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datahi : in std_logic_vector(((nports*8)-1) downto 0);
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validhi : in std_logic_vector((nports-1) downto 0);
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hostdisc : in std_logic_vector((nports-1) downto 0);
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nxt : in std_logic_vector((nports-1) downto 0);
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dir : in std_logic_vector((nports-1) downto 0);
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datai : in std_logic_vector(((nports*8)-1) downto 0);
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-- EHC transaction buffer signals
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mbc20_tb_addr : out std_logic_vector(8 downto 0);
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mbc20_tb_data : out std_logic_vector(31 downto 0);
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mbc20_tb_en : out std_ulogic;
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mbc20_tb_wel : out std_ulogic;
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mbc20_tb_weh : out std_ulogic;
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tb_mbc20_data : in std_logic_vector(31 downto 0);
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pe20_tb_addr : out std_logic_vector(8 downto 0);
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pe20_tb_data : out std_logic_vector(31 downto 0);
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pe20_tb_en : out std_ulogic;
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pe20_tb_wel : out std_ulogic;
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pe20_tb_weh : out std_ulogic;
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tb_pe20_data : in std_logic_vector(31 downto 0);
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-- EHC packet buffer signals
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mbc20_pb_addr : out std_logic_vector(8 downto 0);
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mbc20_pb_data : out std_logic_vector(31 downto 0);
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mbc20_pb_en : out std_ulogic;
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mbc20_pb_we : out std_ulogic;
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pb_mbc20_data : in std_logic_vector(31 downto 0);
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sie20_pb_addr : out std_logic_vector(8 downto 0);
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sie20_pb_data : out std_logic_vector(31 downto 0);
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sie20_pb_en : out std_ulogic;
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sie20_pb_we : out std_ulogic;
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pb_sie20_data : in std_logic_vector(31 downto 0);
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-- UHC packet buffer signals
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sie11_pb_addr : out std_logic_vector((n_cc*9)*uhcgen downto 1*uhcgen);
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sie11_pb_data : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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sie11_pb_en : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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sie11_pb_we : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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pb_sie11_data : in std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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mbc11_pb_addr : out std_logic_vector((n_cc*9)*uhcgen downto 1*uhcgen);
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mbc11_pb_data : out std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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mbc11_pb_en : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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mbc11_pb_we : out std_logic_vector(n_cc*uhcgen downto 1*uhcgen);
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pb_mbc11_data : in std_logic_vector((n_cc*32)*uhcgen downto 1*uhcgen);
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bufsel : out std_ulogic);
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end grusbhc_axcelerator;
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architecture rtl of grusbhc_axcelerator is
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begin
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-----------------------------------------------------------------------------
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-- Howto add netlist maps:
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-- First check the different combination of generics below. If your
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-- configuration is not available then add a new one named comb<X+1> (where
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-- X is the value of the last combination defined below) by simply copy
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-- pasting one exicisting combination and changing the generics and component
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-- name. Then add a component decleration for that configuration in the file
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-- grusbhc_axceleratorpkg.vhd by simply copy pasting the port decleration from
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-- the entity above and replacing n_cc, uhcgen, and nports with their actual
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-- values. Also add the combination of genercis as valid in the function
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-- valid_comb at the bottom of the file grusbhc_axceleratorpkg.vhd
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-----------------------------------------------------------------------------
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comb0 : if nports = 1 and
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ehcgen = 0 and
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uhcgen = 1 and
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n_cc = 1 and
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n_pcc = 1 and
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prr = 0 and
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portroute1 = 0 and
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portroute2 = 0 and
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endian_conv = 1 and
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be_regs = 0 and
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be_desc = 0 and
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uhcblo = 2 and
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bwrd = 16 and
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utm_type = 2 and
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vbusconf = 3 and
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ramtest = 0 and
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urst_time = 250 and
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oepol = 0 and
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scantest = 0 generate
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usbhc0 : grusbhc_axcelerator_comb0
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port map(
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clk,uclk,rst,ehc_apbsi_psel,ehc_apbsi_penable,ehc_apbsi_paddr,
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ehc_apbsi_pwrite,ehc_apbsi_pwdata,ehc_apbsi_testen,ehc_apbsi_testrst,
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ehc_apbsi_scanen,ehc_apbso_prdata,ehc_apbso_pirq,ahbmi_hgrant,
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ahbmi_hready,ahbmi_hresp,ahbmi_hrdata,ahbmi_hcache,ahbmi_testen,
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ahbmi_testrst,ahbmi_scanen,uhc_ahbsi_hsel,uhc_ahbsi_haddr,
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uhc_ahbsi_hwrite,uhc_ahbsi_htrans,uhc_ahbsi_hsize,uhc_ahbsi_hwdata,
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uhc_ahbsi_hready,uhc_ahbsi_testen,uhc_ahbsi_testrst,uhc_ahbsi_scanen,
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ehc_ahbmo_hbusreq,ehc_ahbmo_hlock,ehc_ahbmo_htrans,ehc_ahbmo_haddr,
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ehc_ahbmo_hwrite,ehc_ahbmo_hsize,ehc_ahbmo_hburst,ehc_ahbmo_hprot,
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ehc_ahbmo_hwdata,uhc_ahbmo_hbusreq,uhc_ahbmo_hlock,uhc_ahbmo_htrans,
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uhc_ahbmo_haddr,uhc_ahbmo_hwrite,uhc_ahbmo_hsize,uhc_ahbmo_hburst,
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uhc_ahbmo_hprot,uhc_ahbmo_hwdata,uhc_ahbso_hready,uhc_ahbso_hresp,
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uhc_ahbso_hrdata,uhc_ahbso_hsplit,uhc_ahbso_hcache,uhc_ahbso_hirq,
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xcvrsel,termsel,opmode,txvalid,drvvbus,dataho,validho,stp,datao,
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utm_rst,dctrlo,suspendm,dbus16_8,dppulldown,dmpulldown,idpullup,
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dischrgvbus,chrgvbus,txbitstuffenable,txbitstuffenableh,
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fslsserialmode,txenablen,txdat,txse0,
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linestate,txready,rxvalid,rxactive,rxerror,
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vbusvalid,datahi,validhi,hostdisc,nxt,dir,datai,mbc20_tb_addr,
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mbc20_tb_data,mbc20_tb_en,mbc20_tb_wel,mbc20_tb_weh,tb_mbc20_data,
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pe20_tb_addr,pe20_tb_data,pe20_tb_en,pe20_tb_wel,pe20_tb_weh,
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tb_pe20_data,mbc20_pb_addr,mbc20_pb_data,mbc20_pb_en,mbc20_pb_we,
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254 |
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pb_mbc20_data,sie20_pb_addr,sie20_pb_data,sie20_pb_en,sie20_pb_we,
|
255 |
|
|
pb_sie20_data,sie11_pb_addr,sie11_pb_data,sie11_pb_en,sie11_pb_we,
|
256 |
|
|
pb_sie11_data,mbc11_pb_addr,mbc11_pb_data,mbc11_pb_en,mbc11_pb_we,
|
257 |
|
|
pb_mbc11_data,bufsel);
|
258 |
|
|
end generate comb0;
|
259 |
|
|
|
260 |
|
|
comb1 : if nports = 1 and
|
261 |
|
|
ehcgen = 1 and
|
262 |
|
|
uhcgen = 0 and
|
263 |
|
|
n_cc = 1 and
|
264 |
|
|
n_pcc = 1 and
|
265 |
|
|
prr = 0 and
|
266 |
|
|
portroute1 = 0 and
|
267 |
|
|
portroute2 = 0 and
|
268 |
|
|
endian_conv = 1 and
|
269 |
|
|
be_regs = 0 and
|
270 |
|
|
be_desc = 0 and
|
271 |
|
|
uhcblo = 2 and
|
272 |
|
|
bwrd = 16 and
|
273 |
|
|
utm_type = 2 and
|
274 |
|
|
vbusconf = 3 and
|
275 |
|
|
ramtest = 0 and
|
276 |
|
|
urst_time = 250 and
|
277 |
|
|
oepol = 0 and
|
278 |
|
|
scantest = 0 generate
|
279 |
|
|
usbhc0 : grusbhc_axcelerator_comb1
|
280 |
|
|
port map(
|
281 |
|
|
clk,uclk,rst,ehc_apbsi_psel,ehc_apbsi_penable,ehc_apbsi_paddr,
|
282 |
|
|
ehc_apbsi_pwrite,ehc_apbsi_pwdata,ehc_apbsi_testen,ehc_apbsi_testrst,
|
283 |
|
|
ehc_apbsi_scanen,ehc_apbso_prdata,ehc_apbso_pirq,ahbmi_hgrant,
|
284 |
|
|
ahbmi_hready,ahbmi_hresp,ahbmi_hrdata,ahbmi_hcache,ahbmi_testen,
|
285 |
|
|
ahbmi_testrst,ahbmi_scanen,uhc_ahbsi_hsel,uhc_ahbsi_haddr,
|
286 |
|
|
uhc_ahbsi_hwrite,uhc_ahbsi_htrans,uhc_ahbsi_hsize,uhc_ahbsi_hwdata,
|
287 |
|
|
uhc_ahbsi_hready,uhc_ahbsi_testen,uhc_ahbsi_testrst,uhc_ahbsi_scanen,
|
288 |
|
|
ehc_ahbmo_hbusreq,ehc_ahbmo_hlock,ehc_ahbmo_htrans,ehc_ahbmo_haddr,
|
289 |
|
|
ehc_ahbmo_hwrite,ehc_ahbmo_hsize,ehc_ahbmo_hburst,ehc_ahbmo_hprot,
|
290 |
|
|
ehc_ahbmo_hwdata,uhc_ahbmo_hbusreq,uhc_ahbmo_hlock,uhc_ahbmo_htrans,
|
291 |
|
|
uhc_ahbmo_haddr,uhc_ahbmo_hwrite,uhc_ahbmo_hsize,uhc_ahbmo_hburst,
|
292 |
|
|
uhc_ahbmo_hprot,uhc_ahbmo_hwdata,uhc_ahbso_hready,uhc_ahbso_hresp,
|
293 |
|
|
uhc_ahbso_hrdata,uhc_ahbso_hsplit,uhc_ahbso_hcache,uhc_ahbso_hirq,
|
294 |
|
|
xcvrsel,termsel,opmode,txvalid,drvvbus,dataho,validho,stp,datao,
|
295 |
|
|
utm_rst,dctrlo,suspendm,dbus16_8,dppulldown,dmpulldown,idpullup,
|
296 |
|
|
dischrgvbus,chrgvbus,txbitstuffenable,txbitstuffenableh,
|
297 |
|
|
fslsserialmode,txenablen,txdat,txse0,
|
298 |
|
|
linestate,txready,rxvalid,rxactive,rxerror,
|
299 |
|
|
vbusvalid,datahi,validhi,hostdisc,nxt,dir,datai,mbc20_tb_addr,
|
300 |
|
|
mbc20_tb_data,mbc20_tb_en,mbc20_tb_wel,mbc20_tb_weh,tb_mbc20_data,
|
301 |
|
|
pe20_tb_addr,pe20_tb_data,pe20_tb_en,pe20_tb_wel,pe20_tb_weh,
|
302 |
|
|
tb_pe20_data,mbc20_pb_addr,mbc20_pb_data,mbc20_pb_en,mbc20_pb_we,
|
303 |
|
|
pb_mbc20_data,sie20_pb_addr,sie20_pb_data,sie20_pb_en,sie20_pb_we,
|
304 |
|
|
pb_sie20_data,sie11_pb_addr,sie11_pb_data,sie11_pb_en,sie11_pb_we,
|
305 |
|
|
pb_sie11_data,mbc11_pb_addr,mbc11_pb_data,mbc11_pb_en,mbc11_pb_we,
|
306 |
|
|
pb_mbc11_data,bufsel);
|
307 |
|
|
end generate comb1;
|
308 |
|
|
|
309 |
|
|
comb2 : if nports = 1 and
|
310 |
|
|
ehcgen = 1 and
|
311 |
|
|
uhcgen = 1 and
|
312 |
|
|
n_cc = 1 and
|
313 |
|
|
n_pcc = 1 and
|
314 |
|
|
prr = 0 and
|
315 |
|
|
portroute1 = 0 and
|
316 |
|
|
portroute2 = 0 and
|
317 |
|
|
endian_conv = 1 and
|
318 |
|
|
be_regs = 0 and
|
319 |
|
|
be_desc = 0 and
|
320 |
|
|
uhcblo = 2 and
|
321 |
|
|
bwrd = 16 and
|
322 |
|
|
utm_type = 2 and
|
323 |
|
|
vbusconf = 3 and
|
324 |
|
|
ramtest = 0 and
|
325 |
|
|
urst_time = 250 and
|
326 |
|
|
oepol = 0 and
|
327 |
|
|
scantest = 0 generate
|
328 |
|
|
usbhc0 : grusbhc_axcelerator_comb2
|
329 |
|
|
port map(
|
330 |
|
|
clk,uclk,rst,ehc_apbsi_psel,ehc_apbsi_penable,ehc_apbsi_paddr,
|
331 |
|
|
ehc_apbsi_pwrite,ehc_apbsi_pwdata,ehc_apbsi_testen,ehc_apbsi_testrst,
|
332 |
|
|
ehc_apbsi_scanen,ehc_apbso_prdata,ehc_apbso_pirq,ahbmi_hgrant,
|
333 |
|
|
ahbmi_hready,ahbmi_hresp,ahbmi_hrdata,ahbmi_hcache,ahbmi_testen,
|
334 |
|
|
ahbmi_testrst,ahbmi_scanen,uhc_ahbsi_hsel,uhc_ahbsi_haddr,
|
335 |
|
|
uhc_ahbsi_hwrite,uhc_ahbsi_htrans,uhc_ahbsi_hsize,uhc_ahbsi_hwdata,
|
336 |
|
|
uhc_ahbsi_hready,uhc_ahbsi_testen,uhc_ahbsi_testrst,uhc_ahbsi_scanen,
|
337 |
|
|
ehc_ahbmo_hbusreq,ehc_ahbmo_hlock,ehc_ahbmo_htrans,ehc_ahbmo_haddr,
|
338 |
|
|
ehc_ahbmo_hwrite,ehc_ahbmo_hsize,ehc_ahbmo_hburst,ehc_ahbmo_hprot,
|
339 |
|
|
ehc_ahbmo_hwdata,uhc_ahbmo_hbusreq,uhc_ahbmo_hlock,uhc_ahbmo_htrans,
|
340 |
|
|
uhc_ahbmo_haddr,uhc_ahbmo_hwrite,uhc_ahbmo_hsize,uhc_ahbmo_hburst,
|
341 |
|
|
uhc_ahbmo_hprot,uhc_ahbmo_hwdata,uhc_ahbso_hready,uhc_ahbso_hresp,
|
342 |
|
|
uhc_ahbso_hrdata,uhc_ahbso_hsplit,uhc_ahbso_hcache,uhc_ahbso_hirq,
|
343 |
|
|
xcvrsel,termsel,opmode,txvalid,drvvbus,dataho,validho,stp,datao,
|
344 |
|
|
utm_rst,dctrlo,suspendm,dbus16_8,dppulldown,dmpulldown,idpullup,
|
345 |
|
|
dischrgvbus,chrgvbus,txbitstuffenable,txbitstuffenableh,
|
346 |
|
|
fslsserialmode,txenablen,txdat,txse0,
|
347 |
|
|
linestate,txready,rxvalid,rxactive,rxerror,
|
348 |
|
|
vbusvalid,datahi,validhi,hostdisc,nxt,dir,datai,mbc20_tb_addr,
|
349 |
|
|
mbc20_tb_data,mbc20_tb_en,mbc20_tb_wel,mbc20_tb_weh,tb_mbc20_data,
|
350 |
|
|
pe20_tb_addr,pe20_tb_data,pe20_tb_en,pe20_tb_wel,pe20_tb_weh,
|
351 |
|
|
tb_pe20_data,mbc20_pb_addr,mbc20_pb_data,mbc20_pb_en,mbc20_pb_we,
|
352 |
|
|
pb_mbc20_data,sie20_pb_addr,sie20_pb_data,sie20_pb_en,sie20_pb_we,
|
353 |
|
|
pb_sie20_data,sie11_pb_addr,sie11_pb_data,sie11_pb_en,sie11_pb_we,
|
354 |
|
|
pb_sie11_data,mbc11_pb_addr,mbc11_pb_data,mbc11_pb_en,mbc11_pb_we,
|
355 |
|
|
pb_mbc11_data,bufsel);
|
356 |
|
|
end generate comb2;
|
357 |
|
|
|
358 |
|
|
comb3 : if nports = 2 and
|
359 |
|
|
ehcgen = 1 and
|
360 |
|
|
uhcgen = 1 and
|
361 |
|
|
n_cc = 1 and
|
362 |
|
|
n_pcc = 2 and
|
363 |
|
|
prr = 0 and
|
364 |
|
|
portroute1 = 0 and
|
365 |
|
|
portroute2 = 0 and
|
366 |
|
|
endian_conv = 1 and
|
367 |
|
|
be_regs = 0 and
|
368 |
|
|
be_desc = 0 and
|
369 |
|
|
uhcblo = 2 and
|
370 |
|
|
bwrd = 16 and
|
371 |
|
|
utm_type = 2 and
|
372 |
|
|
vbusconf = 3 and
|
373 |
|
|
ramtest = 0 and
|
374 |
|
|
urst_time = 250 and
|
375 |
|
|
oepol = 0 and
|
376 |
|
|
scantest = 0 generate
|
377 |
|
|
usbhc0 : grusbhc_axcelerator_comb3
|
378 |
|
|
port map(
|
379 |
|
|
clk,uclk,rst,ehc_apbsi_psel,ehc_apbsi_penable,ehc_apbsi_paddr,
|
380 |
|
|
ehc_apbsi_pwrite,ehc_apbsi_pwdata,ehc_apbsi_testen,ehc_apbsi_testrst,
|
381 |
|
|
ehc_apbsi_scanen,ehc_apbso_prdata,ehc_apbso_pirq,ahbmi_hgrant,
|
382 |
|
|
ahbmi_hready,ahbmi_hresp,ahbmi_hrdata,ahbmi_hcache,ahbmi_testen,
|
383 |
|
|
ahbmi_testrst,ahbmi_scanen,uhc_ahbsi_hsel,uhc_ahbsi_haddr,
|
384 |
|
|
uhc_ahbsi_hwrite,uhc_ahbsi_htrans,uhc_ahbsi_hsize,uhc_ahbsi_hwdata,
|
385 |
|
|
uhc_ahbsi_hready,uhc_ahbsi_testen,uhc_ahbsi_testrst,uhc_ahbsi_scanen,
|
386 |
|
|
ehc_ahbmo_hbusreq,ehc_ahbmo_hlock,ehc_ahbmo_htrans,ehc_ahbmo_haddr,
|
387 |
|
|
ehc_ahbmo_hwrite,ehc_ahbmo_hsize,ehc_ahbmo_hburst,ehc_ahbmo_hprot,
|
388 |
|
|
ehc_ahbmo_hwdata,uhc_ahbmo_hbusreq,uhc_ahbmo_hlock,uhc_ahbmo_htrans,
|
389 |
|
|
uhc_ahbmo_haddr,uhc_ahbmo_hwrite,uhc_ahbmo_hsize,uhc_ahbmo_hburst,
|
390 |
|
|
uhc_ahbmo_hprot,uhc_ahbmo_hwdata,uhc_ahbso_hready,uhc_ahbso_hresp,
|
391 |
|
|
uhc_ahbso_hrdata,uhc_ahbso_hsplit,uhc_ahbso_hcache,uhc_ahbso_hirq,
|
392 |
|
|
xcvrsel,termsel,opmode,txvalid,drvvbus,dataho,validho,stp,datao,
|
393 |
|
|
utm_rst,dctrlo,suspendm,dbus16_8,dppulldown,dmpulldown,idpullup,
|
394 |
|
|
dischrgvbus,chrgvbus,txbitstuffenable,txbitstuffenableh,
|
395 |
|
|
fslsserialmode,txenablen,txdat,txse0,
|
396 |
|
|
linestate,txready,rxvalid,rxactive,rxerror,
|
397 |
|
|
vbusvalid,datahi,validhi,hostdisc,nxt,dir,datai,mbc20_tb_addr,
|
398 |
|
|
mbc20_tb_data,mbc20_tb_en,mbc20_tb_wel,mbc20_tb_weh,tb_mbc20_data,
|
399 |
|
|
pe20_tb_addr,pe20_tb_data,pe20_tb_en,pe20_tb_wel,pe20_tb_weh,
|
400 |
|
|
tb_pe20_data,mbc20_pb_addr,mbc20_pb_data,mbc20_pb_en,mbc20_pb_we,
|
401 |
|
|
pb_mbc20_data,sie20_pb_addr,sie20_pb_data,sie20_pb_en,sie20_pb_we,
|
402 |
|
|
pb_sie20_data,sie11_pb_addr,sie11_pb_data,sie11_pb_en,sie11_pb_we,
|
403 |
|
|
pb_sie11_data,mbc11_pb_addr,mbc11_pb_data,mbc11_pb_en,mbc11_pb_we,
|
404 |
|
|
pb_mbc11_data,bufsel);
|
405 |
|
|
end generate comb3;
|
406 |
|
|
|
407 |
|
|
-- pragma translate_off
|
408 |
|
|
nomap : if not valid_comb(nports,ehcgen,uhcgen,n_cc,n_pcc,prr,portroute1,
|
409 |
|
|
portroute2,endian_conv,be_regs,be_desc,uhcblo,bwrd,
|
410 |
|
|
utm_type,vbusconf,ramtest,urst_time,oepol,scantest)
|
411 |
|
|
generate
|
412 |
|
|
err : process
|
413 |
|
|
begin
|
414 |
|
|
assert false report "ERROR : Can't map a netlist for this combination" &
|
415 |
|
|
"of generics"
|
416 |
|
|
severity failure;
|
417 |
|
|
wait;
|
418 |
|
|
end process;
|
419 |
|
|
end generate;
|
420 |
|
|
-- pragma translate_on
|
421 |
|
|
|
422 |
|
|
end rtl;
|