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https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
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| Line No. |
Rev |
Author |
Line |
| 1 |
2 |
dimamali |
choice 'Target technology ' \
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| 2 |
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"Inferred CONFIG_SYN_INFERRED \
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| 3 |
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Altera-all CONFIG_SYN_ALTERA \
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| 4 |
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Actel-Axcelerator CONFIG_SYN_AXCEL \
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| 5 |
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Actel-Proasic CONFIG_SYN_PROASIC \
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| 6 |
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Actel-ProasicPlus CONFIG_SYN_PROASICPLUS \
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| 7 |
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Actel-Proasic3 CONFIG_SYN_PROASIC3 \
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| 8 |
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Atmel-ATC18 CONFIG_SYN_ATC18 \
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| 9 |
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Custom1 CONFIG_SYN_CUSTOM1 \
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| 10 |
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Lattice-EC/ECP/XP CONFIG_SYN_LATTICE \
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| 11 |
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Xilinx-Spartan2 CONFIG_SYN_SPARTAN2 \
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| 12 |
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Xilinx-Spartan3 CONFIG_SYN_SPARTAN3 \
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| 13 |
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Xilinx-Spartan3E CONFIG_SYN_SPARTAN3E \
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| 14 |
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Xilinx-Virtex CONFIG_SYN_VIRTEX \
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| 15 |
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Xilinx-VirtexE CONFIG_SYN_VIRTEXE \
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| 16 |
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Xilinx-Virtex2 CONFIG_SYN_VIRTEX2 \
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| 17 |
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Xilinx-Virtex4 CONFIG_SYN_VIRTEX4 \
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| 18 |
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Xilinx-Virtex5 CONFIG_SYN_VIRTEX5" Inferred
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| 19 |
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if [ "$CONFIG_SYN_INFERRED" = "y" -o "$CONFIG_SYN_CUSTOM1" = "y" \
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| 20 |
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-o "$CONFIG_SYN_ATC18" = "y" \
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| 21 |
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-o "$CONFIG_SYN_RHUMC" = "y" -o "$CONFIG_SYN_ARTISAN" = "y"]; then
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| 22 |
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choice 'Memory Library ' \
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| 23 |
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"Inferred CONFIG_MEM_INFERRED \
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| 24 |
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Artisan CONFIG_MEM_ARTISAN \
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| 25 |
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Custom1 CONFIG_MEM_CUSTOM1 \
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| 26 |
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Virage CONFIG_MEM_VIRAGE" Inferred
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| 27 |
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fi
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| 28 |
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if [ "$CONFIG_SYN_INFERRED" != "y" ]; then
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| 29 |
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bool 'Infer RAM' CONFIG_SYN_INFER_RAM
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| 30 |
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bool 'Infer pads' CONFIG_SYN_INFER_PADS
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| 31 |
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fi
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| 32 |
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bool 'Disable asynchronous reset' CONFIG_SYN_NO_ASYNC
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