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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [techmap/] [maps/] [grlfpw_net.vhd] - Blame information for rev 2

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1 2 dimamali 
------------------------------------------------------------------------------
2 
--  This file is a part of the GRLIB VHDL IP LIBRARY
3 
--  Copyright (C) 2003, Gaisler Research
4 
--
5 
--  This program is free software; you can redistribute it and/or modify
6 
--  it under the terms of the GNU General Public License as published by
7 
--  the Free Software Foundation; either version 2 of the License, or
8 
--  (at your option) any later version.
9 
--
10 
--  This program is distributed in the hope that it will be useful,
11 
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 
--  GNU General Public License for more details.
14 
--
15 
--  You should have received a copy of the GNU General Public License
16 
--  along with this program; if not, write to the Free Software
17 
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 
-----------------------------------------------------------------------------
19 
-- Entity:      grlfpw
20 
-- File:        grlfpw.vhd
21 
-- Author:      Edvin Catovic - Gaisler Research
22 
-- Description: GRFPU LITE / GRLFPC wrapper
23 
------------------------------------------------------------------------------
24 
 
25 
 
26 
library IEEE;
27 
use IEEE.std_logic_1164.all;
28 
use work.gencomp.all;
29 
 
30 
entity grlfpw_net is
31 
  generic (tech     : integer := 0;
32 
           pclow    : integer range 0 to 2 := 2;
33 
           dsu      : integer range 0 to 1 := 1;
34 
           disas    : integer range 0 to 1 := 0;
35 
           pipe     : integer range 0 to 2 := 0
36 
           );
37 
  port (
38 
    rst    : in  std_ulogic;                    -- Reset
39 
    clk    : in  std_ulogic;
40 
    holdn  : in  std_ulogic;                    -- pipeline hold
41 
    cpi_flush   : in std_ulogic;                          -- pipeline flush
42 
    cpi_exack           : in std_ulogic;                          -- FP exception acknowledge
43 
    cpi_a_rs1   : in std_logic_vector(4 downto 0);
44 
    cpi_d_pc    : in std_logic_vector(31 downto 0);
45 
    cpi_d_inst  : in std_logic_vector(31 downto 0);
46 
    cpi_d_cnt   : in std_logic_vector(1 downto 0);
47 
    cpi_d_trap  : in std_ulogic;
48 
    cpi_d_annul : in std_ulogic;
49 
    cpi_d_pv    : in std_ulogic;
50 
    cpi_a_pc    : in std_logic_vector(31 downto 0);
51 
    cpi_a_inst  : in std_logic_vector(31 downto 0);
52 
    cpi_a_cnt   : in std_logic_vector(1 downto 0);
53 
    cpi_a_trap  : in std_ulogic;
54 
    cpi_a_annul : in std_ulogic;
55 
    cpi_a_pv    : in std_ulogic;
56 
    cpi_e_pc    : in std_logic_vector(31 downto 0);
57 
    cpi_e_inst  : in std_logic_vector(31 downto 0);
58 
    cpi_e_cnt   : in std_logic_vector(1 downto 0);
59 
    cpi_e_trap  : in std_ulogic;
60 
    cpi_e_annul : in std_ulogic;
61 
    cpi_e_pv    : in std_ulogic;
62 
    cpi_m_pc    : in std_logic_vector(31 downto 0);
63 
    cpi_m_inst  : in std_logic_vector(31 downto 0);
64 
    cpi_m_cnt   : in std_logic_vector(1 downto 0);
65 
    cpi_m_trap  : in std_ulogic;
66 
    cpi_m_annul : in std_ulogic;
67 
    cpi_m_pv    : in std_ulogic;
68 
    cpi_x_pc    : in std_logic_vector(31 downto 0);
69 
    cpi_x_inst  : in std_logic_vector(31 downto 0);
70 
    cpi_x_cnt   : in std_logic_vector(1 downto 0);
71 
    cpi_x_trap  : in std_ulogic;
72 
    cpi_x_annul : in std_ulogic;
73 
    cpi_x_pv    : in std_ulogic;
74 
    cpi_lddata        : in std_logic_vector(31 downto 0);     -- load data
75 
    cpi_dbg_enable : in std_ulogic;
76 
    cpi_dbg_write  : in std_ulogic;
77 
    cpi_dbg_fsr    : in std_ulogic;                            -- FSR access
78 
    cpi_dbg_addr   : in std_logic_vector(4 downto 0);
79 
    cpi_dbg_data   : in std_logic_vector(31 downto 0);
80 
 
81 
    cpo_data          : out std_logic_vector(31 downto 0); -- store data
82 
    cpo_exc             : out std_logic;                         -- FP exception
83 
    cpo_cc           : out std_logic_vector(1 downto 0);  -- FP condition codes
84 
    cpo_ccv            : out std_ulogic;                         -- FP condition codes valid
85 
    cpo_ldlock       : out std_logic;                    -- FP pipeline hold
86 
    cpo_holdn         : out std_ulogic;
87 
    cpo_dbg_data     : out std_logic_vector(31 downto 0);
88 
 
89 
    rfi1_rd1addr        : out std_logic_vector(3 downto 0);
90 
    rfi1_rd2addr        : out std_logic_vector(3 downto 0);
91 
    rfi1_wraddr         : out std_logic_vector(3 downto 0);
92 
    rfi1_wrdata         : out std_logic_vector(31 downto 0);
93 
    rfi1_ren1        : out std_ulogic;
94 
    rfi1_ren2        : out std_ulogic;
95 
    rfi1_wren        : out std_ulogic;
96 
 
97 
    rfi2_rd1addr        : out std_logic_vector(3 downto 0);
98 
    rfi2_rd2addr        : out std_logic_vector(3 downto 0);
99 
    rfi2_wraddr         : out std_logic_vector(3 downto 0);
100 
    rfi2_wrdata         : out std_logic_vector(31 downto 0);
101 
    rfi2_ren1        : out std_ulogic;
102 
    rfi2_ren2        : out std_ulogic;
103 
    rfi2_wren        : out std_ulogic;
104 
 
105 
    rfo1_data1          : in std_logic_vector(31 downto 0);
106 
    rfo1_data2          : in std_logic_vector(31 downto 0);
107 
    rfo2_data1          : in std_logic_vector(31 downto 0);
108 
    rfo2_data2          : in std_logic_vector(31 downto 0)
109 
    );
110 
end;
111 
 
112 
 
113 
architecture rtl of grlfpw_net is
114 
 
115 
component grlfpw_0_axcelerator is
116 
port(
117 
  rst :  in std_logic;
118 
  clk :  in std_logic;
119 
  holdn :  in std_logic;
120 
  cpi_flush :  in std_logic;
121 
  cpi_exack :  in std_logic;
122 
  cpi_a_rs1 : in std_logic_vector (4 downto 0);
123 
  cpi_d_pc : in std_logic_vector (31 downto 0);
124 
  cpi_d_inst : in std_logic_vector (31 downto 0);
125 
  cpi_d_cnt : in std_logic_vector (1 downto 0);
126 
  cpi_d_trap :  in std_logic;
127 
  cpi_d_annul :  in std_logic;
128 
  cpi_d_pv :  in std_logic;
129 
  cpi_a_pc : in std_logic_vector (31 downto 0);
130 
  cpi_a_inst : in std_logic_vector (31 downto 0);
131 
  cpi_a_cnt : in std_logic_vector (1 downto 0);
132 
  cpi_a_trap :  in std_logic;
133 
  cpi_a_annul :  in std_logic;
134 
  cpi_a_pv :  in std_logic;
135 
  cpi_e_pc : in std_logic_vector (31 downto 0);
136 
  cpi_e_inst : in std_logic_vector (31 downto 0);
137 
  cpi_e_cnt : in std_logic_vector (1 downto 0);
138 
  cpi_e_trap :  in std_logic;
139 
  cpi_e_annul :  in std_logic;
140 
  cpi_e_pv :  in std_logic;
141 
  cpi_m_pc : in std_logic_vector (31 downto 0);
142 
  cpi_m_inst : in std_logic_vector (31 downto 0);
143 
  cpi_m_cnt : in std_logic_vector (1 downto 0);
144 
  cpi_m_trap :  in std_logic;
145 
  cpi_m_annul :  in std_logic;
146 
  cpi_m_pv :  in std_logic;
147 
  cpi_x_pc : in std_logic_vector (31 downto 0);
148 
  cpi_x_inst : in std_logic_vector (31 downto 0);
149 
  cpi_x_cnt : in std_logic_vector (1 downto 0);
150 
  cpi_x_trap :  in std_logic;
151 
  cpi_x_annul :  in std_logic;
152 
  cpi_x_pv :  in std_logic;
153 
  cpi_lddata : in std_logic_vector (31 downto 0);
154 
  cpi_dbg_enable :  in std_logic;
155 
  cpi_dbg_write :  in std_logic;
156 
  cpi_dbg_fsr :  in std_logic;
157 
  cpi_dbg_addr : in std_logic_vector (4 downto 0);
158 
  cpi_dbg_data : in std_logic_vector (31 downto 0);
159 
  cpo_data : out std_logic_vector (31 downto 0);
160 
  cpo_exc :  out std_logic;
161 
  cpo_cc : out std_logic_vector (1 downto 0);
162 
  cpo_ccv :  out std_logic;
163 
  cpo_ldlock :  out std_logic;
164 
  cpo_holdn :  out std_logic;
165 
  cpo_dbg_data : out std_logic_vector (31 downto 0);
166 
  rfi1_rd1addr : out std_logic_vector (3 downto 0);
167 
  rfi1_rd2addr : out std_logic_vector (3 downto 0);
168 
  rfi1_wraddr : out std_logic_vector (3 downto 0);
169 
  rfi1_wrdata : out std_logic_vector (31 downto 0);
170 
  rfi1_ren1 :  out std_logic;
171 
  rfi1_ren2 :  out std_logic;
172 
  rfi1_wren :  out std_logic;
173 
  rfi2_rd1addr : out std_logic_vector (3 downto 0);
174 
  rfi2_rd2addr : out std_logic_vector (3 downto 0);
175 
  rfi2_wraddr : out std_logic_vector (3 downto 0);
176 
  rfi2_wrdata : out std_logic_vector (31 downto 0);
177 
  rfi2_ren1 :  out std_logic;
178 
  rfi2_ren2 :  out std_logic;
179 
  rfi2_wren :  out std_logic;
180 
  rfo1_data1 : in std_logic_vector (31 downto 0);
181 
  rfo1_data2 : in std_logic_vector (31 downto 0);
182 
  rfo2_data1 : in std_logic_vector (31 downto 0);
183 
  rfo2_data2 : in std_logic_vector (31 downto 0));
184 
end component;
185 
 
186 
component grlfpw_0_unisim
187 
port(
188 
  rst :  in std_logic;
189 
  clk :  in std_logic;
190 
  holdn :  in std_logic;
191 
  cpi_flush :  in std_logic;
192 
  cpi_exack :  in std_logic;
193 
  cpi_a_rs1 : in std_logic_vector (4 downto 0);
194 
  cpi_d_pc : in std_logic_vector (31 downto 0);
195 
  cpi_d_inst : in std_logic_vector (31 downto 0);
196 
  cpi_d_cnt : in std_logic_vector (1 downto 0);
197 
  cpi_d_trap :  in std_logic;
198 
  cpi_d_annul :  in std_logic;
199 
  cpi_d_pv :  in std_logic;
200 
  cpi_a_pc : in std_logic_vector (31 downto 0);
201 
  cpi_a_inst : in std_logic_vector (31 downto 0);
202 
  cpi_a_cnt : in std_logic_vector (1 downto 0);
203 
  cpi_a_trap :  in std_logic;
204 
  cpi_a_annul :  in std_logic;
205 
  cpi_a_pv :  in std_logic;
206 
  cpi_e_pc : in std_logic_vector (31 downto 0);
207 
  cpi_e_inst : in std_logic_vector (31 downto 0);
208 
  cpi_e_cnt : in std_logic_vector (1 downto 0);
209 
  cpi_e_trap :  in std_logic;
210 
  cpi_e_annul :  in std_logic;
211 
  cpi_e_pv :  in std_logic;
212 
  cpi_m_pc : in std_logic_vector (31 downto 0);
213 
  cpi_m_inst : in std_logic_vector (31 downto 0);
214 
  cpi_m_cnt : in std_logic_vector (1 downto 0);
215 
  cpi_m_trap :  in std_logic;
216 
  cpi_m_annul :  in std_logic;
217 
  cpi_m_pv :  in std_logic;
218 
  cpi_x_pc : in std_logic_vector (31 downto 0);
219 
  cpi_x_inst : in std_logic_vector (31 downto 0);
220 
  cpi_x_cnt : in std_logic_vector (1 downto 0);
221 
  cpi_x_trap :  in std_logic;
222 
  cpi_x_annul :  in std_logic;
223 
  cpi_x_pv :  in std_logic;
224 
  cpi_lddata : in std_logic_vector (31 downto 0);
225 
  cpi_dbg_enable :  in std_logic;
226 
  cpi_dbg_write :  in std_logic;
227 
  cpi_dbg_fsr :  in std_logic;
228 
  cpi_dbg_addr : in std_logic_vector (4 downto 0);
229 
  cpi_dbg_data : in std_logic_vector (31 downto 0);
230 
  cpo_data : out std_logic_vector (31 downto 0);
231 
  cpo_exc :  out std_logic;
232 
  cpo_cc : out std_logic_vector (1 downto 0);
233 
  cpo_ccv :  out std_logic;
234 
  cpo_ldlock :  out std_logic;
235 
  cpo_holdn :  out std_logic;
236 
  cpo_dbg_data : out std_logic_vector (31 downto 0);
237 
  rfi1_rd1addr : out std_logic_vector (3 downto 0);
238 
  rfi1_rd2addr : out std_logic_vector (3 downto 0);
239 
  rfi1_wraddr : out std_logic_vector (3 downto 0);
240 
  rfi1_wrdata : out std_logic_vector (31 downto 0);
241 
  rfi1_ren1 :  out std_logic;
242 
  rfi1_ren2 :  out std_logic;
243 
  rfi1_wren :  out std_logic;
244 
  rfi2_rd1addr : out std_logic_vector (3 downto 0);
245 
  rfi2_rd2addr : out std_logic_vector (3 downto 0);
246 
  rfi2_wraddr : out std_logic_vector (3 downto 0);
247 
  rfi2_wrdata : out std_logic_vector (31 downto 0);
248 
  rfi2_ren1 :  out std_logic;
249 
  rfi2_ren2 :  out std_logic;
250 
  rfi2_wren :  out std_logic;
251 
  rfo1_data1 : in std_logic_vector (31 downto 0);
252 
  rfo1_data2 : in std_logic_vector (31 downto 0);
253 
  rfo2_data1 : in std_logic_vector (31 downto 0);
254 
  rfo2_data2 : in std_logic_vector (31 downto 0));
255 
end component;
256 
 
257 
component grlfpw_2_stratixii
258 
port(
259 
  rst :  in std_logic;
260 
  clk :  in std_logic;
261 
  holdn :  in std_logic;
262 
  cpi_flush :  in std_logic;
263 
  cpi_exack :  in std_logic;
264 
  cpi_a_rs1 : in std_logic_vector (4 downto 0);
265 
  cpi_d_pc : in std_logic_vector (31 downto 0);
266 
  cpi_d_inst : in std_logic_vector (31 downto 0);
267 
  cpi_d_cnt : in std_logic_vector (1 downto 0);
268 
  cpi_d_trap :  in std_logic;
269 
  cpi_d_annul :  in std_logic;
270 
  cpi_d_pv :  in std_logic;
271 
  cpi_a_pc : in std_logic_vector (31 downto 0);
272 
  cpi_a_inst : in std_logic_vector (31 downto 0);
273 
  cpi_a_cnt : in std_logic_vector (1 downto 0);
274 
  cpi_a_trap :  in std_logic;
275 
  cpi_a_annul :  in std_logic;
276 
  cpi_a_pv :  in std_logic;
277 
  cpi_e_pc : in std_logic_vector (31 downto 0);
278 
  cpi_e_inst : in std_logic_vector (31 downto 0);
279 
  cpi_e_cnt : in std_logic_vector (1 downto 0);
280 
  cpi_e_trap :  in std_logic;
281 
  cpi_e_annul :  in std_logic;
282 
  cpi_e_pv :  in std_logic;
283 
  cpi_m_pc : in std_logic_vector (31 downto 0);
284 
  cpi_m_inst : in std_logic_vector (31 downto 0);
285 
  cpi_m_cnt : in std_logic_vector (1 downto 0);
286 
  cpi_m_trap :  in std_logic;
287 
  cpi_m_annul :  in std_logic;
288 
  cpi_m_pv :  in std_logic;
289 
  cpi_x_pc : in std_logic_vector (31 downto 0);
290 
  cpi_x_inst : in std_logic_vector (31 downto 0);
291 
  cpi_x_cnt : in std_logic_vector (1 downto 0);
292 
  cpi_x_trap :  in std_logic;
293 
  cpi_x_annul :  in std_logic;
294 
  cpi_x_pv :  in std_logic;
295 
  cpi_lddata : in std_logic_vector (31 downto 0);
296 
  cpi_dbg_enable :  in std_logic;
297 
  cpi_dbg_write :  in std_logic;
298 
  cpi_dbg_fsr :  in std_logic;
299 
  cpi_dbg_addr : in std_logic_vector (4 downto 0);
300 
  cpi_dbg_data : in std_logic_vector (31 downto 0);
301 
  cpo_data : out std_logic_vector (31 downto 0);
302 
  cpo_exc :  out std_logic;
303 
  cpo_cc : out std_logic_vector (1 downto 0);
304 
  cpo_ccv :  out std_logic;
305 
  cpo_ldlock :  out std_logic;
306 
  cpo_holdn :  out std_logic;
307 
  cpo_dbg_data : out std_logic_vector (31 downto 0);
308 
  rfi1_rd1addr : out std_logic_vector (3 downto 0);
309 
  rfi1_rd2addr : out std_logic_vector (3 downto 0);
310 
  rfi1_wraddr : out std_logic_vector (3 downto 0);
311 
  rfi1_wrdata : out std_logic_vector (31 downto 0);
312 
  rfi1_ren1 :  out std_logic;
313 
  rfi1_ren2 :  out std_logic;
314 
  rfi1_wren :  out std_logic;
315 
  rfi2_rd1addr : out std_logic_vector (3 downto 0);
316 
  rfi2_rd2addr : out std_logic_vector (3 downto 0);
317 
  rfi2_wraddr : out std_logic_vector (3 downto 0);
318 
  rfi2_wrdata : out std_logic_vector (31 downto 0);
319 
  rfi2_ren1 :  out std_logic;
320 
  rfi2_ren2 :  out std_logic;
321 
  rfi2_wren :  out std_logic;
322 
  rfo1_data1 : in std_logic_vector (31 downto 0);
323 
  rfo1_data2 : in std_logic_vector (31 downto 0);
324 
  rfo2_data1 : in std_logic_vector (31 downto 0);
325 
  rfo2_data2 : in std_logic_vector (31 downto 0));
326 
end component;
327 
 
328 
begin
329 
 
330 
 strtxii : if (tech = stratix2) or (tech = stratix3) or (tech = cyclone3) generate
331 
    grlfpw0 : grlfpw_2_stratixii
332 
      port map (rst, clk, holdn, cpi_flush, cpi_exack, cpi_a_rs1, cpi_d_pc,
333 
        cpi_d_inst, cpi_d_cnt, cpi_d_trap, cpi_d_annul, cpi_d_pv, cpi_a_pc,
334 
        cpi_a_inst, cpi_a_cnt, cpi_a_trap, cpi_a_annul, cpi_a_pv, cpi_e_pc,
335 
        cpi_e_inst, cpi_e_cnt, cpi_e_trap, cpi_e_annul, cpi_e_pv, cpi_m_pc,
336 
        cpi_m_inst, cpi_m_cnt, cpi_m_trap, cpi_m_annul, cpi_m_pv, cpi_x_pc,
337 
        cpi_x_inst, cpi_x_cnt, cpi_x_trap, cpi_x_annul, cpi_x_pv, cpi_lddata,
338 
        cpi_dbg_enable, cpi_dbg_write, cpi_dbg_fsr, cpi_dbg_addr, cpi_dbg_data,
339 
        cpo_data, cpo_exc, cpo_cc, cpo_ccv, cpo_ldlock, cpo_holdn, cpo_dbg_data,
340 
        rfi1_rd1addr, rfi1_rd2addr, rfi1_wraddr, rfi1_wrdata, rfi1_ren1,
341 
        rfi1_ren2, rfi1_wren, rfi2_rd1addr, rfi2_rd2addr, rfi2_wraddr,
342 
        rfi2_wrdata, rfi2_ren1, rfi2_ren2, rfi2_wren, rfo1_data1,
343 
        rfo1_data2, rfo2_data1, rfo2_data2 );
344 
  end generate;
345 
 
346 
 ax : if tech = axcel generate
347 
    grlfpw0 : grlfpw_0_axcelerator
348 
      port map (rst, clk, holdn, cpi_flush, cpi_exack, cpi_a_rs1, cpi_d_pc,
349 
        cpi_d_inst, cpi_d_cnt, cpi_d_trap, cpi_d_annul, cpi_d_pv, cpi_a_pc,
350 
        cpi_a_inst, cpi_a_cnt, cpi_a_trap, cpi_a_annul, cpi_a_pv, cpi_e_pc,
351 
        cpi_e_inst, cpi_e_cnt, cpi_e_trap, cpi_e_annul, cpi_e_pv, cpi_m_pc,
352 
        cpi_m_inst, cpi_m_cnt, cpi_m_trap, cpi_m_annul, cpi_m_pv, cpi_x_pc,
353 
        cpi_x_inst, cpi_x_cnt, cpi_x_trap, cpi_x_annul, cpi_x_pv, cpi_lddata,
354 
        cpi_dbg_enable, cpi_dbg_write, cpi_dbg_fsr, cpi_dbg_addr, cpi_dbg_data,
355 
        cpo_data, cpo_exc, cpo_cc, cpo_ccv, cpo_ldlock, cpo_holdn, cpo_dbg_data,
356 
        rfi1_rd1addr, rfi1_rd2addr, rfi1_wraddr, rfi1_wrdata, rfi1_ren1,
357 
        rfi1_ren2, rfi1_wren, rfi2_rd1addr, rfi2_rd2addr, rfi2_wraddr,
358 
        rfi2_wrdata, rfi2_ren1, rfi2_ren2, rfi2_wren, rfo1_data1,
359 
        rfo1_data2, rfo2_data1, rfo2_data2 );
360 
  end generate;
361 
 
362 
  uni : if (tech = virtex2) or (tech = virtex4) or (tech = virtex5) or
363 
                (tech = spartan3) or  (tech = spartan3e)
364 
  generate
365 
    grlfpw0 : grlfpw_0_unisim
366 
      port map (rst, clk, holdn, cpi_flush, cpi_exack, cpi_a_rs1, cpi_d_pc,
367 
        cpi_d_inst, cpi_d_cnt, cpi_d_trap, cpi_d_annul, cpi_d_pv, cpi_a_pc,
368 
        cpi_a_inst, cpi_a_cnt, cpi_a_trap, cpi_a_annul, cpi_a_pv, cpi_e_pc,
369 
        cpi_e_inst, cpi_e_cnt, cpi_e_trap, cpi_e_annul, cpi_e_pv, cpi_m_pc,
370 
        cpi_m_inst, cpi_m_cnt, cpi_m_trap, cpi_m_annul, cpi_m_pv, cpi_x_pc,
371 
        cpi_x_inst, cpi_x_cnt, cpi_x_trap, cpi_x_annul, cpi_x_pv, cpi_lddata,
372 
        cpi_dbg_enable, cpi_dbg_write, cpi_dbg_fsr, cpi_dbg_addr, cpi_dbg_data,
373 
        cpo_data, cpo_exc, cpo_cc, cpo_ccv, cpo_ldlock, cpo_holdn, cpo_dbg_data,
374 
        rfi1_rd1addr, rfi1_rd2addr, rfi1_wraddr, rfi1_wrdata, rfi1_ren1,
375 
        rfi1_ren2, rfi1_wren, rfi2_rd1addr, rfi2_rd2addr, rfi2_wraddr,
376 
        rfi2_wrdata, rfi2_ren1, rfi2_ren2, rfi2_wren, rfo1_data1,
377 
        rfo1_data2, rfo2_data1, rfo2_data2 );
378 
  end generate;
379 
 
380 
end;
381 
 

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