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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [software/] [cantest/] [can_receive_basic.c] - Blame information for rev 2

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1 2 dimamali 
// Filename          : can_receive_basic.c
2 
//-- Description     : Waits (polling) for a can frame in standard frame format
3 
//-- Author          : Harald Obereder
4 
//-- Created On      : Wed Okt 06 10.07
5 
//--
6 
//-- CVS entries:
7 
//--   $Author: hobe $
8 
//--   $Date: 2004/10/12 12:47:19 $
9 
//--   $Revision: 1.2 $
10 
//--   $State: Exp $
11 
 
12 
// addressdefinition for basic can registers
13 
// tb...transmit buffer
14 
// rb...receive buffer
15 
#define basic
16 
#define extended
17 
#define CANADDR 0xfffc0000
18 
 
19 
#ifdef basic
20 
#define control_register *((unsigned char *)(CANADDR+0x0000))
21 
#define command_register *((unsigned char *)(CANADDR+0x0001))
22 
#define status_register *((unsigned char *)(CANADDR+0x0002))
23 
#define interrupt_register *((unsigned char *)(CANADDR+0x0003))
24 
#define acceptance_code_register *((unsigned char *)(CANADDR+0x0004))
25 
#define acceptance_mask_register *((unsigned char *)(CANADDR+0x0005))
26 
#define bus_timing_0_register *((unsigned char *)(CANADDR+0x0006))
27 
#define bus_timing_1_register *((unsigned char *)(CANADDR+0x0007))
28 
#define output_control_register *((unsigned char *)(CANADDR+0x0008))
29 
#define test_register *((unsigned char *)(CANADDR+0x0009))
30 
#define tb_identifier_byte_0 *((unsigned char *)(CANADDR+0x000A))
31 
#define tb_identifier_byte_1 *((unsigned char *)(CANADDR+0x000B))
32 
#define tb_data_byte_1 *((unsigned char *)(CANADDR+0x000C))
33 
#define tb_data_byte_2 *((unsigned char *)(CANADDR+0x000D))
34 
#define tb_data_byte_3 *((unsigned char *)(CANADDR+0x000E))
35 
#define tb_data_byte_4 *((unsigned char *)(CANADDR+0x000F))
36 
#define tb_data_byte_5 *((unsigned char *)(CANADDR+0x0010))
37 
#define tb_data_byte_6 *((unsigned char *)(CANADDR+0x0011))
38 
#define tb_data_byte_7 *((unsigned char *)(CANADDR+0x0012))
39 
#define tb_data_byte_8 *((unsigned char *)(CANADDR+0x0013))
40 
#define rb_identifier_byte_0 *((unsigned char *)(CANADDR+0x0014))
41 
#define rb_identifier_byte_1 *((unsigned char *)(CANADDR+0x0015))
42 
#define rb_data_byte_1 *((unsigned char *)(CANADDR+0x0016))
43 
#define rb_data_byte_2 *((unsigned char *)(CANADDR+0x0017))
44 
#define rb_data_byte_3 *((unsigned char *)(CANADDR+0x0018))
45 
#define rb_data_byte_4 *((unsigned char *)(CANADDR+0x0019))
46 
#define rb_data_byte_5 *((unsigned char *)(CANADDR+0x001A))
47 
#define rb_data_byte_6 *((unsigned char *)(CANADDR+0x001B))
48 
#define rb_data_byte_7 *((unsigned char *)(CANADDR+0x001C))
49 
#define rb_data_byte_8 *((unsigned char *)(CANADDR+0x001D))
50 
#define Extra_register *((unsigned char *)(CANADDR+0x001E))
51 
#define clock_divider_register *((unsigned char *)(CANADDR+0x001F))
52 
 
53 
#endif
54 
 
55 
#ifdef extended
56 
#define control_register *((unsigned char *)(CANADDR+0x0000))
57 
#define command_register *((unsigned char *)(CANADDR+0x0001))
58 
#define status_register *((unsigned char *)(CANADDR+0x0002))
59 
#define interrupt_register *((unsigned char *)(CANADDR+0x0003))
60 
#define interrupt_enable_register *((unsigned char *)(CANADDR+0x0004))
61 
#define reserved_register *((unsigned char *)(CANADDR+0x0005))
62 
#define bus_timing_0_register *((unsigned char *)(CANADDR+0x0006))
63 
#define bus_timing_1_register *((unsigned char *)(CANADDR+0x0007))
64 
#define output_control_register *((unsigned char *)(CANADDR+0x0008))
65 
#define test_register *((unsigned char *)(CANADDR+0x0009))
66 
#define reserved_1_register *((unsigned char *)(CANADDR+0x000A))
67 
#define arbitration_lost_capture *((unsigned char *)(CANADDR+0x000B))
68 
#define error_code_capture *((unsigned char *)(CANADDR+0x000C))
69 
#define error_warning_limit *((unsigned char *)(CANADDR+0x000D))
70 
#define rx_error_counter *((unsigned char *)(CANADDR+0x000E))
71 
#define tx_error_counter *((unsigned char *)(CANADDR+0x000F))
72 
 
73 
#define acceptance_code_0 *((unsigned char *)(CANADDR+0x0010))
74 
#define acceptance_code_1 *((unsigned char *)(CANADDR+0x0011))
75 
#define acceptance_code_2 *((unsigned char *)(CANADDR+0x0012))
76 
#define acceptance_code_3 *((unsigned char *)(CANADDR+0x0013))
77 
#define acceptance_mask_0 *((unsigned char *)(CANADDR+0x0014))
78 
#define acceptance_mask_1 *((unsigned char *)(CANADDR+0x0015))
79 
#define acceptance_mask_2 *((unsigned char *)(CANADDR+0x0016))
80 
#define acceptance_mask_3 *((unsigned char *)(CANADDR+0x0017))
81 
 
82 
#define rx_frame_information_sff *((unsigned char *)(CANADDR+0x0010))
83 
#define rx_identifier_1_sff *((unsigned char *)(CANADDR+0x0011))
84 
#define rx_identifier_2_sff *((unsigned char *)(CANADDR+0x0012))
85 
#define rx_data_1_sff *((unsigned char *)(CANADDR+0x0013))
86 
#define rx_data_2_sff *((unsigned char *)(CANADDR+0x0014))
87 
#define rx_data_3_sff *((unsigned char *)(CANADDR+0x0015))
88 
#define rx_data_4_sff *((unsigned char *)(CANADDR+0x0016))
89 
#define rx_data_5_sff *((unsigned char *)(CANADDR+0x0017))
90 
#define rx_data_6_sff *((unsigned char *)(CANADDR+0x0018))
91 
#define rx_data_7_sff *((unsigned char *)(CANADDR+0x0019))
92 
#define rx_data_8_sff *((unsigned char *)(CANADDR+0x001A))
93 
 
94 
#define rx_frame_information_eff *((unsigned char *)(CANADDR+0x0010))
95 
#define rx_identifier_1_eff *((unsigned char *)(CANADDR+0x0011))
96 
#define rx_identifier_2_eff *((unsigned char *)(CANADDR+0x0012))
97 
#define rx_identifier_3_eff *((unsigned char *)(CANADDR+0x0013))
98 
#define rx_identifier_4_eff *((unsigned char *)(CANADDR+0x0014))
99 
#define rx_data_1_eff *((unsigned char *)(CANADDR+0x0015))
100 
#define rx_data_2_eff *((unsigned char *)(CANADDR+0x0016))
101 
#define rx_data_3_eff *((unsigned char *)(CANADDR+0x0017))
102 
#define rx_data_4_eff *((unsigned char *)(CANADDR+0x0018))
103 
#define rx_data_5_eff *((unsigned char *)(CANADDR+0x0019))
104 
#define rx_data_6_eff *((unsigned char *)(CANADDR+0x001A))
105 
#define rx_data_7_eff *((unsigned char *)(CANADDR+0x001B))
106 
#define rx_data_8_eff *((unsigned char *)(CANADDR+0x001C))
107 
 
108 
#define tx_frame_information_sff *((unsigned char *)(CANADDR+0x0010))
109 
#define tx_identifier_1_sff *((unsigned char *)(CANADDR+0x0011))
110 
#define tx_identifier_2_sff *((unsigned char *)(CANADDR+0x0012))
111 
#define tx_data_1_sff *((unsigned char *)(CANADDR+0x0013))
112 
#define tx_data_2_sff *((unsigned char *)(CANADDR+0x0014))
113 
#define tx_data_3_sff *((unsigned char *)(CANADDR+0x0015))
114 
#define tx_data_4_sff *((unsigned char *)(CANADDR+0x0016))
115 
#define tx_data_5_sff *((unsigned char *)(CANADDR+0x0017))
116 
#define tx_data_6_sff *((unsigned char *)(CANADDR+0x0018))
117 
#define tx_data_7_sff *((unsigned char *)(CANADDR+0x0019))
118 
#define tx_data_8_sff *((unsigned char *)(CANADDR+0x001A))
119 
 
120 
#define tx_frame_information_eff *((unsigned char *)(CANADDR+0x0010))
121 
#define tx_identifier_1_eff *((unsigned char *)(CANADDR+0x0011))
122 
#define tx_identifier_2_eff *((unsigned char *)(CANADDR+0x0012))
123 
#define tx_identifier_3_eff *((unsigned char *)(CANADDR+0x0013))
124 
#define tx_identifier_4_eff *((unsigned char *)(CANADDR+0x0014))
125 
#define tx_data_1_eff *((unsigned char *)(CANADDR+0x0015))
126 
#define tx_data_2_eff *((unsigned char *)(CANADDR+0x0016))
127 
#define tx_data_3_eff *((unsigned char *)(CANADDR+0x0017))
128 
#define tx_data_4_eff *((unsigned char *)(CANADDR+0x0018))
129 
#define tx_data_5_eff *((unsigned char *)(CANADDR+0x0019))
130 
#define tx_data_6_eff *((unsigned char *)(CANADDR+0x001A))
131 
#define tx_data_7_eff *((unsigned char *)(CANADDR+0x001B))
132 
#define tx_data_8_eff *((unsigned char *)(CANADDR+0x001C))
133 
 
134 
#define rx_message_counter *((unsigned char *)(CANADDR+0x001D))
135 
#define rx_buffer_start_address *((unsigned char *)(CANADDR+0x001E))
136 
#define clock_divider_register *((unsigned char *)(CANADDR+0x001F))
137 
 
138 
#endif
139 
 
140 
 
141 
#define reset_mode_on 0x01
142 
#define reset_mode_off 0xFE
143 
#define enable_all_int 0x1E
144 
#define tx_request 0x01
145 
#define basic_mode 0x7F
146 
#define extended_mode 0x80
147 
#define release_buffer 0x04
148 
#define receive_interrupt 0x01
149 
 
150 
#define self_test_mode 0x04
151 
#define self_reception 0x10
152 
#define enable_all_int_eff 0xFF
153 
 
154 
// can mode "Basic" or "Extended"
155 
//const char * mode = "Basic";
156 
//const char * mode = "Extended";
157 
// waits for some time
158 
void kill_time(int rep) {
159 
  int i;
160 
 
161 
  for (i=rep; i>0; --i)
162 
    asm("nop");
163 
}
164 
 
165 
 
166 
 
167 
void self_testing_mode()
168 
{
169 
        unsigned char r_val;
170 
 
171 
        printf("************************************\n");
172 
        printf("***** Set to self testing mode *****\n");
173 
        printf("************************************\n");
174 
 
175 
        r_val = control_register | self_test_mode;
176 
        control_register = r_val;
177 
        printf( "control_register 0x%X \n\n",control_register);
178 
 
179 
}
180 
 
181 
 
182 
void reset_all_irqs()
183 
{
184 
        printf("************************************\n");
185 
        printf("********** reset all irqs **********\n");
186 
        printf("************************************\n");
187 
 
188 
        printf( "interrupt_register 0x%X \n\n",interrupt_register);
189 
 
190 
 
191 
}
192 
void disable_irq_sff()
193 
{
194 
        unsigned char r_val;
195 
 
196 
        printf("************************************\n");
197 
        printf("*********** disable irqs ***********\n");
198 
        printf("************************************\n");
199 
 
200 
        r_val = interrupt_enable_register | enable_all_int_eff;
201 
        interrupt_enable_register = r_val;
202 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
203 
 
204 
}
205 
 
206 
void enable_irq_sff()
207 
{
208 
        unsigned char r_val;
209 
 
210 
        //printf("************************************\n");
211 
        //printf("*********** enable irqs ************\n");
212 
        //printf("************************************\n");
213 
 
214 
        r_val = control_register | enable_all_int;
215 
        control_register = r_val;
216 
        printf( "control_register 0x%X \n\n",control_register);
217 
}
218 
 
219 
void disable_irq_eff()
220 
{
221 
        unsigned char r_val;
222 
 
223 
        printf("************************************\n");
224 
        printf("*********** disable irqs ***********\n");
225 
        printf("************************************\n");
226 
 
227 
        r_val = interrupt_enable_register | enable_all_int_eff;
228 
        interrupt_enable_register = r_val;
229 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
230 
 
231 
}
232 
 
233 
void enable_irq_eff()
234 
{
235 
        unsigned char r_val;
236 
 
237 
        printf("************************************\n");
238 
        printf("*********** enable irqs eff ********\n");
239 
        printf("************************************\n");
240 
 
241 
        r_val = interrupt_enable_register | enable_all_int_eff;
242 
        interrupt_enable_register = r_val;
243 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
244 
 
245 
}
246 
 
247 
void tx_request_command()
248 
{
249 
        unsigned char r_val;
250 
 
251 
//      printf("************************************\n");
252 
//      printf("*********** tx requestet ***********\n");
253 
//      printf("************************************\n");
254 
 
255 
        printf( "Send transmit-request \n");
256 
        r_val = command_register | tx_request;
257 
        command_register = r_val;
258 
        printf( "command register: 0x%X \n\n",command_register);
259 
}
260 
void self_reception_request()
261 
{
262 
        unsigned char r_val;
263 
 
264 
        printf("************************************\n");
265 
        printf("***** self reception requestet *****\n");
266 
        printf("************************************\n");
267 
 
268 
        r_val = command_register | self_reception;
269 
        command_register = r_val;
270 
        printf( "command register : 0x%X \n\n",command_register);
271 
 
272 
}
273 
 
274 
void release_receive_buffer()
275 
{
276 
        unsigned char r_val;
277 
 
278 
        printf("************************************\n");
279 
        printf("****** release receive buffer ******\n");
280 
        printf("************************************\n");
281 
 
282 
 
283 
        r_val = command_register | release_buffer;
284 
        command_register = r_val;
285 
        printf( "command register : 0x%X \n\n",command_register);
286 
 
287 
}
288 
 
289 
void read_receive_buffer_basic()
290 
{
291 
        unsigned char r_val;
292 
 
293 
        printf("************************************\n");
294 
        printf("******** read receive buffer *******\n");
295 
        printf("************************************\n");
296 
 
297 
        printf( "identifier 0: 0x%X \n",rb_identifier_byte_0);
298 
 
299 
        printf( "identifier 1: 0x%X \n",rb_identifier_byte_1);
300 
 
301 
        printf( "data byte 1: 0x%X \n",rb_data_byte_1);
302 
 
303 
        printf( "data byte 2: 0x%X \n",rb_data_byte_2);
304 
 
305 
        printf( "data byte 3: 0x%X \n",rb_data_byte_3);
306 
 
307 
        printf( "data byte 4: 0x%X \n",rb_data_byte_4);
308 
 
309 
        printf( "data byte 5: 0x%X \n",rb_data_byte_5);
310 
 
311 
        printf( "data byte 6: 0x%X \n",rb_data_byte_6);
312 
 
313 
        printf( "data byte 7: 0x%X \n",rb_data_byte_7);
314 
 
315 
        printf( "data byte 8: 0x%X \n\n",rb_data_byte_8);
316 
 
317 
}
318 
 
319 
 
320 
void read_receive_buffer_extended()
321 
{
322 
        unsigned char r_val;
323 
 
324 
        printf("************************************\n");
325 
        printf("******* read frame extended ********\n");
326 
        printf("************************************\n");
327 
 
328 
        printf( "rx_frame_information_eff: 0x%X \n\n",rx_frame_information_eff);
329 
 
330 
        printf( "identifier 0: 0x%X \n",rx_identifier_1_eff);
331 
 
332 
        printf( "identifier 1: 0x%X \n",rx_identifier_2_eff);
333 
 
334 
        printf( "identifier 2: 0x%X \n",rx_identifier_3_eff);
335 
 
336 
        printf( "identifier 3: 0x%X \n\n",rx_identifier_4_eff);
337 
 
338 
        printf( "data byte 1: 0x%X \n",rx_data_1_eff);
339 
 
340 
        printf( "data byte 2: 0x%X \n",rx_data_2_eff);
341 
 
342 
        printf( "data byte 3: 0x%X \n",rx_data_3_eff);
343 
 
344 
        printf( "data byte 4: 0x%X \n",rx_data_4_eff);
345 
 
346 
        printf( "data byte 5: 0x%X \n",rx_data_5_eff);
347 
 
348 
        printf( "data byte 6: 0x%X \n",rx_data_6_eff);
349 
 
350 
        printf( "data byte 7: 0x%X \n",rx_data_7_eff);
351 
 
352 
        printf( "data byte 8: 0x%X \n\n",rx_data_8_eff);
353 
 
354 
}
355 
 
356 
/*void write_frame_basic()
357 
{
358 
        unsigned char r_val;
359 
 
360 
        printf("************************************\n");
361 
        printf("********* Send frame basic *********\n");
362 
        printf("************************************\n");
363 
 
364 
        printf( "Set identifier - 0xEA 0x28\n");
365 
        tb_identifier_byte_0 = 0xEA;
366 
        printf( "identifier 0: 0x%X \n",tb_identifier_byte_0);
367 
 
368 
        tb_identifier_byte_1 = 0x28;
369 
        printf( "identifier 1: 0x%X \n\n",tb_identifier_byte_1);
370 
 
371 
        printf( "Set data byte 1 \n");
372 
        tb_data_byte_1 = 0x12;
373 
        printf( "data byte 1: 0x%X \n",tb_data_byte_1);
374 
 
375 
        printf( "Set data byte 2 \n");
376 
        tb_data_byte_2 = 0x34;
377 
        printf( "data byte 2: 0x%X \n",tb_data_byte_2);
378 
 
379 
        printf( "Set data byte 3 \n");
380 
        tb_data_byte_3 = 0x56;
381 
        printf( "data byte 3: 0x%X \n",tb_data_byte_3);
382 
 
383 
        printf( "Set data byte 4 \n");
384 
        tb_data_byte_4 = 0x78;
385 
        printf( "data byte 4: 0x%X \n",tb_data_byte_4);
386 
 
387 
        printf( "Set data byte 5 \n");
388 
        tb_data_byte_5 = 0x9A;
389 
        printf( "data byte 5: 0x%X \n",tb_data_byte_5);
390 
 
391 
        printf( "Set data byte 6 \n");
392 
        tb_data_byte_6 = 0xBC;
393 
        printf( "data byte 6: 0x%X \n",tb_data_byte_6);
394 
 
395 
        printf( "Set data byte 7 \n");
396 
        tb_data_byte_7 = 0xDE;
397 
        printf( "data byte 7: 0x%X \n",tb_data_byte_7);
398 
 
399 
        printf( "Set data byte 8 \n");
400 
        tb_data_byte_8 = 0xF0;
401 
        printf( "data byte 8: 0x%X \n\n",tb_data_byte_8);
402 
}
403 
*/
404 
/*void write_frame_extended()
405 
{
406 
        unsigned char r_val;
407 
 
408 
        printf("************************************\n");
409 
        printf("******* write frame extended *******\n");
410 
        printf("************************************\n");
411 
 
412 
 
413 
        tx_frame_information_eff = 0x88;
414 
        printf( "tx_frame_information_eff: 0x%X \n\n",tx_frame_information_eff);
415 
 
416 
 
417 
        printf( "Set identifier - 0xA6 0xB0 0x12 0x30\n");
418 
        tx_identifier_1_eff = 0xA6;
419 
        printf( "identifier 0: 0x%X \n",tx_identifier_1_eff);
420 
 
421 
        tx_identifier_2_eff = 0xB0;
422 
        printf( "identifier 1: 0x%X \n",tx_identifier_2_eff);
423 
 
424 
        tx_identifier_3_eff = 0x12;
425 
        printf( "identifier 2: 0x%X \n",tx_identifier_3_eff);
426 
 
427 
        tx_identifier_4_eff = 0x30;
428 
        printf( "identifier 3: 0x%X \n\n",tx_identifier_4_eff);
429 
 
430 
        printf( "Set data - 0x12 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0\n");
431 
        tx_data_1_eff = 0x12;
432 
        printf( "data byte 1: 0x%X \n",tx_data_1_eff);
433 
 
434 
        tx_data_2_eff = 0x34;
435 
        printf( "data byte 2: 0x%X \n",tx_data_2_eff);
436 
 
437 
        tx_data_3_eff = 0x56;
438 
        printf( "data byte 3: 0x%X \n",tx_data_3_eff);
439 
 
440 
        tx_data_4_eff = 0x78;
441 
        printf( "data byte 4: 0x%X \n",tx_data_4_eff);
442 
 
443 
        tx_data_5_eff = 0x9A;
444 
        printf( "data byte 5: 0x%X \n",tx_data_5_eff);
445 
 
446 
        tx_data_6_eff = 0xBC;
447 
        printf( "data byte 6: 0x%X \n",tx_data_6_eff);
448 
 
449 
        tx_data_7_eff = 0xDE;
450 
        printf( "data byte 7: 0x%X \n",tx_data_7_eff);
451 
 
452 
        tx_data_8_eff = 0xF0;
453 
        printf( "data byte 8: 0x%X \n\n",tx_data_8_eff);
454 
 
455 
}
456 
*/
457 
 
458 
void init_can(char * mode, char * self_test)
459 
{
460 
        unsigned char r_val;
461 
 
462 
        if (mode == "Basic")
463 
        {
464 
                //printf("************************************\n");
465 
                printf("********** Basic Can Mode **********\n");
466 
                //printf("************************************\n");
467 
 
468 
                printf( "Switch on Reset Mode\n");
469 
                r_val = control_register | reset_mode_on;
470 
                control_register = r_val;
471 
                //printf( "control_register: 0x%X \n\n",control_register);
472 
 
473 
                //printf( "Set clock divider register to basic can mode\n");
474 
                r_val = clock_divider_register & basic_mode | 0x07;
475 
                clock_divider_register = r_val;
476 
                //printf( "clock_divider_register: 0x%X \n\n",clock_divider_register);
477 
 
478 
                //printf( "Output control register \n");
479 
                //output_control_register = 0x01;
480 
                //printf( "output control register : 0x%X \n\n",output_control_register);
481 
 
482 
                //printf( "Set bus timing register 0\n");
483 
                //printf( "Sync Jump Width = 2  Baudrate Prescaler = 1\n");
484 
                bus_timing_0_register = 0x83;
485 
                //printf( "bus timing register 0: 0x%X \n\n",bus_timing_0_register);
486 
 
487 
                //printf( "Set bus timing register 1\n");
488 
                //printf( "SAM = 0 ---> Single Sampling\n");
489 
                bus_timing_1_register = 0x25;
490 
                //printf( "bus timing register 1: 0x%X \n\n",bus_timing_1_register);
491 
 
492 
                //printf( "Set acceptance code register\n");
493 
                acceptance_code_register = 0x88;
494 
                //printf( "acceptance code register: 0x%X \n\n",acceptance_code_register);
495 
 
496 
                //printf( "Set acceptance mask register\n");
497 
                acceptance_mask_register = 0xFF;
498 
                //printf( "acceptance mask register: 0x%X \n\n",acceptance_mask_register);
499 
 
500 
 
501 
                kill_time(50);
502 
 
503 
                printf( "Switch off reset mode\n");
504 
                r_val = control_register & reset_mode_off;
505 
                control_register = r_val;
506 
                //printf( "control_register 0x%X \n\n",control_register);
507 
 
508 
                kill_time(50);
509 
 
510 
        }
511 
        else if (mode == "Extended")
512 
        {
513 
                printf("************************************\n");
514 
                printf("******** Extended Can Mode *********\n");
515 
                printf("************************************\n");
516 
 
517 
                printf( "Switch on Reset Mode\n");
518 
                r_val = control_register | reset_mode_on;
519 
                control_register = r_val;
520 
                printf( "control_register: 0x%X \n\n",control_register);
521 
 
522 
 
523 
                kill_time(50);
524 
 
525 
 
526 
                printf( "Set clock divider register to extended can mode\n");
527 
                r_val = clock_divider_register | extended_mode | 0x07;
528 
                clock_divider_register = r_val;
529 
                printf( "clock_divider_register: 0x%X \n\n",clock_divider_register);
530 
 
531 
                kill_time(50);
532 
 
533 
                //printf( "Output control register \n");
534 
                //output_control_register = 0x01;
535 
                //printf( "output control register: 0x%X \n\n",output_control_register);
536 
 
537 
                printf( "Set bus timing register 0\n");
538 
                printf( "Sync Jump Width = 2  Baudrate Prescaler = 1\n");
539 
                bus_timing_0_register = 0xA8;
540 
                printf( "bus timing register 0: 0x%X \n\n",bus_timing_0_register);
541 
 
542 
                printf( "Set bus timing register 1\n");
543 
                printf( "SAM = 0 ---> Single Sampling\n");
544 
                bus_timing_1_register = 0x34;
545 
                printf( "bus timing register 1: 0x%X \n\n",bus_timing_1_register);
546 
 
547 
                printf( "Set acceptance code register\n");
548 
                acceptance_code_0 = 0xA6;
549 
                printf( "acceptance code register 0: 0x%X \n",acceptance_code_0);
550 
 
551 
                acceptance_code_1 = 0xB0;
552 
                printf( "acceptance code register 1: 0x%X \n",acceptance_code_1);
553 
 
554 
                acceptance_code_2 = 0x12;
555 
                printf( "acceptance code register 2: 0x%X \n",acceptance_code_2);
556 
 
557 
                acceptance_code_3 = 0x30;
558 
                printf( "acceptance code register 3: 0x%X \n\n",acceptance_code_3);
559 
 
560 
 
561 
                printf( "Set acceptance mask register\n");
562 
                acceptance_mask_0 = 0x00;
563 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_0);
564 
 
565 
                acceptance_mask_1 = 0x00;
566 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_1);
567 
 
568 
                acceptance_mask_2 = 0x00;
569 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_2);
570 
 
571 
                acceptance_mask_3 = 0x00;
572 
                printf( "acceptance mask register: 0x%X \n\n",acceptance_mask_3);
573 
 
574 
                if (self_test == "self_test")
575 
                {
576 
                        self_testing_mode();
577 
                }
578 
 
579 
                printf( "Switch off reset mode\n");
580 
                r_val = control_register & reset_mode_off;
581 
                control_register = r_val;
582 
                printf( "control_register 0x%X \n\n",control_register);
583 
 
584 
                kill_time(50);
585 
        }
586 
 
587 
 
588 
}
589 
 
590 
 
591 
void self_reception_test()
592 
{
593 
        unsigned char r_val;
594 
 
595 
        printf( "Switch on Reset Mode\n");
596 
        control_register = 0x01;
597 
        printf( "control 0x%X \n\n",control_register);
598 
 
599 
        // witch to extended mode
600 
        clock_divider_register = 0x80;
601 
        printf( "clock_divider 0x%X \n\n",clock_divider_register);
602 
 
603 
        // set bus timing
604 
        //bus_timing_0_register = 0xBF;
605 
        bus_timing_0_register = 0x80;
606 
 
607 
        bus_timing_1_register = 0x34;
608 
 
609 
        // set acceptance and mask register
610 
        acceptance_code_0 = 0xA6;
611 
        printf( "acceptance 0 0x%X \n",acceptance_code_0);
612 
 
613 
        acceptance_code_1 = 0xB0;
614 
        printf( "acceptance 1 0x%X \n",acceptance_code_1);
615 
 
616 
        acceptance_code_2 = 0x12;
617 
        printf( "acceptance 2 0x%X \n",acceptance_code_2);
618 
 
619 
        acceptance_code_3 = 0x30;
620 
        printf( "acceptance 3 0x%X \n\n",acceptance_code_3);
621 
 
622 
        acceptance_mask_0 = 0x00;
623 
        printf( "acceptance mask 0x%X \n",acceptance_mask_0);
624 
 
625 
        acceptance_mask_1 = 0x00;
626 
        printf( "acceptance mask 0x%X \n",acceptance_mask_1);
627 
 
628 
        acceptance_mask_2 = 0x00;
629 
        printf( "acceptance mask 0x%X \n",acceptance_mask_2);
630 
 
631 
        acceptance_mask_3 = 0x00;
632 
        printf( "acceptance mask 0x%X \n\n",acceptance_mask_3);
633 
 
634 
        // Setting the "self test mode"
635 
        control_register = 0x05;
636 
        printf( "control 0x%X \n\n",control_register);
637 
 
638 
        kill_time(50);
639 
        // Switch-off reset mode
640 
        control_register = 0X04;
641 
        printf( "control_register 0x%X \n\n",control_register);
642 
 
643 
        kill_time(150);
644 
 
645 
        // Send frame
646 
        tx_frame_information_eff = 0x88;
647 
 
648 
        printf( "Set identifier - 0xA6 0xB0 0x12 0x30\n");
649 
        tx_identifier_1_eff = 0xA6;
650 
        //printf( "identifier 0: 0x%X \n",tx_identifier_1_eff);
651 
 
652 
        tx_identifier_2_eff = 0xB0;
653 
        //printf( "identifier 1: 0x%X \n",tx_identifier_2_eff);
654 
 
655 
        tx_identifier_3_eff = 0x12;
656 
        //printf( "identifier 2: 0x%X \n",tx_identifier_3_eff);
657 
 
658 
        tx_identifier_4_eff = 0x30;
659 
        //printf( "identifier 3: 0x%X \n\n",tx_identifier_4_eff);
660 
 
661 
        printf( "Set data - 0x12 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0\n");
662 
        tx_data_1_eff = 0x12;
663 
        //printf( "data byte 1: 0x%X \n",tx_data_1_eff);
664 
 
665 
        tx_data_2_eff = 0x34;
666 
        //printf( "data byte 2: 0x%X \n",tx_data_2_eff);
667 
 
668 
        tx_data_3_eff = 0x56;
669 
        //printf( "data byte 3: 0x%X \n",tx_data_3_eff);
670 
 
671 
        tx_data_4_eff = 0x78;
672 
        //printf( "data byte 4: 0x%X \n",tx_data_4_eff);
673 
 
674 
        tx_data_5_eff = 0x9A;
675 
        //printf( "data byte 5: 0x%X \n",tx_data_5_eff);
676 
 
677 
        tx_data_6_eff = 0xBC;
678 
        //printf( "data byte 6: 0x%X \n",tx_data_6_eff);
679 
 
680 
        tx_data_7_eff = 0xDE;
681 
        //printf( "data byte 7: 0x%X \n",tx_data_7_eff);
682 
 
683 
        tx_data_8_eff = 0xF0;
684 
        //printf( "data byte 8: 0x%X \n\n",tx_data_8_eff);
685 
 
686 
 
687 
        // Enable ints
688 
        interrupt_enable_register = 0xFF;
689 
        kill_time(50);
690 
        //tx_request_command();
691 
        self_reception_request();
692 
 
693 
 
694 
        //tx_request_command();
695 
        printf( "Finnished \n");
696 
 
697 
        printf( "control_register 0x%X \n\n",control_register);
698 
 
699 
        //kill_time(10000);
700 
 
701 
        printf( "interrupt_register 0x%X \n\n",interrupt_register);
702 
 
703 
        printf( "control_register 0x%X \n\n",control_register);
704 
 
705 
        //read_receive_buffer_extended();
706 
}
707 
 
708 
void write_frame_basic(unsigned char write_field[])
709 
{
710 
        int i = 0;
711 
 
712 
        //printf("************************************\n");
713 
        //printf("******** write frame basic *********\n");
714 
        //printf("************************************\n");
715 
 
716 
            for (i=0; i<10; i++)
717 
              {
718 
                *((unsigned char *)(CANADDR+0x000A+i)) = write_field[i];
719 
                kill_time(10);
720 
                printf( "write data: %i , 0x%X , 0x%X \n",i,write_field[i],*((unsigned char *)(CANADDR+0x000A+i)));
721 
              }
722 
 
723 
}
724 
 
725 
void write_frame_extended(unsigned char write_field[])
726 
{
727 
        int i = 0;
728 
        //printf("************************************\n");
729 
        printf("******* write frame extended *******\n");
730 
        //printf("************************************\n");
731 
 
732 
        for (i=0; i<13; i++)
733 
        {
734 
                *((unsigned char *)(CANADDR+0x0010+i)) = write_field[i];
735 
                kill_time(10);
736 
                printf( "write data %i:  0x%X , 0x%X \n",i,write_field[i],*((unsigned char *)(CANADDR+0x0010+i)));
737 
        }
738 
 
739 
}
740 
 
741 
int test_read_frame_extended(unsigned char write_field[])
742 
{
743 
        unsigned char read_field[13];
744 
        int i = 0;
745 
 
746 
        for (i=0; i<13; i++)
747 
        {
748 
                read_field[i] = *((unsigned char *)(CANADDR+0x0010+i));
749 
        }
750 
 
751 
        for (i=0; i<13; i++)
752 
        {
753 
                if (read_field[i] != write_field[i])
754 
                {
755 
                        return 0;
756 
                }
757 
        }
758 
 
759 
        return 1;
760 
}
761 
 
762 
 
763 
main()
764 
{
765 
  int i;
766 
 
767 
  unsigned char frame_basic0[10]  = {0xEA,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
768 
 
769 
  unsigned char frame_basic1[10]  = {0xEB,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
770 
 
771 
  unsigned char frame_basic2[10]  = {0xEC,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
772 
 
773 
  unsigned char frame_basic3[10]  = {0xED,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
774 
 
775 
  unsigned char frame_extended[13] = {0x88,0xA6,0xB0,0x12,0x30,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
776 
 
777 
 
778 
 
779 
  unsigned char r_val;
780 
 
781 
 
782 
  init_can("Basic","normal");
783 
 
784 
 
785 
  enable_irq_sff();
786 
 
787 
 
788 
  release_receive_buffer();
789 
  release_receive_buffer();
790 
  release_receive_buffer();
791 
  release_receive_buffer();
792 
  release_receive_buffer();
793 
  release_receive_buffer();
794 
  release_receive_buffer();
795 
  release_receive_buffer();
796 
  release_receive_buffer();
797 
  release_receive_buffer();
798 
  release_receive_buffer();
799 
  release_receive_buffer();
800 
  release_receive_buffer();
801 
  release_receive_buffer();
802 
  release_receive_buffer();
803 
  release_receive_buffer();
804 
 
805 
  printf("interrupt register 0x%X \n",interrupt_register);
806 
 
807 
  while(1)
808 
    {
809 
 
810 
      if ((interrupt_register & receive_interrupt) == 0)
811 
        {
812 
          kill_time(4000000);
813 
          printf("No data!\n");
814 
        }
815 
      else
816 
        {
817 
          read_receive_buffer_basic();
818 
          release_receive_buffer();
819 
        }
820 
    }
821 
 
822 
}
823 
 
824 
 

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