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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [software/] [cantest/] [can_send_basic.c] - Blame information for rev 2

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1 2 dimamali 
 
2 
/* Copyright Gaisler Research 2004, all rights reserved */
3 
 
4 
// Filename          : can_send_basic.c
5 
//-- Description     : Sends four can frames with different ID's in standard frame format
6 
//-- Author          : Harald Obereder
7 
//-- Created On      : Wed Okt 06 10.07
8 
//--
9 
//-- CVS entries:
10 
//--   $Author: hobe $
11 
//--   $Date: 2004/10/12 12:47:19 $
12 
//--   $Revision: 1.2 $
13 
//--   $State: Exp $
14 
 
15 
// addressdefinition for basic can registers
16 
// tb...transmit buffer
17 
// rb...receive buffer
18 
#define basic
19 
#define extended
20 
#define CANADDR 0xfff20000
21 
 
22 
#ifdef basic
23 
#define control_register *((volatile unsigned char *)(CANADDR+0x0000))
24 
#define command_register *((volatile unsigned char *)(CANADDR+0x0001))
25 
#define status_register *((volatile unsigned char *)(CANADDR+0x0002))
26 
#define interrupt_register *((volatile unsigned char *)(CANADDR+0x0003))
27 
#define acceptance_code_register *((volatile unsigned char *)(CANADDR+0x0004))
28 
#define acceptance_mask_register *((volatile unsigned char *)(CANADDR+0x0005))
29 
#define bus_timing_0_register *((volatile unsigned char *)(CANADDR+0x0006))
30 
#define bus_timing_1_register *((volatile unsigned char *)(CANADDR+0x0007))
31 
#define output_control_register *((volatile unsigned char *)(CANADDR+0x0008))
32 
#define test_register *((volatile unsigned char *)(CANADDR+0x0009))
33 
#define tb_identifier_byte_0 *((volatile unsigned char *)(CANADDR+0x000A))
34 
#define tb_identifier_byte_1 *((volatile unsigned char *)(CANADDR+0x000B))
35 
#define tb_data_byte_1 *((volatile unsigned char *)(CANADDR+0x000C))
36 
#define tb_data_byte_2 *((volatile unsigned char *)(CANADDR+0x000D))
37 
#define tb_data_byte_3 *((volatile unsigned char *)(CANADDR+0x000E))
38 
#define tb_data_byte_4 *((volatile unsigned char *)(CANADDR+0x000F))
39 
#define tb_data_byte_5 *((volatile unsigned char *)(CANADDR+0x0010))
40 
#define tb_data_byte_6 *((volatile unsigned char *)(CANADDR+0x0011))
41 
#define tb_data_byte_7 *((volatile unsigned char *)(CANADDR+0x0012))
42 
#define tb_data_byte_8 *((volatile unsigned char *)(CANADDR+0x0013))
43 
#define rb_identifier_byte_0 *((volatile unsigned char *)(CANADDR+0x0014))
44 
#define rb_identifier_byte_1 *((volatile unsigned char *)(CANADDR+0x0015))
45 
#define rb_data_byte_1 *((volatile unsigned char *)(CANADDR+0x0016))
46 
#define rb_data_byte_2 *((volatile unsigned char *)(CANADDR+0x0017))
47 
#define rb_data_byte_3 *((volatile unsigned char *)(CANADDR+0x0018))
48 
#define rb_data_byte_4 *((volatile unsigned char *)(CANADDR+0x0019))
49 
#define rb_data_byte_5 *((volatile unsigned char *)(CANADDR+0x001A))
50 
#define rb_data_byte_6 *((volatile unsigned char *)(CANADDR+0x001B))
51 
#define rb_data_byte_7 *((volatile unsigned char *)(CANADDR+0x001C))
52 
#define rb_data_byte_8 *((volatile unsigned char *)(CANADDR+0x001D))
53 
#define Extra_register *((volatile unsigned char *)(CANADDR+0x001E))
54 
#define clock_divider_register *((volatile unsigned char *)(CANADDR+0x001F))
55 
 
56 
#endif
57 
 
58 
#ifdef extended
59 
#define control_register *((volatile unsigned char *)(CANADDR+0x0000))
60 
#define command_register *((volatile unsigned char *)(CANADDR+0x0001))
61 
#define status_register *((volatile unsigned char *)(CANADDR+0x0002))
62 
#define interrupt_register *((volatile unsigned char *)(CANADDR+0x0003))
63 
#define interrupt_enable_register *((volatile unsigned char *)(CANADDR+0x0004))
64 
#define reserved_register *((volatile unsigned char *)(CANADDR+0x0005))
65 
#define bus_timing_0_register *((volatile unsigned char *)(CANADDR+0x0006))
66 
#define bus_timing_1_register *((volatile unsigned char *)(CANADDR+0x0007))
67 
#define output_control_register *((volatile unsigned char *)(CANADDR+0x0008))
68 
#define test_register *((volatile unsigned char *)(CANADDR+0x0009))
69 
#define reserved_1_register *((volatile unsigned char *)(CANADDR+0x000A))
70 
#define arbitration_lost_capture *((volatile unsigned char *)(CANADDR+0x000B))
71 
#define error_code_capture *((volatile unsigned char *)(CANADDR+0x000C))
72 
#define error_warning_limit *((volatile unsigned char *)(CANADDR+0x000D))
73 
#define rx_error_counter *((volatile unsigned char *)(CANADDR+0x000E))
74 
#define tx_error_counter *((volatile unsigned char *)(CANADDR+0x000F))
75 
 
76 
#define acceptance_code_0 *((volatile unsigned char *)(CANADDR+0x0010))
77 
#define acceptance_code_1 *((volatile unsigned char *)(CANADDR+0x0011))
78 
#define acceptance_code_2 *((volatile unsigned char *)(CANADDR+0x0012))
79 
#define acceptance_code_3 *((volatile unsigned char *)(CANADDR+0x0013))
80 
#define acceptance_mask_0 *((volatile unsigned char *)(CANADDR+0x0014))
81 
#define acceptance_mask_1 *((volatile unsigned char *)(CANADDR+0x0015))
82 
#define acceptance_mask_2 *((volatile unsigned char *)(CANADDR+0x0016))
83 
#define acceptance_mask_3 *((volatile unsigned char *)(CANADDR+0x0017))
84 
 
85 
#define rx_frame_information_sff *((volatile unsigned char *)(CANADDR+0x0010))
86 
#define rx_identifier_1_sff *((volatile unsigned char *)(CANADDR+0x0011))
87 
#define rx_identifier_2_sff *((volatile unsigned char *)(CANADDR+0x0012))
88 
#define rx_data_1_sff *((volatile unsigned char *)(CANADDR+0x0013))
89 
#define rx_data_2_sff *((volatile unsigned char *)(CANADDR+0x0014))
90 
#define rx_data_3_sff *((volatile unsigned char *)(CANADDR+0x0015))
91 
#define rx_data_4_sff *((volatile unsigned char *)(CANADDR+0x0016))
92 
#define rx_data_5_sff *((volatile unsigned char *)(CANADDR+0x0017))
93 
#define rx_data_6_sff *((volatile unsigned char *)(CANADDR+0x0018))
94 
#define rx_data_7_sff *((volatile unsigned char *)(CANADDR+0x0019))
95 
#define rx_data_8_sff *((volatile unsigned char *)(CANADDR+0x001A))
96 
 
97 
#define rx_frame_information_eff *((volatile unsigned char *)(CANADDR+0x0010))
98 
#define rx_identifier_1_eff *((volatile unsigned char *)(CANADDR+0x0011))
99 
#define rx_identifier_2_eff *((volatile unsigned char *)(CANADDR+0x0012))
100 
#define rx_identifier_3_eff *((volatile unsigned char *)(CANADDR+0x0013))
101 
#define rx_identifier_4_eff *((volatile unsigned char *)(CANADDR+0x0014))
102 
#define rx_data_1_eff *((volatile unsigned char *)(CANADDR+0x0015))
103 
#define rx_data_2_eff *((volatile unsigned char *)(CANADDR+0x0016))
104 
#define rx_data_3_eff *((volatile unsigned char *)(CANADDR+0x0017))
105 
#define rx_data_4_eff *((volatile unsigned char *)(CANADDR+0x0018))
106 
#define rx_data_5_eff *((volatile unsigned char *)(CANADDR+0x0019))
107 
#define rx_data_6_eff *((volatile unsigned char *)(CANADDR+0x001A))
108 
#define rx_data_7_eff *((volatile unsigned char *)(CANADDR+0x001B))
109 
#define rx_data_8_eff *((volatile unsigned char *)(CANADDR+0x001C))
110 
 
111 
#define tx_frame_information_sff *((volatile unsigned char *)(CANADDR+0x0010))
112 
#define tx_identifier_1_sff *((volatile unsigned char *)(CANADDR+0x0011))
113 
#define tx_identifier_2_sff *((volatile unsigned char *)(CANADDR+0x0012))
114 
#define tx_data_1_sff *((volatile unsigned char *)(CANADDR+0x0013))
115 
#define tx_data_2_sff *((volatile unsigned char *)(CANADDR+0x0014))
116 
#define tx_data_3_sff *((volatile unsigned char *)(CANADDR+0x0015))
117 
#define tx_data_4_sff *((volatile unsigned char *)(CANADDR+0x0016))
118 
#define tx_data_5_sff *((volatile unsigned char *)(CANADDR+0x0017))
119 
#define tx_data_6_sff *((volatile unsigned char *)(CANADDR+0x0018))
120 
#define tx_data_7_sff *((volatile unsigned char *)(CANADDR+0x0019))
121 
#define tx_data_8_sff *((volatile unsigned char *)(CANADDR+0x001A))
122 
 
123 
#define tx_frame_information_eff *((volatile unsigned char *)(CANADDR+0x0010))
124 
#define tx_identifier_1_eff *((volatile unsigned char *)(CANADDR+0x0011))
125 
#define tx_identifier_2_eff *((volatile unsigned char *)(CANADDR+0x0012))
126 
#define tx_identifier_3_eff *((volatile unsigned char *)(CANADDR+0x0013))
127 
#define tx_identifier_4_eff *((volatile unsigned char *)(CANADDR+0x0014))
128 
#define tx_data_1_eff *((volatile unsigned char *)(CANADDR+0x0015))
129 
#define tx_data_2_eff *((volatile unsigned char *)(CANADDR+0x0016))
130 
#define tx_data_3_eff *((volatile unsigned char *)(CANADDR+0x0017))
131 
#define tx_data_4_eff *((volatile unsigned char *)(CANADDR+0x0018))
132 
#define tx_data_5_eff *((volatile unsigned char *)(CANADDR+0x0019))
133 
#define tx_data_6_eff *((volatile unsigned char *)(CANADDR+0x001A))
134 
#define tx_data_7_eff *((volatile unsigned char *)(CANADDR+0x001B))
135 
#define tx_data_8_eff *((volatile unsigned char *)(CANADDR+0x001C))
136 
 
137 
#define rx_message_counter *((volatile unsigned char *)(CANADDR+0x001D))
138 
#define rx_buffer_start_address *((volatile unsigned char *)(CANADDR+0x001E))
139 
#define clock_divider_register *((volatile unsigned char *)(CANADDR+0x001F))
140 
 
141 
#endif
142 
 
143 
 
144 
#define reset_mode_on 0x01
145 
#define reset_mode_off 0xFE
146 
#define enable_all_int 0x1E
147 
#define tx_request 0x01
148 
#define basic_mode 0x7F
149 
#define extended_mode 0x80
150 
#define release_buffer 0x04
151 
 
152 
#define self_test_mode 0x04
153 
#define self_reception 0x10
154 
#define enable_all_int_eff 0xFF
155 
 
156 
 
157 
 
158 
 
159 
// Baudrates calculated for 40 MHz fclk
160 
 
161 
 
162 
#define CAN_TIM0_10K              49
163 
#define CAN_TIM1_10K            0x1c
164 
#define CAN_TIM0_20K            0xA7
165 
#define CAN_TIM1_20K            0x7F
166 
#define CAN_TIM0_40K            0xB1    /* Old Bit Timing Standard of port */
167 
#define CAN_TIM1_40K            0x25    /* Old Bit Timing Standard of port */
168 
#define CAN_TIM0_50K            0xA7
169 
#define CAN_TIM1_50K            0x25
170 
#define CAN_TIM0_100K           0x93    /* sp 87%, 16 abtastungen, sjw 1 */
171 
#define CAN_TIM1_100K           0x25
172 
#define CAN_TIM0_125K           0x8F
173 
#define CAN_TIM1_125K           0x25
174 
#define CAN_TIM0_250K           0x87
175 
#define CAN_TIM1_250K           0x25
176 
#define CAN_TIM0_500K           0x83
177 
#define CAN_TIM1_500K           0x25
178 
#define CAN_TIM0_800K           0x84
179 
#define CAN_TIM1_800K           0x25
180 
#define CAN_TIM0_1000K          0x81
181 
#define CAN_TIM1_1000K          0x25
182 
 
183 
 
184 
 
185 
 
186 
 
187 
 
188 
 
189 
 
190 
 
191 
 
192 
// can mode "Basic" or "Extended"
193 
//const char * mode = "Basic";
194 
//const char * mode = "Extended";
195 
// waits for some time
196 
void kill_time(int rep) {
197 
  int i;
198 
 
199 
  for (i=rep; i>0; --i)
200 
    asm("nop");
201 
}
202 
 
203 
 
204 
 
205 
void self_testing_mode()
206 
{
207 
        volatile unsigned char r_val;
208 
 
209 
        printf("************************************\n");
210 
        printf("***** Set to self testing mode *****\n");
211 
        printf("************************************\n");
212 
 
213 
        r_val = control_register | self_test_mode;
214 
        control_register = r_val;
215 
        printf( "control_register 0x%X \n\n",control_register);
216 
 
217 
}
218 
 
219 
 
220 
void reset_all_irqs()
221 
{
222 
        printf("************************************\n");
223 
        printf("********** reset all irqs **********\n");
224 
        printf("************************************\n");
225 
 
226 
        printf( "interrupt_register 0x%X \n\n",interrupt_register);
227 
 
228 
 
229 
}
230 
void disable_irq_sff()
231 
{
232 
        volatile unsigned char r_val;
233 
 
234 
        printf("************************************\n");
235 
        printf("*********** disable irqs ***********\n");
236 
        printf("************************************\n");
237 
 
238 
        r_val = interrupt_enable_register | enable_all_int_eff;
239 
        interrupt_enable_register = r_val;
240 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
241 
 
242 
}
243 
 
244 
void enable_irq_sff()
245 
{
246 
        volatile unsigned char r_val;
247 
 
248 
        //printf("************************************\n");
249 
        //printf("*********** enable irqs ************\n");
250 
        //printf("************************************\n");
251 
 
252 
        r_val = control_register | enable_all_int;
253 
        control_register = r_val;
254 
        printf( "control_register 0x%X \n\n",control_register);
255 
}
256 
 
257 
void disable_irq_eff()
258 
{
259 
        volatile unsigned char r_val;
260 
 
261 
        printf("************************************\n");
262 
        printf("*********** disable irqs ***********\n");
263 
        printf("************************************\n");
264 
 
265 
        r_val = interrupt_enable_register | enable_all_int_eff;
266 
        interrupt_enable_register = r_val;
267 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
268 
 
269 
}
270 
 
271 
void enable_irq_eff()
272 
{
273 
        volatile unsigned char r_val;
274 
 
275 
        printf("************************************\n");
276 
        printf("*********** enable irqs eff ********\n");
277 
        printf("************************************\n");
278 
 
279 
        r_val = interrupt_enable_register | enable_all_int_eff;
280 
        interrupt_enable_register = r_val;
281 
        printf( "interrupt_enable_register 0x%X \n\n",interrupt_enable_register);
282 
 
283 
}
284 
 
285 
void tx_request_command()
286 
{
287 
        volatile unsigned char r_val;
288 
 
289 
//      printf("************************************\n");
290 
//      printf("*********** tx requestet ***********\n");
291 
//      printf("************************************\n");
292 
 
293 
        printf( "Send transmit-request \n");
294 
        r_val = command_register | tx_request;
295 
        command_register = r_val;
296 
        printf( "command register: 0x%X \n\n",command_register);
297 
}
298 
void self_reception_request()
299 
{
300 
        volatile unsigned char r_val;
301 
 
302 
        printf("************************************\n");
303 
        printf("***** self reception requestet *****\n");
304 
        printf("************************************\n");
305 
 
306 
        r_val = command_register | self_reception;
307 
        command_register = r_val;
308 
        printf( "command register : 0x%X \n\n",command_register);
309 
 
310 
}
311 
 
312 
void release_receive_buffer()
313 
{
314 
        volatile unsigned char r_val;
315 
 
316 
        printf("************************************\n");
317 
        printf("****** release receive buffer ******\n");
318 
        printf("************************************\n");
319 
 
320 
 
321 
        r_val = command_register | release_buffer;
322 
        command_register = r_val;
323 
        printf( "command register : 0x%X \n\n",command_register);
324 
 
325 
}
326 
 
327 
void read_receive_buffer_basic()
328 
{
329 
        volatile unsigned char r_val;
330 
 
331 
        printf("************************************\n");
332 
        printf("******** read receive buffer *******\n");
333 
        printf("************************************\n");
334 
 
335 
        printf( "identifier 0: 0x%X \n",rb_identifier_byte_0);
336 
 
337 
        printf( "identifier 1: 0x%X \n",rb_identifier_byte_1);
338 
 
339 
        printf( "data byte 1: 0x%X \n",rb_data_byte_1);
340 
 
341 
        printf( "data byte 2: 0x%X \n",rb_data_byte_2);
342 
 
343 
        printf( "data byte 3: 0x%X \n",rb_data_byte_3);
344 
 
345 
        printf( "data byte 4: 0x%X \n",rb_data_byte_4);
346 
 
347 
        printf( "data byte 5: 0x%X \n",rb_data_byte_5);
348 
 
349 
        printf( "data byte 6: 0x%X \n",rb_data_byte_6);
350 
 
351 
        printf( "data byte 7: 0x%X \n",rb_data_byte_7);
352 
 
353 
        printf( "data byte 8: 0x%X \n\n",rb_data_byte_8);
354 
 
355 
}
356 
 
357 
 
358 
void read_receive_buffer_extended()
359 
{
360 
        volatile unsigned char r_val;
361 
 
362 
        printf("************************************\n");
363 
        printf("******* read frame extended ********\n");
364 
        printf("************************************\n");
365 
 
366 
        printf( "rx_frame_information_eff: 0x%X \n\n",rx_frame_information_eff);
367 
 
368 
        printf( "identifier 0: 0x%X \n",rx_identifier_1_eff);
369 
 
370 
        printf( "identifier 1: 0x%X \n",rx_identifier_2_eff);
371 
 
372 
        printf( "identifier 2: 0x%X \n",rx_identifier_3_eff);
373 
 
374 
        printf( "identifier 3: 0x%X \n\n",rx_identifier_4_eff);
375 
 
376 
        printf( "data byte 1: 0x%X \n",rx_data_1_eff);
377 
 
378 
        printf( "data byte 2: 0x%X \n",rx_data_2_eff);
379 
 
380 
        printf( "data byte 3: 0x%X \n",rx_data_3_eff);
381 
 
382 
        printf( "data byte 4: 0x%X \n",rx_data_4_eff);
383 
 
384 
        printf( "data byte 5: 0x%X \n",rx_data_5_eff);
385 
 
386 
        printf( "data byte 6: 0x%X \n",rx_data_6_eff);
387 
 
388 
        printf( "data byte 7: 0x%X \n",rx_data_7_eff);
389 
 
390 
        printf( "data byte 8: 0x%X \n\n",rx_data_8_eff);
391 
 
392 
}
393 
 
394 
/*void write_frame_basic()
395 
{
396 
        volatile unsigned char r_val;
397 
 
398 
        printf("************************************\n");
399 
        printf("********* Send frame basic *********\n");
400 
        printf("************************************\n");
401 
 
402 
        printf( "Set identifier - 0xEA 0x28\n");
403 
        tb_identifier_byte_0 = 0xEA;
404 
        printf( "identifier 0: 0x%X \n",tb_identifier_byte_0);
405 
 
406 
        tb_identifier_byte_1 = 0x28;
407 
        printf( "identifier 1: 0x%X \n\n",tb_identifier_byte_1);
408 
 
409 
        printf( "Set data byte 1 \n");
410 
        tb_data_byte_1 = 0x12;
411 
        printf( "data byte 1: 0x%X \n",tb_data_byte_1);
412 
 
413 
        printf( "Set data byte 2 \n");
414 
        tb_data_byte_2 = 0x34;
415 
        printf( "data byte 2: 0x%X \n",tb_data_byte_2);
416 
 
417 
        printf( "Set data byte 3 \n");
418 
        tb_data_byte_3 = 0x56;
419 
        printf( "data byte 3: 0x%X \n",tb_data_byte_3);
420 
 
421 
        printf( "Set data byte 4 \n");
422 
        tb_data_byte_4 = 0x78;
423 
        printf( "data byte 4: 0x%X \n",tb_data_byte_4);
424 
 
425 
        printf( "Set data byte 5 \n");
426 
        tb_data_byte_5 = 0x9A;
427 
        printf( "data byte 5: 0x%X \n",tb_data_byte_5);
428 
 
429 
        printf( "Set data byte 6 \n");
430 
        tb_data_byte_6 = 0xBC;
431 
        printf( "data byte 6: 0x%X \n",tb_data_byte_6);
432 
 
433 
        printf( "Set data byte 7 \n");
434 
        tb_data_byte_7 = 0xDE;
435 
        printf( "data byte 7: 0x%X \n",tb_data_byte_7);
436 
 
437 
        printf( "Set data byte 8 \n");
438 
        tb_data_byte_8 = 0xF0;
439 
        printf( "data byte 8: 0x%X \n\n",tb_data_byte_8);
440 
}
441 
*/
442 
/*void write_frame_extended()
443 
{
444 
        volatile unsigned char r_val;
445 
 
446 
        printf("************************************\n");
447 
        printf("******* write frame extended *******\n");
448 
        printf("************************************\n");
449 
 
450 
 
451 
        tx_frame_information_eff = 0x88;
452 
        printf( "tx_frame_information_eff: 0x%X \n\n",tx_frame_information_eff);
453 
 
454 
 
455 
        printf( "Set identifier - 0xA6 0xB0 0x12 0x30\n");
456 
        tx_identifier_1_eff = 0xA6;
457 
        printf( "identifier 0: 0x%X \n",tx_identifier_1_eff);
458 
 
459 
        tx_identifier_2_eff = 0xB0;
460 
        printf( "identifier 1: 0x%X \n",tx_identifier_2_eff);
461 
 
462 
        tx_identifier_3_eff = 0x12;
463 
        printf( "identifier 2: 0x%X \n",tx_identifier_3_eff);
464 
 
465 
        tx_identifier_4_eff = 0x30;
466 
        printf( "identifier 3: 0x%X \n\n",tx_identifier_4_eff);
467 
 
468 
        printf( "Set data - 0x12 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0\n");
469 
        tx_data_1_eff = 0x12;
470 
        printf( "data byte 1: 0x%X \n",tx_data_1_eff);
471 
 
472 
        tx_data_2_eff = 0x34;
473 
        printf( "data byte 2: 0x%X \n",tx_data_2_eff);
474 
 
475 
        tx_data_3_eff = 0x56;
476 
        printf( "data byte 3: 0x%X \n",tx_data_3_eff);
477 
 
478 
        tx_data_4_eff = 0x78;
479 
        printf( "data byte 4: 0x%X \n",tx_data_4_eff);
480 
 
481 
        tx_data_5_eff = 0x9A;
482 
        printf( "data byte 5: 0x%X \n",tx_data_5_eff);
483 
 
484 
        tx_data_6_eff = 0xBC;
485 
        printf( "data byte 6: 0x%X \n",tx_data_6_eff);
486 
 
487 
        tx_data_7_eff = 0xDE;
488 
        printf( "data byte 7: 0x%X \n",tx_data_7_eff);
489 
 
490 
        tx_data_8_eff = 0xF0;
491 
        printf( "data byte 8: 0x%X \n\n",tx_data_8_eff);
492 
 
493 
}
494 
*/
495 
 
496 
void init_can(char * mode, char * self_test)
497 
{
498 
        volatile unsigned char r_val;
499 
 
500 
        if (mode == "Basic")
501 
        {
502 
                //printf("************************************\n");
503 
                printf("********** Basic Can Mode **********\n");
504 
                //printf("************************************\n");
505 
 
506 
                printf( "Switch on Reset Mode\n");
507 
                r_val = control_register | reset_mode_on;
508 
                control_register = r_val;
509 
                //printf( "control_register: 0x%X \n\n",control_register);
510 
 
511 
                //printf( "Set clock divider register to basic can mode\n");
512 
                r_val = clock_divider_register & basic_mode | 0x07;
513 
                clock_divider_register = r_val;
514 
                //printf( "clock_divider_register: 0x%X \n\n",clock_divider_register);
515 
 
516 
                //printf( "Output control register \n");
517 
                //output_control_register = 0x01;
518 
                //printf( "output control register : 0x%X \n\n",output_control_register);
519 
 
520 
                //printf( "Set bus timing register 0\n");
521 
                //printf( "Sync Jump Width = 2  Baudrate Prescaler = 1\n");
522 
                bus_timing_0_register = 0x83;
523 
                //printf( "bus timing register 0: 0x%X \n\n",bus_timing_0_register);
524 
 
525 
                //printf( "Set bus timing register 1\n");
526 
                //printf( "SAM = 0 ---> Single Sampling\n");
527 
                bus_timing_1_register = 0x25;
528 
                //printf( "bus timing register 1: 0x%X \n\n",bus_timing_1_register);
529 
 
530 
                //printf( "Set acceptance code register\n");
531 
                acceptance_code_register = 0xEA;
532 
                //printf( "acceptance code register: 0x%X \n\n",acceptance_code_register);
533 
 
534 
                //printf( "Set acceptance mask register\n");
535 
                acceptance_mask_register = 0x0F;
536 
                //printf( "acceptance mask register: 0x%X \n\n",acceptance_mask_register);
537 
 
538 
 
539 
                kill_time(50);
540 
 
541 
                printf( "Switch off reset mode\n");
542 
                r_val = control_register & reset_mode_off;
543 
                control_register = r_val;
544 
                //printf( "control_register 0x%X \n\n",control_register);
545 
 
546 
                kill_time(50);
547 
 
548 
        }
549 
        else if (mode == "Extended")
550 
        {
551 
                printf("************************************\n");
552 
                printf("******** Extended Can Mode *********\n");
553 
                printf("************************************\n");
554 
 
555 
                printf( "Switch on Reset Mode\n");
556 
                r_val = control_register | reset_mode_on;
557 
                control_register = r_val;
558 
                printf( "control_register: 0x%X \n\n",control_register);
559 
 
560 
 
561 
                kill_time(50);
562 
 
563 
 
564 
                printf( "Set clock divider register to extended can mode\n");
565 
                r_val = clock_divider_register | extended_mode | 0x07;
566 
                clock_divider_register = r_val;
567 
                printf( "clock_divider_register: 0x%X \n\n",clock_divider_register);
568 
 
569 
                kill_time(50);
570 
 
571 
                //printf( "Output control register \n");
572 
                //output_control_register = 0x01;
573 
                //printf( "output control register: 0x%X \n\n",output_control_register);
574 
 
575 
                printf( "Set bus timing register 0\n");
576 
                printf( "Sync Jump Width = 2  Baudrate Prescaler = 1\n");
577 
                bus_timing_0_register = 0xA8;
578 
                printf( "bus timing register 0: 0x%X \n\n",bus_timing_0_register);
579 
 
580 
                printf( "Set bus timing register 1\n");
581 
                printf( "SAM = 0 ---> Single Sampling\n");
582 
                bus_timing_1_register = 0x34;
583 
                printf( "bus timing register 1: 0x%X \n\n",bus_timing_1_register);
584 
 
585 
                printf( "Set acceptance code register\n");
586 
                acceptance_code_0 = 0xA6;
587 
                printf( "acceptance code register 0: 0x%X \n",acceptance_code_0);
588 
 
589 
                acceptance_code_1 = 0xB0;
590 
                printf( "acceptance code register 1: 0x%X \n",acceptance_code_1);
591 
 
592 
                acceptance_code_2 = 0x12;
593 
                printf( "acceptance code register 2: 0x%X \n",acceptance_code_2);
594 
 
595 
                acceptance_code_3 = 0x30;
596 
                printf( "acceptance code register 3: 0x%X \n\n",acceptance_code_3);
597 
 
598 
 
599 
                printf( "Set acceptance mask register\n");
600 
                acceptance_mask_0 = 0x00;
601 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_0);
602 
 
603 
                acceptance_mask_1 = 0x00;
604 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_1);
605 
 
606 
                acceptance_mask_2 = 0x00;
607 
                printf( "acceptance mask register: 0x%X \n",acceptance_mask_2);
608 
 
609 
                acceptance_mask_3 = 0x00;
610 
                printf( "acceptance mask register: 0x%X \n\n",acceptance_mask_3);
611 
 
612 
                if (self_test == "self_test")
613 
                {
614 
                        self_testing_mode();
615 
                }
616 
 
617 
                printf( "Switch off reset mode\n");
618 
                r_val = control_register & reset_mode_off;
619 
                control_register = r_val;
620 
                printf( "control_register 0x%X \n\n",control_register);
621 
 
622 
                kill_time(50);
623 
        }
624 
 
625 
 
626 
}
627 
 
628 
 
629 
void self_reception_test()
630 
{
631 
        volatile unsigned char r_val;
632 
 
633 
        printf( "Switch on Reset Mode\n");
634 
        control_register = 0x01;
635 
        printf( "control 0x%X \n\n",control_register);
636 
 
637 
        // witch to extended mode
638 
        clock_divider_register = 0x80;
639 
        printf( "clock_divider 0x%X \n\n",clock_divider_register);
640 
 
641 
        // set bus timing
642 
        //bus_timing_0_register = 0xBF;
643 
        bus_timing_0_register = 0x80;
644 
 
645 
        bus_timing_1_register = 0x34;
646 
 
647 
        // set acceptance and mask register
648 
        acceptance_code_0 = 0xA6;
649 
        printf( "acceptance 0 0x%X \n",acceptance_code_0);
650 
 
651 
        acceptance_code_1 = 0xB0;
652 
        printf( "acceptance 1 0x%X \n",acceptance_code_1);
653 
 
654 
        acceptance_code_2 = 0x12;
655 
        printf( "acceptance 2 0x%X \n",acceptance_code_2);
656 
 
657 
        acceptance_code_3 = 0x30;
658 
        printf( "acceptance 3 0x%X \n\n",acceptance_code_3);
659 
 
660 
        acceptance_mask_0 = 0x00;
661 
        printf( "acceptance mask 0x%X \n",acceptance_mask_0);
662 
 
663 
        acceptance_mask_1 = 0x00;
664 
        printf( "acceptance mask 0x%X \n",acceptance_mask_1);
665 
 
666 
        acceptance_mask_2 = 0x00;
667 
        printf( "acceptance mask 0x%X \n",acceptance_mask_2);
668 
 
669 
        acceptance_mask_3 = 0x00;
670 
        printf( "acceptance mask 0x%X \n\n",acceptance_mask_3);
671 
 
672 
        // Setting the "self test mode"
673 
        control_register = 0x05;
674 
        printf( "control 0x%X \n\n",control_register);
675 
 
676 
        kill_time(50);
677 
        // Switch-off reset mode
678 
        control_register = 0X04;
679 
        printf( "control_register 0x%X \n\n",control_register);
680 
 
681 
        kill_time(150);
682 
 
683 
        // Send frame
684 
        tx_frame_information_eff = 0x88;
685 
 
686 
        printf( "Set identifier - 0xA6 0xB0 0x12 0x30\n");
687 
        tx_identifier_1_eff = 0xA6;
688 
        //printf( "identifier 0: 0x%X \n",tx_identifier_1_eff);
689 
 
690 
        tx_identifier_2_eff = 0xB0;
691 
        //printf( "identifier 1: 0x%X \n",tx_identifier_2_eff);
692 
 
693 
        tx_identifier_3_eff = 0x12;
694 
        //printf( "identifier 2: 0x%X \n",tx_identifier_3_eff);
695 
 
696 
        tx_identifier_4_eff = 0x30;
697 
        //printf( "identifier 3: 0x%X \n\n",tx_identifier_4_eff);
698 
 
699 
        printf( "Set data - 0x12 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0\n");
700 
        tx_data_1_eff = 0x12;
701 
        //printf( "data byte 1: 0x%X \n",tx_data_1_eff);
702 
 
703 
        tx_data_2_eff = 0x34;
704 
        //printf( "data byte 2: 0x%X \n",tx_data_2_eff);
705 
 
706 
        tx_data_3_eff = 0x56;
707 
        //printf( "data byte 3: 0x%X \n",tx_data_3_eff);
708 
 
709 
        tx_data_4_eff = 0x78;
710 
        //printf( "data byte 4: 0x%X \n",tx_data_4_eff);
711 
 
712 
        tx_data_5_eff = 0x9A;
713 
        //printf( "data byte 5: 0x%X \n",tx_data_5_eff);
714 
 
715 
        tx_data_6_eff = 0xBC;
716 
        //printf( "data byte 6: 0x%X \n",tx_data_6_eff);
717 
 
718 
        tx_data_7_eff = 0xDE;
719 
        //printf( "data byte 7: 0x%X \n",tx_data_7_eff);
720 
 
721 
        tx_data_8_eff = 0xF0;
722 
        //printf( "data byte 8: 0x%X \n\n",tx_data_8_eff);
723 
 
724 
 
725 
        // Enable ints
726 
        interrupt_enable_register = 0xFF;
727 
        kill_time(50);
728 
        //tx_request_command();
729 
        self_reception_request();
730 
 
731 
 
732 
        //tx_request_command();
733 
        printf( "Finnished \n");
734 
 
735 
        printf( "control_register 0x%X \n\n",control_register);
736 
 
737 
        //kill_time(10000);
738 
 
739 
        printf( "interrupt_register 0x%X \n\n",interrupt_register);
740 
 
741 
        printf( "control_register 0x%X \n\n",control_register);
742 
 
743 
        //read_receive_buffer_extended();
744 
}
745 
 
746 
void write_frame_basic(volatile unsigned char write_field[])
747 
{
748 
        int i = 0;
749 
 
750 
        //printf("************************************\n");
751 
        //printf("******** write frame basic *********\n");
752 
        //printf("************************************\n");
753 
 
754 
            for (i=0; i<10; i++)
755 
              {
756 
                *((volatile unsigned char *)(CANADDR+0x000A+i)) = write_field[i];
757 
                kill_time(10);
758 
                printf( "write data: %i , 0x%X , 0x%X \n",i,write_field[i],*((volatile unsigned char *)(CANADDR+0x000A+i)));
759 
              }
760 
 
761 
}
762 
 
763 
void write_frame_extended(volatile unsigned char write_field[])
764 
{
765 
        int i = 0;
766 
        //printf("************************************\n");
767 
        printf("******* write frame extended *******\n");
768 
        //printf("************************************\n");
769 
 
770 
        for (i=0; i<13; i++)
771 
        {
772 
                *((volatile unsigned char *)(CANADDR+0x0010+i)) = write_field[i];
773 
                kill_time(10);
774 
                printf( "write data %i:  0x%X , 0x%X \n",i,write_field[i],*((volatile unsigned char *)(CANADDR+0x0010+i)));
775 
        }
776 
 
777 
}
778 
 
779 
int test_read_frame_extended(volatile unsigned char write_field[])
780 
{
781 
        volatile unsigned char read_field[13];
782 
        int i = 0;
783 
 
784 
        for (i=0; i<13; i++)
785 
        {
786 
                read_field[i] = *((volatile unsigned char *)(CANADDR+0x0010+i));
787 
        }
788 
 
789 
        for (i=0; i<13; i++)
790 
        {
791 
                if (read_field[i] != write_field[i])
792 
                {
793 
                        return 0;
794 
                }
795 
        }
796 
 
797 
        return 1;
798 
}
799 
 
800 
 
801 
main()
802 
{
803 
  int i;
804 
 
805 
  volatile unsigned char frame_basic0[10]  = {0xEA,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
806 
 
807 
  volatile unsigned char frame_basic1[10]  = {0xEB,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
808 
 
809 
  volatile unsigned char frame_basic2[10]  = {0xEC,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
810 
 
811 
  volatile unsigned char frame_basic3[10]  = {0xED,0x28,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
812 
 
813 
  volatile unsigned char frame_extended[13] = {0x88,0xA6,0xB0,0x12,0x30,0x12,0x34,0x56,0x78,0x9A,0xBC,0xDE,0xF0};
814 
 
815 
 
816 
 
817 
  volatile unsigned char r_val;
818 
 
819 
 
820 
  init_can("Basic","normal");
821 
 
822 
  enable_irq_sff();
823 
 
824 
  //while(1)
825 
  //  {
826 
 
827 
      write_frame_basic(frame_basic0);
828 
 
829 
      tx_request_command();
830 
 
831 
      reset_all_irqs();
832 
 
833 
      kill_time(100000);
834 
 
835 
      write_frame_basic(frame_basic1);
836 
 
837 
      tx_request_command();
838 
 
839 
      reset_all_irqs();
840 
 
841 
      kill_time(100000);
842 
 
843 
      write_frame_basic(frame_basic2);
844 
 
845 
      tx_request_command();
846 
 
847 
      reset_all_irqs();
848 
 
849 
      kill_time(100000);
850 
 
851 
      write_frame_basic(frame_basic3);
852 
 
853 
      tx_request_command();
854 
 
855 
      reset_all_irqs();
856 
 
857 
      kill_time(100000);
858 
 
859 
      // }
860 
    //read_receive_buffer_basic();
861 
    self_reception_test();
862 
}
863 
 

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