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[/] [mips_fault_tolerant/] [trunk/] [source/] [Or_tree.vhd] - Blame information for rev 45

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Line No. Rev Author Line
1 27 jimi39
----------------------------------------------------------------------------------
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-- Company: 
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-- Engineer: 
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-- 
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-- Create Date:    01:18:47 05/21/2012 
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-- Design Name: 
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-- Module Name:    Or_tree - Behavioral 
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-- Project Name: 
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-- Target Devices: 
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-- Tool versions: 
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-- Description: 
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--
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-- Dependencies: 
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--
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-- Revision: 
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-- Revision 0.01 - File Created
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-- Additional Comments: 
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.numeric_std.all;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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--use IEEE.NUMERIC_STD.ALL;
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-- Uncomment the following library declaration if instantiating
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-- any Xilinx primitives in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity Or_tree is
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Generic (
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         busw : integer := 31
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);
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Port ( Mux_out : in  STD_LOGIC_VECTOR (busw downto 0);
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       Zero : out  STD_LOGIC
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          );
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end Or_tree;
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architecture Behavioral of Or_tree is
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begin
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          Zero <= '1' WHEN ( Mux_out (31 DOWNTO 0) = x"00000000") ELSE '0';
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end Behavioral;
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