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[/] [mips_fault_tolerant/] [trunk/] [source/] [adder.vhd] - Blame information for rev 67

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Line No. Rev Author Line
1 3 jimi39
----------------------------------------------------------------------------------
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-- Company: 
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-- Engineer: 
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-- 
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-- Create Date:    01:51:49 04/11/2012 
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-- Design Name: 
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-- Module Name:    adder - Behavioral 
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-- Project Name: 
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-- Target Devices: 
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-- Tool versions: 
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-- Description: 
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--
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-- Dependencies: 
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--
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-- Revision: 
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-- Revision 0.01 - File Created
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-- Additional Comments: 
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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--use IEEE.STD_LOGIC_ARITH.ALL;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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use IEEE.NUMERIC_STD.ALL;
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-- Uncomment the following library declaration if instantiating
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-- any Xilinx primitives in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity adder is
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Port
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(
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           A : in  STD_LOGIC_VECTOR (31 downto 0);
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           B : in  STD_LOGIC_VECTOR (31 downto 0);
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           ALUop : in  STD_LOGIC_VECTOR (1 downto 0);
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                          --ov : out std_logic;
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                          S : out  STD_LOGIC_VECTOR (31 downto 0)
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);
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end adder;
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architecture Behavioral of adder is
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begin
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adder:process(ALUop,A,B)
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variable  add_sub : STD_LOGIC_VECTOR (32 downto 0);
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variable  ov_temp : STD_LOGIC;
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--variable  A_sn,B_sn,result :  signed(31 downto 0);
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--variable  A_i,B_i :integer; 
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         begin
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         CASE ALUop IS
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              When  "00"  =>
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                                                add_sub := (A(31) & A) + (B(31) & B);
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                                                                ov_temp := (A(31) and B(31) and (not add_sub(31))) or
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                                                                ((not A(31)) and (not B(31)) and add_sub(31));
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                                                                --ov <= ov_temp;
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                        When  "01"  =>
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                                                                add_sub := ('0' & A) + ('0' & B);
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                                                                ov_temp := add_sub(32);
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                        When  "10"  =>
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                                       add_sub := (A(31) & A) - (B(31) & B);
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                                                                ov_temp := ((not A(31)) and B(31) and add_sub(31)) or
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                                                                (A(31) and (not B(31)) and (add_sub(31)));
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                                                                --ov <= ov_temp;
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                        When  "11"  =>
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                                                                add_sub := ('0' & A) - ('0' & B);
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                                                                ov_temp := add_sub(32);
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         When others =>
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                                        S <= (others =>'0');
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         end Case;
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             S <= add_sub(31 downto 0);
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                       end process adder;
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end Behavioral;
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