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[/] [mkjpeg/] [trunk/] [design/] [quantizer/] [ROMQ.vhd] - Blame information for rev 30

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Line No.	Rev	Author	Line
1	25	mikel262	`--------------------------------------------------------------------------------`
2			`-- --`
3			`-- V H D L F I L E --`
4			`-- COPYRIGHT (C) 2006 --`
5			`-- --`
6			`--------------------------------------------------------------------------------`
7			`--`
8			`-- Title : DCT`
9			`-- Design : MDCT Core`
10			`-- Author : Michal Krepa`
11			`--`
12			`--------------------------------------------------------------------------------`
13			`--`
14			`-- File : ROMQ.VHD`
15			`-- Created : Sun Aug 27 18:09 2006`
16			`--`
17			`--------------------------------------------------------------------------------`
18			`--`
19			`-- Description : ROM for DCT quantizer matrix`
20			`--`
21			`--------------------------------------------------------------------------------`
22
23			`library IEEE;`
24			`use IEEE.STD_LOGIC_1164.all;`
25			`use ieee.numeric_std.all;`
26
27			`entity ROMQ is`
28			`generic`
29			`(`
30			`ROMADDR_W : INTEGER := 6;`
31			`ROMDATA_W : INTEGER := 8`
32			`);`
33			`port(`
34			`addr : in STD_LOGIC_VECTOR(ROMADDR_W-1 downto 0);`
35			`clk : in STD_LOGIC;`
36
37			`datao : out STD_LOGIC_VECTOR(ROMDATA_W-1 downto 0)`
38			`);`
39
40			`end ROMQ;`
41
42			`architecture RTL of ROMQ is`
43
44			`type ROMQ_TYPE is array (0 to 2**ROMADDR_W-1)`
45			`of INTEGER range 0 to 2**ROMDATA_W-1;`
46
47			`constant rom : ROMQ_TYPE :=`
48			`-- (`
49			`-- 16,11,10,16,24,40,51,61,`
50			`-- 12,12,14,19,26,58,60,55,`
51			`-- 14,13,16,24,40,57,69,56,`
52			`-- 14,17,22,29,51,87,80,62,`
53			`-- 18,22,37,56,68,109,103,77,`
54			`-- 24,35,55,64,81,104,113,92,`
55			`-- 49,64,78,87,103,121,120,101,`
56			`-- 72,92,95,98,112,100,103,99);`
57			`(`
58			`--8,6,6,7,6,5,8,`
59			`--7,7,7,9,9,8,10,12,`
60			`--20,13,12,11,11,12,25,18,19,15,20,29,`
61			`--26,31,30,29,26,28,28,32,36,46,39,32,`
62			`--34,44,35,28,28,40,55,41,44,48,49,52,52,52,`
63			`--31,39,57,61,56,50,60,46,51,52,50`
64
65
66
67
68			`1,1,1,1,1,1,1,1,`
69			`1,1,1,1,1,1,1,1,`
70			`1,1,1,1,1,1,1,1,`
71			`1,1,1,1,1,1,1,1,`
72			`1,1,1,1,1,1,1,1,`
73			`1,1,1,1,1,1,1,1,`
74			`1,1,1,1,1,1,1,1,`
75			`1,1,1,1,1,1,1,1`
76			`);`
77
78
79
80			`signal addr_reg : STD_LOGIC_VECTOR(ROMADDR_W-1 downto 0);`
81			`begin`
82
83			`datao <= STD_LOGIC_VECTOR(TO_UNSIGNED( rom( TO_INTEGER(UNSIGNED(addr_reg)) ), ROMDATA_W));`
84
85			`process(clk)`
86			`begin`
87			`if clk = '1' and clk'event then`
88			`addr_reg <= addr;`
89			`end if;`
90			`end process;`
91
92			`end RTL;`

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[/] [mkjpeg/] [trunk/] [design/] [quantizer/] [ROMQ.vhd] - Blame information for rev 30