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mikel262 |
-------------------------------------------------------------------------------
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-- File Name : HostBFM.vhd
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--
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-- Project : JPEG_ENC
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--
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-- Module : HostBFM
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--
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-- Content : Host BFM (Xilinx OPB v2.1)
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--
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-- Description :
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--
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-- Spec. :
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--
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-- Author : Michal Krepa
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--
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-------------------------------------------------------------------------------
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-- History :
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-- 20090301: (MK): Initial Creation.
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use IEEE.STD_LOGIC_TEXTIO.ALL;
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library STD;
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use STD.TEXTIO.ALL;
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library work;
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use work.GPL_V2_Image_Pkg.ALL;
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use WORK.MDCT_PKG.all;
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use WORK.MDCTTB_PKG.all;
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entity HostBFM is
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port
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(
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CLK : in std_logic;
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RST : in std_logic;
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-- OPB
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OPB_ABus : out std_logic_vector(31 downto 0);
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OPB_BE : out std_logic_vector(3 downto 0);
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OPB_DBus_in : out std_logic_vector(31 downto 0);
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OPB_RNW : out std_logic;
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OPB_select : out std_logic;
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OPB_DBus_out : in std_logic_vector(31 downto 0);
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OPB_XferAck : in std_logic;
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OPB_retry : in std_logic;
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OPB_toutSup : in std_logic;
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OPB_errAck : in std_logic;
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-- HOST DATA
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iram_wdata : out std_logic_vector(23 downto 0);
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iram_wren : out std_logic;
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fifo_almost_full : in std_logic;
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sim_done : out std_logic
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);
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end entity HostBFM;
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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----------------------------------- ARCHITECTURE ------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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architecture RTL of HostBFM is
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signal num_comps : integer;
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signal addr_inc : integer := 0;
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-------------------------------------------------------------------------------
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-- Architecture: begin
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-------------------------------------------------------------------------------
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begin
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-------------------------------------------------------------------
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-- code
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-------------------------------------------------------------------
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p_code : process
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-----------------------------------------------------------------
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-- HOST WRITE
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-----------------------------------------------------------------
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procedure host_write
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(
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signal clk : in std_logic;
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constant C_ADDR : in unsigned(31 downto 0);
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constant C_WDATA : in unsigned(31 downto 0);
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signal OPB_ABus : out std_logic_vector(31 downto 0);
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signal OPB_BE : out std_logic_vector(3 downto 0);
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signal OPB_DBus_in : out std_logic_vector(31 downto 0);
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signal OPB_RNW : out std_logic;
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signal OPB_select : out std_logic;
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signal OPB_XferAck : in std_logic
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) is
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begin
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OPB_ABus <= (others => '0');
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OPB_BE <= (others => '0');
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OPB_DBus_in <= (others => '0');
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OPB_RNW <= '0';
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OPB_select <= '0';
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wait until rising_edge(clk);
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OPB_select <= '1';
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OPB_ABus <= std_logic_vector(C_ADDR);
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OPB_RNW <= '0';
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OPB_BE <= X"F";
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OPB_DBus_in <= std_logic_vector(C_WDATA);
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wait until rising_edge(clk);
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while OPB_XferAck /= '1' loop
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wait until rising_edge(clk);
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end loop;
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OPB_ABus <= (others => '0');
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OPB_BE <= (others => '0');
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OPB_DBus_in <= (others => '0');
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OPB_RNW <= '0';
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OPB_select <= '0';
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assert false
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report CR&"Host write access, address = " & HexImage(C_ADDR) & ",data written = " & HexImage(C_WDATA) &CR
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severity note;
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wait until rising_edge(clk);
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end procedure host_write;
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-----------------------------------------------------------------
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-- HOST READ
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-----------------------------------------------------------------
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procedure host_read
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(
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signal clk : in std_logic;
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constant C_ADDR : in unsigned(31 downto 0);
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variable RDATA : out unsigned(31 downto 0);
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signal OPB_ABus : out std_logic_vector(31 downto 0);
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signal OPB_BE : out std_logic_vector(3 downto 0);
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signal OPB_DBus_out : in std_logic_vector(31 downto 0);
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signal OPB_RNW : out std_logic;
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signal OPB_select : out std_logic;
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signal OPB_XferAck : in std_logic
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)
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is
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variable data_r : std_logic_vector(31 downto 0);
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begin
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OPB_ABus <= (others => '0');
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OPB_BE <= (others => '0');
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OPB_DBus_in <= (others => '0');
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OPB_RNW <= '0';
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OPB_select <= '0';
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wait until rising_edge(clk);
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OPB_select <= '1';
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OPB_ABus <= std_logic_vector(C_ADDR);
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OPB_RNW <= '1';
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OPB_BE <= X"F";
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wait until rising_edge(clk);
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while OPB_XferAck /= '1' loop
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wait until rising_edge(clk);
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end loop;
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RDATA := unsigned(OPB_DBus_out);
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data_r := OPB_DBus_out;
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OPB_ABus <= (others => '0');
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OPB_BE <= (others => '0');
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OPB_DBus_in <= (others => '0');
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OPB_RNW <= '0';
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OPB_select <= '0';
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assert false
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report CR&"Host read access, address = " & HexImage(C_ADDR) & ",data read = " & HexImage(data_r) &CR
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severity note;
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wait until rising_edge(clk);
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end procedure host_read;
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--------------------------------------
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-- read text image data
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--------------------------------------
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procedure read_image is
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file infile : TEXT open read_mode is "test.txt";
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constant N : integer := 8;
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constant MAX_COMPS : integer := 3;
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variable inline : LINE;
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variable tmp_int : INTEGER := 0;
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variable y_size : INTEGER := 0;
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variable x_size : INTEGER := 0;
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variable matrix : I_MATRIX_TYPE;
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variable x_blk_cnt : INTEGER := 0;
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variable y_blk_cnt : INTEGER := 0;
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variable n_lines_arr : N_LINES_TYPE;
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variable line_n : INTEGER := 0;
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variable pix_n : INTEGER := 0;
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variable x_n : INTEGER := 0;
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variable y_n : INTEGER := 0;
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variable data_word : unsigned(31 downto 0);
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variable image_line : STD_LOGIC_VECTOR(0 to MAX_COMPS*MAX_IMAGE_SIZE_X*IP_W-1);
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constant C_IMAGE_RAM_BASE : unsigned(31 downto 0) := X"0010_0000";
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variable x_cnt : integer;
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variable data_word2 : unsigned(31 downto 0);
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variable num_comps_v : integer;
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begin
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READLINE(infile,inline);
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READ(inline,num_comps_v);
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READLINE(infile,inline);
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READ(inline,y_size);
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READLINE(infile,inline);
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READ(inline,x_size);
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num_comps <= num_comps_v;
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if y_size rem N > 0 then
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assert false
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report "E03: Image height dimension is not multiply of 8!"
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severity Failure;
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end if;
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if x_size rem N > 0 then
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assert false
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report "E03: Image width dimension is not multiply of 8!"
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severity Failure;
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end if;
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addr_inc <= 0;
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-- image size
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host_write(CLK, X"0000_0004", to_unsigned(x_size,16) & to_unsigned(y_size,16),
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OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
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iram_wren <= '0';
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for y_n in 0 to y_size-1 loop
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READLINE(infile,inline);
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HREAD(inline,image_line(0 to num_comps*x_size*IP_W-1));
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x_cnt := 0;
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for x_n in 0 to x_size-1 loop
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data_word := X"00" & UNSIGNED(image_line(x_cnt to x_cnt+num_comps*IP_W-1));
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data_word2(7 downto 0) := data_word(23 downto 16);
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data_word2(15 downto 8) := data_word(15 downto 8);
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data_word2(23 downto 16) := data_word(7 downto 0);
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iram_wren <= '0';
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iram_wdata <= (others => 'X');
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while(fifo_almost_full = '1') loop
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wait until rising_edge(clk);
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end loop;
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mikel262 |
--for i in 0 to 10 loop
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mikel262 |
-- wait until rising_edge(clk);
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--end loop;
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iram_wren <= '1';
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iram_wdata <= std_logic_vector(data_word2(23 downto 0));
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wait until rising_edge(clk);
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x_cnt := x_cnt + num_comps*IP_W;
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addr_inc <= addr_inc + 1;
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end loop;
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end loop;
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iram_wren <= '0';
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end read_image;
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------------------
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type ROMQ_TYPE is array (0 to 64-1)
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of unsigned(7 downto 0);
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constant qrom : ROMQ_TYPE :=
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(
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-- 100%
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--others => X"01"
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-- 85%
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--X"05", X"03", X"04", X"04",
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--X"04", X"03", X"05", X"04",
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--X"04", X"04", X"05", X"05",
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--X"05", X"06", X"07", X"0C",
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--X"08", X"07", X"07", X"07",
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--X"07", X"0F", X"0B", X"0B",
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--X"09", X"0C", X"11", X"0F",
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--X"12", X"12", X"11", X"0F",
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--X"11", X"11", X"13", X"16",
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--X"1C", X"17", X"13", X"14",
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--X"1A", X"15", X"11", X"11",
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--X"18", X"21", X"18", X"1A",
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--X"1D", X"1D", X"1F", X"1F",
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--X"1F", X"13", X"17", X"22",
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--X"24", X"22", X"1E", X"24",
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--X"1C", X"1E", X"1F", X"1E"
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-- 75%
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--X"08", X"06", X"06", X"07", X"06", X"05", X"08", X"07", X"07", X"07", X"09", X"09", X"08", X"0A", X"0C", X"14",
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--X"0D", X"0C", X"0B", X"0B", X"0C", X"19", X"12", X"13", X"0F", X"14", X"1D", X"1A", X"1F", X"1E", X"1D", X"1A",
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--X"1C", X"1C", X"20", X"24", X"2E", X"27", X"20", X"22", X"2C", X"23", X"1C", X"1C", X"28", X"37", X"29", X"2C",
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--X"30", X"31", X"34", X"34", X"34", X"1F", X"27", X"39", X"3D", X"38", X"32", X"3C", X"2E", X"33", X"34", X"32"
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-- 15 %
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--X"35", X"25", X"28", X"2F",
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--X"28", X"21", X"35", X"2F",
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--X"2B", X"2F", X"3C", X"39",
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--X"35", X"3F", X"50", X"85",
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--X"57", X"50", X"49", X"49",
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--X"50", X"A3", X"75", X"7B",
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--X"61", X"85", X"C1", X"AA",
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--X"CB", X"C8", X"BE", X"AA",
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--X"BA", X"B7", X"D5", X"F0",
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--X"FF", X"FF", X"D5", X"E2",
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--X"FF", X"E6", X"B7", X"BA",
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--X"FF", X"FF", X"FF", X"FF",
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--X"FF", X"FF", X"FF", X"FF",
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--X"FF", X"CE", X"FF", X"FF",
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--X"FF", X"FF", X"FF", X"FF",
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--X"FF", X"FF", X"FF", X"FF"
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-- 50%
|
| 330 |
|
|
X"10", X"0B", X"0C", X"0E", X"0C", X"0A", X"10", X"0E",
|
| 331 |
|
|
X"0D", X"0E", X"12", X"11", X"10", X"13", X"18", X"28",
|
| 332 |
|
|
X"1A", X"18", X"16", X"16", X"18", X"31", X"23", X"25",
|
| 333 |
|
|
X"1D", X"28", X"3A", X"33", X"3D", X"3C", X"39", X"33",
|
| 334 |
|
|
X"38", X"37", X"40", X"48", X"5C", X"4E", X"40", X"44",
|
| 335 |
|
|
X"57", X"45", X"37", X"38", X"50", X"6D", X"51", X"57",
|
| 336 |
|
|
X"5F", X"62", X"67", X"68", X"67", X"3E", X"4D", X"71",
|
| 337 |
|
|
X"79", X"70", X"64", X"78", X"5C", X"65", X"67", X"63"
|
| 338 |
|
|
);
|
| 339 |
|
|
|
| 340 |
|
|
variable data_read : unsigned(31 downto 0);
|
| 341 |
|
|
variable data_write : unsigned(31 downto 0);
|
| 342 |
|
|
variable addr : unsigned(31 downto 0);
|
| 343 |
|
|
|
| 344 |
|
|
|
| 345 |
|
|
------------------------------------------------------------------------------
|
| 346 |
|
|
-- BEGIN
|
| 347 |
|
|
------------------------------------------------------------------------------
|
| 348 |
|
|
begin
|
| 349 |
|
|
sim_done <= '0';
|
| 350 |
|
|
iram_wren <= '0';
|
| 351 |
|
|
|
| 352 |
|
|
while RST /= '0' loop
|
| 353 |
|
|
wait until rising_edge(clk);
|
| 354 |
|
|
end loop;
|
| 355 |
|
|
|
| 356 |
|
|
for i in 0 to 100 loop
|
| 357 |
|
|
wait until rising_edge(clk);
|
| 358 |
|
|
end loop;
|
| 359 |
|
|
|
| 360 |
|
|
|
| 361 |
|
|
|
| 362 |
|
|
host_read(CLK, X"0000_0000", data_read,
|
| 363 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
|
| 364 |
|
|
|
| 365 |
|
|
|
| 366 |
|
|
host_read(CLK, X"0000_0004", data_read,
|
| 367 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
|
| 368 |
|
|
|
| 369 |
|
|
-- write quantization table
|
| 370 |
|
|
for i in 0 to 64-1 loop
|
| 371 |
|
|
data_write := X"0000_00" & qrom(i);
|
| 372 |
|
|
addr := X"0000_0100" + to_unsigned(4*i,32);
|
| 373 |
|
|
-- SOF & num_comps
|
| 374 |
|
|
host_write(CLK, addr, data_write,
|
| 375 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
|
| 376 |
|
|
|
| 377 |
|
|
end loop;
|
| 378 |
|
|
|
| 379 |
|
|
|
| 380 |
|
|
|
| 381 |
|
|
data_write := to_unsigned(1,32) + shift_left(to_unsigned(3,32),1);
|
| 382 |
|
|
|
| 383 |
|
|
-- SOF & num_comps
|
| 384 |
|
|
host_write(CLK, X"0000_0000", data_write,
|
| 385 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
|
| 386 |
|
|
|
| 387 |
|
|
-- write BUF_FIFO with bitmap
|
| 388 |
|
|
read_image;
|
| 389 |
|
|
|
| 390 |
|
|
-- wait until JPEG encoding is done
|
| 391 |
|
|
host_read(CLK, X"0000_000C", data_read,
|
| 392 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
|
| 393 |
|
|
while data_read /= 2 loop
|
| 394 |
|
|
host_read(CLK, X"0000_000C", data_read,
|
| 395 |
|
|
OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
|
| 396 |
|
|
end loop;
|
| 397 |
|
|
|
| 398 |
|
|
sim_done <= '1';
|
| 399 |
|
|
|
| 400 |
|
|
wait;
|
| 401 |
|
|
|
| 402 |
|
|
end process;
|
| 403 |
|
|
|
| 404 |
|
|
|
| 405 |
|
|
end architecture RTL;
|
| 406 |
|
|
-------------------------------------------------------------------------------
|
| 407 |
|
|
-- Architecture: end
|
| 408 |
|
|
-------------------------------------------------------------------------------
|
