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rhoads |
---------------------------------------------------------------------
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-- TITLE: Controller / Opcode Decoder
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-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
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-- DATE CREATED: 2/8/01
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-- FILENAME: control.vhd
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-- PROJECT: MIPS CPU core
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-- COPYRIGHT: Software placed into the public domain by the author.
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-- Software 'as is' without warranty. Author liable for nothing.
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-- DESCRIPTION:
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-- Controls the CPU by decoding the opcode and generating control
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-- signals to the rest of the CPU.
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-- This entity decodes the MIPS opcode into a Very-Long-Word-Instruction.
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-- The 32-bit opcode is converted to a
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-- 6+6+6+16+5+2+3+3+2+2+3+2+4 = 60 bit VLWI opcode.
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-- Based on information found in:
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-- "MIPS RISC Architecture" by Gerry Kane and Joe Heinrich
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-- and "The Designer's Guide to VHDL" by Peter J. Ashenden
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---------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use work.mips_pack.all;
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entity control is
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port(opcode : in std_logic_vector(31 downto 0);
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intr_signal : in std_logic;
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pause_in : in std_logic;
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rs_index : out std_logic_vector(5 downto 0);
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rt_index : out std_logic_vector(5 downto 0);
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rd_index : out std_logic_vector(5 downto 0);
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imm_out : out std_logic_vector(15 downto 0);
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alu_func : out alu_function_type;
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shift_func : out shift_function_type;
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mult_func : out mult_function_type;
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branch_func : out branch_function_type;
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a_source_out : out a_source_type;
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b_source_out : out b_source_type;
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c_source_out : out c_source_type;
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pc_source_out: out pc_source_type;
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mem_source_out:out mem_source_type);
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end; --entity control
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architecture logic of control is
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-- type alu_function_type is (alu_nothing, alu_add, alu_subtract,
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-- alu_less_than, alu_less_than_signed, alu_equal, alu_not_equal,
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-- alu_ltz, alu_lez, alu_eqz, alu_nez, alu_gez, alu_gtz,
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-- alu_or, alu_and, alu_xor, alu_nor);
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-- type shift_function_type is (
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-- shift_nothing, shift_left_unsigned,
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-- shift_right_signed, shift_right_unsigned);
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-- type mult_function_type is (
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-- mult_nothing, mult_read_lo, mult_read_hi, mult_write_lo,
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-- mult_write_hi, mult_mult, mult_divide, mult_signed_divide);
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-- type a_source_type is (from_reg_source, from_imm10_6);
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-- type b_source_type is (from_reg_target, from_imm, from_signed_imm);
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-- type c_source_type is (from_null, from_alu, from_shift,
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-- from_mult, from_memory, from_pc, from_imm_shift16,
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-- from_reg_source_nez, from_reg_source_eqz);
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-- type pc_source_type is (from_inc4, from_inc8, from_reg_source,
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-- from_opcode25_0, from_branch, from_lbranch);
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begin
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control_proc: process(opcode, intr_signal, pause_in)
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variable op, func : std_logic_vector(5 downto 0);
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variable rs, rt, rd : std_logic_vector(5 downto 0);
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variable re, rtx : std_logic_vector(4 downto 0);
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variable imm : std_logic_vector(15 downto 0);
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variable alu_function : alu_function_type;
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variable shift_function : shift_function_type;
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variable mult_function : mult_function_type;
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variable a_source : a_source_type;
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variable b_source : b_source_type;
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variable c_source : c_source_type;
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variable pc_source : pc_source_type;
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variable branch_function: branch_function_type;
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variable mem_source : mem_source_type;
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begin
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alu_function := alu_nothing;
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shift_function := shift_nothing;
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mult_function := mult_nothing;
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a_source := a_from_reg_source;
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b_source := b_from_reg_target;
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c_source := c_from_null;
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pc_source := from_inc4;
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branch_function := branch_eq;
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mem_source := mem_none;
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op := opcode(31 downto 26);
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rs := '0' & opcode(25 downto 21);
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rt := '0' & opcode(20 downto 16);
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rtx := opcode(20 downto 16);
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rd := '0' & opcode(15 downto 11);
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re := opcode(10 downto 6);
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func := opcode(5 downto 0);
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imm := opcode(15 downto 0);
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case op is
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when "000000" => --00 SPECIAL
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case func is
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when "000000" => --00 SLL r[rd]=r[rt]<<re;
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a_source := a_from_imm10_6;
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c_source := c_from_shift;
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shift_function := shift_left_unsigned;
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when "000010" => --02 SRL r[rd]=u[rt]>>re;
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a_source := a_from_imm10_6;
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c_source := c_from_shift;
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shift_function := shift_right_unsigned;
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when "000011" => --03 SRA r[rd]=r[rt]>>re;
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a_source := a_from_imm10_6;
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c_source := c_from_shift;
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shift_function := shift_right_signed;
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when "000100" => --04 SLLV r[rd]=r[rt]<<r[rs];
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c_source := c_from_shift;
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shift_function := shift_left_unsigned;
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when "000110" => --06 SRLV r[rd]=u[rt]>>r[rs];
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c_source := c_from_shift;
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shift_function := shift_right_unsigned;
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when "000111" => --07 SRAV r[rd]=r[rt]>>r[rs];
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c_source := c_from_shift;
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shift_function := shift_right_signed;
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when "001000" => --08 JR s->pc_next=r[rs];
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pc_source := from_branch;
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alu_function := alu_add;
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branch_function := branch_yes;
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when "001001" => --09 JALR r[rd]=s->pc_next; s->pc_next=r[rs];
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rhoads |
c_source := c_from_pc_plus4;
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2 |
rhoads |
pc_source := from_branch;
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alu_function := alu_add;
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branch_function := branch_yes;
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when "001010" => --0a MOVZ if(!r[rt]) r[rd]=r[rs]; /*IV*/
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-- c_source := c_from_reg_source_eqz;
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when "001011" => --0b MOVN if(r[rt]) r[rd]=r[rs]; /*IV*/
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-- c_source := from_reg_source_nez;
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when "001100" => --0c SYSCALL
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-- if(r[4]==0) printf("0x%8.8lx ",r[5]);
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when "001101" => --0d BREAK s->wakeup=1;
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when "001111" => --0f SYNC s->wakeup=1;
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when "010000" => --10 MFHI r[rd]=s->hi;
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c_source := c_from_mult;
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mult_function := mult_read_hi;
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when "010001" => --11 FTHI s->hi=r[rs];
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mult_function := mult_write_hi;
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when "010010" => --12 MFLO r[rd]=s->lo;
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c_source := c_from_mult;
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mult_function := mult_read_lo;
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when "010011" => --13 MTLO s->lo=r[rs];
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mult_function := mult_write_lo;
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when "011000" => --18 MULT s->lo=r[rs]*r[rt]; s->hi=0;
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mult_function := mult_mult;
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when "011001" => --19 MULTU s->lo=r[rs]*r[rt]; s->hi=0;
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mult_function := mult_mult;
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when "011010" => --1a DIV s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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mult_function := mult_signed_divide;
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when "011011" => --1b DIVU s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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mult_function := mult_divide;
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when "100000" => --20 ADD r[rd]=r[rs]+r[rt];
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c_source := c_from_alu;
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alu_function := alu_add;
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when "100001" => --21 ADDU r[rd]=r[rs]+r[rt];
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c_source := c_from_alu;
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alu_function := alu_add;
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when "100010" => --22 SUB r[rd]=r[rs]-r[rt];
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c_source := c_from_alu;
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alu_function := alu_subtract;
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when "100011" => --23 SUBU r[rd]=r[rs]-r[rt];
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c_source := c_from_alu;
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alu_function := alu_subtract;
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when "100100" => --24 AND r[rd]=r[rs]&r[rt];
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c_source := c_from_alu;
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alu_function := alu_and;
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when "100101" => --25 OR r[rd]=r[rs]|r[rt];
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c_source := c_from_alu;
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alu_function := alu_or;
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when "100110" => --26 XOR r[rd]=r[rs]^r[rt];
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c_source := c_from_alu;
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alu_function := alu_xor;
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when "100111" => --27 NOR r[rd]=~(r[rs]|r[rt]);
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c_source := c_from_alu;
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alu_function := alu_nor;
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when "101010" => --2a SLT r[rd]=r[rs]<r[rt];
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c_source := c_from_alu;
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alu_function := alu_less_than_signed;
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when "101011" => --2b SLTU r[rd]=u[rs]<u[rt];
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c_source := c_from_alu;
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alu_function := alu_less_than;
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when "101101" => --2d DADDU r[rd]=r[rs]+u[rt];
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c_source := c_from_alu;
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alu_function := alu_add;
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when "110001" => --31 TGEU
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when "110010" => --32 TLT
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when "110011" => --33 TLTU
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when "110100" => --34 TEQ
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when "110110" => --36 TNE
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192 |
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when others =>
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end case;
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when "000001" => --00 REGIMM
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rt := "000000";
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rd := "011111";
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197 |
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a_source := a_from_pc;
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b_source := b_from_immX4;
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199 |
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alu_function := alu_add;
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200 |
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pc_source := from_branch;
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201 |
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branch_function := branch_gtz;
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202 |
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--if(test) pc=pc+imm*4
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203 |
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case rtx is
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when "10000" => --10 BLTZAL r[31]=s->pc_next; branch=r[rs]<0;
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205 |
6 |
rhoads |
c_source := c_from_pc_plus4;
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206 |
2 |
rhoads |
branch_function := branch_ltz;
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207 |
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when "00000" => --00 BLTZ branch=r[rs]<0;
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208 |
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branch_function := branch_ltz;
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209 |
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when "10001" => --11 BGEZAL r[31]=s->pc_next; branch=r[rs]>=0;
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6 |
rhoads |
c_source := c_from_pc_plus4;
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211 |
2 |
rhoads |
branch_function := branch_gez;
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when "00001" => --01 BGEZ branch=r[rs]>=0;
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213 |
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branch_function := branch_gez;
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214 |
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when "10010" => --12 BLTZALL r[31]=s->pc_next; lbranch=r[rs]<0;
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215 |
6 |
rhoads |
c_source := c_from_pc_plus4;
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216 |
2 |
rhoads |
pc_source := from_lbranch;
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217 |
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branch_function := branch_ltz;
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218 |
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when "00010" => --02 BLTZL lbranch=r[rs]<0;
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219 |
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pc_source := from_lbranch;
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220 |
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branch_function := branch_ltz;
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221 |
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when "10011" => --13 BGEZALL r[31]=s->pc_next; lbranch=r[rs]>=0;
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222 |
6 |
rhoads |
c_source := c_from_pc_plus4;
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223 |
2 |
rhoads |
pc_source := from_lbranch;
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224 |
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branch_function := branch_gez;
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225 |
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when "00011" => --03 BGEZL lbranch=r[rs]>=0;
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226 |
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pc_source := from_lbranch;
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227 |
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branch_function := branch_gez;
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228 |
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when others =>
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229 |
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end case;
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230 |
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when "000011" => --03 JAL r[31]=s->pc_next; s->pc_next=(s->pc&0xf0000000)|target;
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231 |
6 |
rhoads |
c_source := c_from_pc_plus4;
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232 |
2 |
rhoads |
rd := "011111";
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233 |
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pc_source := from_opcode25_0;
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234 |
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when "000010" => --02 J s->pc_next=(s->pc&0xf0000000)|target;
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235 |
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pc_source := from_opcode25_0;
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236 |
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when "000100" => --04 BEQ branch=r[rs]==r[rt];
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237 |
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a_source := a_from_pc;
|
238 |
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b_source := b_from_immX4;
|
239 |
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alu_function := alu_add;
|
240 |
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pc_source := from_branch;
|
241 |
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branch_function := branch_eq;
|
242 |
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when "000101" => --05 BNE branch=r[rs]!=r[rt];
|
243 |
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a_source := a_from_pc;
|
244 |
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b_source := b_from_immX4;
|
245 |
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alu_function := alu_add;
|
246 |
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pc_source := from_branch;
|
247 |
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branch_function := branch_ne;
|
248 |
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when "000110" => --06 BLEZ branch=r[rs]<=0;
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249 |
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a_source := a_from_pc;
|
250 |
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b_source := b_from_immX4;
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251 |
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alu_function := alu_add;
|
252 |
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pc_source := from_branch;
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253 |
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branch_function := branch_ltz;
|
254 |
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when "000111" => --07 BGTZ branch=r[rs]>0;
|
255 |
|
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a_source := a_from_pc;
|
256 |
|
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b_source := b_from_immX4;
|
257 |
|
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alu_function := alu_add;
|
258 |
|
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pc_source := from_branch;
|
259 |
|
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branch_function := branch_gtz;
|
260 |
|
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when "001000" => --08 ADDI r[rt]=r[rs]+(short)imm;
|
261 |
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b_source := b_from_signed_imm;
|
262 |
|
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c_source := c_from_alu;
|
263 |
|
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rd := rt;
|
264 |
|
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alu_function := alu_add;
|
265 |
|
|
when "001001" => --09 ADDIU u[rt]=u[rs]+(short)imm;
|
266 |
|
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b_source := b_from_signed_imm;
|
267 |
|
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c_source := c_from_alu;
|
268 |
|
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rd := rt;
|
269 |
|
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alu_function := alu_add;
|
270 |
|
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when "001010" => --0a SLTI r[rt]=r[rs]<(short)imm;
|
271 |
|
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b_source := b_from_signed_imm;
|
272 |
|
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c_source := c_from_alu;
|
273 |
|
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rd := rt;
|
274 |
|
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alu_function := alu_less_than;
|
275 |
|
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when "001011" => --0b SLTIU u[rt]=u[rs]<(unsigned long)(short)imm;
|
276 |
|
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b_source := b_from_imm;
|
277 |
|
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c_source := c_from_alu;
|
278 |
|
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rd := rt;
|
279 |
|
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alu_function := alu_less_than;
|
280 |
|
|
when "001100" => --0c ANDI r[rt]=r[rs]&imm;
|
281 |
|
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b_source := b_from_imm;
|
282 |
|
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c_source := c_from_alu;
|
283 |
|
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rd := rt;
|
284 |
|
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alu_function := alu_and;
|
285 |
|
|
when "001101" => --0d ORI r[rt]=r[rs]|imm;
|
286 |
|
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b_source := b_from_imm;
|
287 |
|
|
c_source := c_from_alu;
|
288 |
|
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rd := rt;
|
289 |
|
|
alu_function := alu_or;
|
290 |
|
|
when "001110" => --0e XORI r[rt]=r[rs]^imm;
|
291 |
|
|
b_source := b_from_imm;
|
292 |
|
|
c_source := c_from_alu;
|
293 |
|
|
rd := rt;
|
294 |
|
|
alu_function := alu_xor;
|
295 |
|
|
when "001111" => --0f LUI r[rt]=(imm<<16);
|
296 |
|
|
c_source := c_from_imm_shift16;
|
297 |
|
|
rd := rt;
|
298 |
|
|
when "010000" => --10 COP0
|
299 |
|
|
alu_function := alu_or;
|
300 |
|
|
c_source := c_from_alu;
|
301 |
|
|
if opcode(23) = '0' then --move from CP0
|
302 |
|
|
rs := '1' & opcode(15 downto 11);
|
303 |
|
|
rt := "000000";
|
304 |
|
|
rd := '0' & opcode(20 downto 16);
|
305 |
|
|
else --move to CP0
|
306 |
|
|
rs := "000000";
|
307 |
|
|
rd(5) := '1';
|
308 |
|
|
end if;
|
309 |
|
|
when "010001" => --11 COP1
|
310 |
|
|
when "010010" => --12 COP2
|
311 |
|
|
when "010011" => --13 COP3
|
312 |
|
|
when "010100" => --14 BEQL lbranch=r[rs]==r[rt];
|
313 |
|
|
a_source := a_from_pc;
|
314 |
|
|
b_source := b_from_immX4;
|
315 |
|
|
alu_function := alu_add;
|
316 |
|
|
pc_source := from_lbranch;
|
317 |
|
|
branch_function := branch_eq;
|
318 |
|
|
when "010101" => --15 BNEL lbranch=r[rs]!=r[rt];
|
319 |
|
|
a_source := a_from_pc;
|
320 |
|
|
b_source := b_from_immX4;
|
321 |
|
|
alu_function := alu_add;
|
322 |
|
|
pc_source := from_lbranch;
|
323 |
|
|
branch_function := branch_ne;
|
324 |
|
|
when "010110" => --16 BLEZL lbranch=r[rs]<=0;
|
325 |
|
|
a_source := a_from_pc;
|
326 |
|
|
b_source := b_from_immX4;
|
327 |
|
|
alu_function := alu_add;
|
328 |
|
|
pc_source := from_lbranch;
|
329 |
|
|
branch_function := branch_lez;
|
330 |
|
|
when "010111" => --17 BGTZL lbranch=r[rs]>0;
|
331 |
|
|
a_source := a_from_pc;
|
332 |
|
|
b_source := b_from_immX4;
|
333 |
|
|
alu_function := alu_add;
|
334 |
|
|
pc_source := from_lbranch;
|
335 |
|
|
branch_function := branch_gtz;
|
336 |
|
|
when "100000" => --20 LB r[rt]=*(signed char*)ptr;
|
337 |
|
|
a_source := a_from_reg_source;
|
338 |
|
|
b_source := b_from_imm;
|
339 |
|
|
alu_function := alu_add;
|
340 |
|
|
rd := rt;
|
341 |
|
|
c_source := c_from_memory;
|
342 |
|
|
mem_source := mem_read8s; --address=(short)imm+r[rs];
|
343 |
|
|
when "100001" => --21 LH r[rt]=*(signed short*)ptr;
|
344 |
|
|
a_source := a_from_reg_source;
|
345 |
|
|
b_source := b_from_imm;
|
346 |
|
|
alu_function := alu_add;
|
347 |
|
|
rd := rt;
|
348 |
|
|
c_source := c_from_memory;
|
349 |
|
|
mem_source := mem_read16s; --address=(short)imm+r[rs];
|
350 |
|
|
when "100010" => --22 LWL //fixme
|
351 |
|
|
when "100011" => --23 LW r[rt]=*(long*)ptr;
|
352 |
|
|
a_source := a_from_reg_source;
|
353 |
|
|
b_source := b_from_imm;
|
354 |
|
|
alu_function := alu_add;
|
355 |
|
|
rd := rt;
|
356 |
|
|
c_source := c_from_memory;
|
357 |
|
|
mem_source := mem_read32;
|
358 |
|
|
when "100100" => --24 LBU r[rt]=*(unsigned char*)ptr;
|
359 |
|
|
a_source := a_from_reg_source;
|
360 |
|
|
b_source := b_from_imm;
|
361 |
|
|
alu_function := alu_add;
|
362 |
|
|
rd := rt;
|
363 |
|
|
c_source := c_from_memory;
|
364 |
|
|
mem_source := mem_read8; --address=(short)imm+r[rs];
|
365 |
|
|
when "100101" => --25 LHU r[rt]=*(unsigned short*)ptr;
|
366 |
|
|
a_source := a_from_reg_source;
|
367 |
|
|
b_source := b_from_imm;
|
368 |
|
|
alu_function := alu_add;
|
369 |
|
|
rd := rt;
|
370 |
|
|
c_source := c_from_memory;
|
371 |
|
|
mem_source := mem_read16; --address=(short)imm+r[rs];
|
372 |
|
|
when "100110" => --26 LWR //fixme
|
373 |
|
|
when "101000" => --28 SB *(char*)ptr=(char)r[rt];
|
374 |
|
|
a_source := a_from_reg_source;
|
375 |
|
|
b_source := b_from_imm;
|
376 |
|
|
alu_function := alu_add;
|
377 |
|
|
mem_source := mem_write8; --address=(short)imm+r[rs];
|
378 |
|
|
when "101001" => --29 SH *(short*)ptr=(short)r[rt];
|
379 |
|
|
a_source := a_from_reg_source;
|
380 |
|
|
b_source := b_from_imm;
|
381 |
|
|
alu_function := alu_add;
|
382 |
|
|
mem_source := mem_write16;
|
383 |
|
|
when "101010" => --2a SWL //fixme
|
384 |
|
|
when "101011" => --2b SW *(long*)ptr=r[rt];
|
385 |
|
|
a_source := a_from_reg_source;
|
386 |
|
|
b_source := b_from_imm;
|
387 |
|
|
alu_function := alu_add;
|
388 |
|
|
mem_source := mem_write32; --address=(short)imm+r[rs];
|
389 |
|
|
when "101110" => --2e SWR //fixme
|
390 |
|
|
when "101111" => --2f CACHE
|
391 |
|
|
when "110000" => --30 LL r[rt]=*(long*)ptr;
|
392 |
|
|
when "110001" => --31 LWC1
|
393 |
|
|
when "110010" => --32 LWC2
|
394 |
|
|
when "110011" => --33 LWC3
|
395 |
|
|
when "110101" => --35 LDC1
|
396 |
|
|
when "110110" => --36 LDC2
|
397 |
|
|
when "110111" => --37 LDC3
|
398 |
|
|
when "111000" => --38 SC *(long*)ptr=r[rt]; r[rt]=1;
|
399 |
|
|
when "111001" => --39 SWC1
|
400 |
|
|
when "111010" => --3a SWC2
|
401 |
|
|
when "111011" => --3b SWC3
|
402 |
|
|
when "111101" => --3d SDC1
|
403 |
|
|
when "111110" => --3e SDC2
|
404 |
|
|
when "111111" => --3f SDC3
|
405 |
|
|
when others =>
|
406 |
|
|
end case;
|
407 |
|
|
|
408 |
10 |
rhoads |
if c_source = c_from_null or pause_in = '1' then
|
409 |
2 |
rhoads |
rd := "000000";
|
410 |
|
|
end if;
|
411 |
|
|
|
412 |
|
|
if intr_signal = '1' then
|
413 |
|
|
rs := "111111"; --interrupt vector
|
414 |
|
|
rt := "000000";
|
415 |
6 |
rhoads |
rd := "101110"; --save PC in EPC
|
416 |
|
|
alu_function := alu_or;
|
417 |
|
|
shift_function := shift_nothing;
|
418 |
|
|
mult_function := mult_nothing;
|
419 |
|
|
branch_function := branch_yes;
|
420 |
2 |
rhoads |
a_source := a_from_reg_source;
|
421 |
|
|
b_source := b_from_reg_target;
|
422 |
6 |
rhoads |
c_source := c_from_pc;
|
423 |
|
|
pc_source := from_lbranch;
|
424 |
|
|
mem_source := mem_none;
|
425 |
2 |
rhoads |
end if;
|
426 |
|
|
|
427 |
|
|
rs_index <= rs;
|
428 |
|
|
rt_index <= rt;
|
429 |
|
|
rd_index <= rd;
|
430 |
|
|
imm_out <= imm;
|
431 |
|
|
alu_func <= alu_function;
|
432 |
|
|
shift_func <= shift_function;
|
433 |
|
|
mult_func <= mult_function;
|
434 |
|
|
branch_func <= branch_function;
|
435 |
|
|
a_source_out <= a_source;
|
436 |
|
|
b_source_out <= b_source;
|
437 |
|
|
c_source_out <= c_source;
|
438 |
|
|
pc_source_out <= pc_source;
|
439 |
|
|
mem_source_out <= mem_source;
|
440 |
|
|
|
441 |
|
|
end process;
|
442 |
|
|
|
443 |
|
|
end; --logic
|
444 |
|
|
|