Subversion Repositories mlite

JDF G

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PROJECT jop

DESIGN jop

DEVFAM spartan3e

DEVFAMTIME 0

DEVICE xc3s500e

DEVICETIME 0

DEVPKG fg320

DEVPKGTIME 0

DEVSPEED -4

DEVTOPLEVELMODULETYPE HDL

TOPLEVELMODULETYPETIME 0

DEVSYNTHESISTOOL XST (VHDL/Verilog)

SYNTHESISTOOLTIME 0

DEVSIMULATOR Modelsim

SIMULATORTIME 0

DEVGENERATEDSIMULATIONMODEL VHDL

GENERATEDSIMULATIONMODELTIME 0

SOURCE mlite_pack.vhd

SOURCE plasma_3e.vhd

SOURCE ddr_ctrl.vhd

SOURCE plasma.vhd

SOURCE ram_image.vhd

SOURCE uart.vhd

SOURCE eth_dma.vhd

SOURCE mlite_cpu.vhd

SOURCE alu.vhd

SOURCE bus_mux.vhd

SOURCE control.vhd

SOURCE mem_ctrl.vhd

SOURCE mult.vhd

SOURCE pipeline.vhd

SOURCE pc_next.vhd

SOURCE reg_bank.vhd

SOURCE shifter.vhd

SOURCE cache.vhd

DEPASSOC spartan3e spartan3e.ucf