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[/] [mmcfpgaconfig/] [trunk/] [rtl/] [verilog/] [xmsmmc_minimal.v] - Blame information for rev 6

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1 2 openchip
//
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// BootX-XMSMMC IP Core demonstration
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// Minimal configuration - to show the absolute minimal resource useage
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// This configuration uses 20 Macrocells in Xilinx XCR3032
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// 
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// Copyright 2004-2005 Openchip
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// http://www.openchip.org
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//
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`include "mmc_boot_defines.v"
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module xmsmmc_minimal( cclk, done, init, mmc_cmd, mmc_clk );
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// Connect to FPGA CCLK, INIT, DONE
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// Init and Done need an external PULLUP Resistor!
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input  cclk;
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input  init;
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input  done;
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// MMC Card DAT goes to FPGA DIN
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// MMC Card CS (pin 1) tie high or leave floating
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// Connect to MMC Card CMD and CLK
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inout  mmc_cmd;
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output mmc_clk;
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// Instantiate XMSMMC IP
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xmsmmc_core boot_i (
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    .cclk    (   cclk    ),
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    .done    (   done    ),
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    .init    (   init    ),
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    .mmc_cmd (   mmc_cmd ),
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    .mmc_clk (   mmc_clk ),
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    .dis     (   1'b0    ),  // Tristate control not used
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    .error   (           )   // Error output not used
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    );
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endmodule

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