Subversion Repositories mod_mult_exp

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echo "Compiling Core VHDL UNISIM/Behavioral model"

vhpcomp  -work work ..\..\implement\results\routed.vhd

echo "Compiling Test Bench Files"

vhpcomp -work work    ..\bmg_tb_pkg.vhd

vhpcomp -work work    ..\random.vhd

vhpcomp -work work    ..\data_gen.vhd

vhpcomp -work work    ..\addr_gen.vhd

vhpcomp -work work    ..\checker.vhd

vhpcomp -work work    ..\bmg_stim_gen.vhd

vhpcomp -work work    ..\blockMemory_synth.vhd

vhpcomp -work work    ..\blockMemory_tb.vhd

    fuse -L simprim work.blockMemory_tb -o blockMemory_tb.exe

.\blockMemory_tb.exe -sdftyp /blockMemory_tb/blockMemory_synth_inst/bmg_port=..\..\implement\results\routed.sdf -gui -tclbatch simcmds.tcl