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Message file "usenglish/ip.msg" wasn't found.
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0: (0,0) : 72x256 u:64
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0: (0,0) : 72x256 u:64
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_input_block.vhd" Line 691: Comparison between arrays of unequal length always returns FALSE.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_input_block.vhd" Line 707: Comparison between arrays of unequal length always returns FALSE.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4199: Range is empty (null range)
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4199: Assignment ignored
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4206: Range is empty (null range)
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4206: Assignment ignored
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4213: Range is empty (null range)
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 4213: Assignment ignored
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_wrapper_s3.vhd" Line 370: Net <doutb_i[71]> does not have a driver.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_width.vhd" Line 429: Net <dina_pad[71]> does not have a driver.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_prim_width.vhd" Line 433: Net <dinb_pad[71]> does not have a driver.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_generic_cstr.vhd" Line 1546: Comparison between arrays of unequal length always returns FALSE.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_generic_cstr.vhd" Line 1559: Comparison between arrays of unequal length always returns FALSE.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <doutb> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <rdaddrecc> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_bid> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_bresp> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rid> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rdata> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rresp> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rdaddrecc> of the instance <U0> is unconnected or connected to loadless signal.
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78 |
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <sbiterr> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <dbiterr> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_awready> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_wready> of the instance <U0> is unconnected or connected to loadless signal.
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91 |
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_bvalid> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_arready> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rlast> of the instance <U0> is unconnected or connected to loadless signal.
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100 |
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101 |
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_rvalid> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_sbiterr> of the instance <U0> is unconnected or connected to loadless signal.
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"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blockMemory.vhd" line 161: Output port <s_axi_dbiterr> of the instance <U0> is unconnected or connected to loadless signal.
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108 |
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109 |
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110 |
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Input <S_AXI_AWID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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111 |
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112 |
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113 |
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Input <S_AXI_AWADDR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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114 |
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115 |
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116 |
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Input <S_AXI_AWLEN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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117 |
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118 |
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119 |
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Input <S_AXI_AWSIZE> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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120 |
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121 |
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122 |
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Input <S_AXI_AWBURST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
123 |
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124 |
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125 |
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Input <S_AXI_WDATA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
126 |
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127 |
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128 |
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Input <S_AXI_WSTRB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
129 |
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130 |
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131 |
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Input <S_AXI_ARID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
132 |
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133 |
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134 |
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Input <S_AXI_ARADDR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
135 |
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136 |
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137 |
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Input <S_AXI_ARLEN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
138 |
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139 |
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140 |
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Input <S_AXI_ARSIZE> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
141 |
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142 |
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143 |
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Input <S_AXI_ARBURST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
144 |
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145 |
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146 |
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Input <S_AClk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
147 |
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148 |
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149 |
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Input <S_ARESETN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
150 |
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151 |
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152 |
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Input <S_AXI_AWVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
153 |
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154 |
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155 |
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Input <S_AXI_WLAST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
156 |
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157 |
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158 |
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Input <S_AXI_WVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
159 |
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160 |
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161 |
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Input <S_AXI_BREADY> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
162 |
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163 |
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164 |
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Input <S_AXI_ARVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
165 |
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166 |
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167 |
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Input <S_AXI_RREADY> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
168 |
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169 |
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170 |
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Input <S_AXI_INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
171 |
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172 |
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173 |
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Input <S_AXI_INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
174 |
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175 |
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176 |
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Signal 'S_AXI_BID', unconnected in block 'blk_mem_gen_v7_1_xst', is tied to its initial value (0000).
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177 |
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178 |
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179 |
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Signal <S_AXI_BRESP> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
180 |
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181 |
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182 |
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Signal 'S_AXI_RID', unconnected in block 'blk_mem_gen_v7_1_xst', is tied to its initial value (0000).
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183 |
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184 |
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185 |
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Signal <S_AXI_RDATA> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
186 |
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187 |
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188 |
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Signal <S_AXI_RRESP> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
189 |
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190 |
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191 |
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Signal <S_AXI_RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
192 |
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193 |
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194 |
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Signal <S_AXI_AWREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
195 |
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196 |
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197 |
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Signal <S_AXI_WREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
198 |
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199 |
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200 |
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Signal <S_AXI_BVALID> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
201 |
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202 |
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203 |
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Signal <S_AXI_ARREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
204 |
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205 |
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206 |
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Signal <S_AXI_RLAST> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
207 |
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208 |
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209 |
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Signal <S_AXI_RVALID> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
210 |
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211 |
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212 |
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Signal <S_AXI_SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
213 |
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214 |
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215 |
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Signal <S_AXI_DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
216 |
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217 |
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218 |
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Input <WEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
219 |
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220 |
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221 |
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Input <ADDRB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
222 |
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223 |
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224 |
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Input <DINB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
225 |
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226 |
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227 |
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Input <ENA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
228 |
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229 |
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230 |
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Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
231 |
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232 |
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233 |
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Input <CLKB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
234 |
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235 |
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236 |
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Input <RSTB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
237 |
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238 |
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239 |
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Input <ENB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
240 |
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241 |
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242 |
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Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
243 |
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244 |
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245 |
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Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
246 |
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247 |
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248 |
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Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
249 |
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250 |
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251 |
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Signal <INJECTDBITERR_I> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
252 |
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253 |
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254 |
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Signal <INJECTSBITERR_I> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
255 |
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256 |
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257 |
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Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
258 |
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259 |
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260 |
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Input <WEA<7:1>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
261 |
|
|
|
262 |
|
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|
263 |
|
|
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
264 |
|
|
|
265 |
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|
266 |
|
|
Input <WEB<7:1>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
267 |
|
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|
268 |
|
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|
269 |
|
|
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
270 |
|
|
|
271 |
|
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|
272 |
|
|
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
273 |
|
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|
274 |
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|
275 |
|
|
"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_generic_cstr.vhd" line 1343: Output port <SBITERR> of the instance <ramloop[0].ram.r> is unconnected or connected to loadless signal.
|
276 |
|
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|
277 |
|
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|
278 |
|
|
"E:\spent i praca\OpenCores\ModMultExp_opencores_edition\rtl\vhdl\mod_exp\blockMemory\tmp\_cg\_dbg\blk_mem_gen_v7_1\blk_mem_gen_generic_cstr.vhd" line 1343: Output port <DBITERR> of the instance <ramloop[0].ram.r> is unconnected or connected to loadless signal.
|
279 |
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|
280 |
|
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|
281 |
|
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Signal <RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
282 |
|
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|
283 |
|
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|
284 |
|
|
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
285 |
|
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|
286 |
|
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|
287 |
|
|
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
288 |
|
|
|
289 |
|
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|
290 |
|
|
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
291 |
|
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|
292 |
|
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|
293 |
|
|
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
294 |
|
|
|
295 |
|
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|
296 |
|
|
Signal 'dina_pad<71>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
297 |
|
|
|
298 |
|
|
|
299 |
|
|
Signal 'dina_pad<62>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
300 |
|
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|
301 |
|
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|
302 |
|
|
Signal 'dina_pad<53>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
303 |
|
|
|
304 |
|
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|
305 |
|
|
Signal 'dina_pad<44>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
306 |
|
|
|
307 |
|
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|
308 |
|
|
Signal 'dina_pad<35>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
309 |
|
|
|
310 |
|
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|
311 |
|
|
Signal 'dina_pad<26>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
312 |
|
|
|
313 |
|
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|
314 |
|
|
Signal 'dina_pad<17>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
315 |
|
|
|
316 |
|
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|
317 |
|
|
Signal 'dina_pad<8>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
318 |
|
|
|
319 |
|
|
|
320 |
|
|
Signal 'dinb_pad<71>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
321 |
|
|
|
322 |
|
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|
323 |
|
|
Signal 'dinb_pad<62>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
324 |
|
|
|
325 |
|
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|
326 |
|
|
Signal 'dinb_pad<53>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
327 |
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|
|
328 |
|
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|
329 |
|
|
Signal 'dinb_pad<44>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
330 |
|
|
|
331 |
|
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|
332 |
|
|
Signal 'dinb_pad<35>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
333 |
|
|
|
334 |
|
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|
335 |
|
|
Signal 'dinb_pad<26>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
336 |
|
|
|
337 |
|
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|
338 |
|
|
Signal 'dinb_pad<17>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
339 |
|
|
|
340 |
|
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|
341 |
|
|
Signal 'dinb_pad<8>', unconnected in block 'blk_mem_gen_prim_width', is tied to its initial value (0).
|
342 |
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|
343 |
|
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|
344 |
|
|
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
345 |
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|
346 |
|
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|
347 |
|
|
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
348 |
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|
349 |
|
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|
350 |
|
|
Input <ADDRB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
351 |
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|
352 |
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|
353 |
|
|
Input <DINB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
354 |
|
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|
355 |
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|
356 |
|
|
Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
357 |
|
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|
358 |
|
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|
359 |
|
|
Input <CLKB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
360 |
|
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|
361 |
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|
362 |
|
|
Input <ENB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
363 |
|
|
|
364 |
|
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|
365 |
|
|
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
366 |
|
|
|
367 |
|
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|
368 |
|
|
Input <WEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
369 |
|
|
|
370 |
|
|
|
371 |
|
|
Signal 'doutb_i', unconnected in block 'blk_mem_gen_prim_wrapper_s3', is tied to its initial value (000000000000000000000000000000000000000000000000000000000000000000000000).
|
372 |
|
|
|
373 |
|
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|
374 |
|
|
Input <DOUTB_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
375 |
|
|
|
376 |
|
|
|
377 |
|
|
Input <RDADDRECC_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
378 |
|
|
|
379 |
|
|
|
380 |
|
|
Input <CLKB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
381 |
|
|
|
382 |
|
|
|
383 |
|
|
Input <SBITERR_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
384 |
|
|
|
385 |
|
|
|
386 |
|
|
Input <DBITERR_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
387 |
|
|
|
388 |
|
|
|
389 |
|
|
Signal <RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
390 |
|
|
|
391 |
|
|
|
392 |
|
|
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
393 |
|
|
|
394 |
|
|
|
395 |
|
|
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
|
396 |
|
|
|
397 |
|
|
|
398 |
|
|
HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
|
399 |
|
|
|
400 |
|
|
|
401 |
|
|
You have chosen to run a version of XST which is not the default solution
|
402 |
|
|
for the specified device family. You are free to use it in order to take
|
403 |
|
|
advantage of its enhanced HDL parsing/elaboration capabilities. However,
|
404 |
|
|
please be aware that you may be impacted by language support differences.
|
405 |
|
|
This version may also result in circuit performance and device utilization
|
406 |
|
|
differences for your particular design. You can always revert back to the
|
407 |
|
|
default XST solution by setting the "use_new_parser" option to value "no"
|
408 |
|
|
on the XST command line or in the XST process properties panel.
|
409 |
|
|
|
410 |
|
|
|
411 |
|
|
|
412 |
|
|
|