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1 71 JonasDC 
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<ul><li class="info_message">Info: *******************************************************************</li><li class="info_message">Info: Running Quartus II 32-bit Analysis &amp; Synthesis<ul><li class="info_message">Info: Version 12.1 Build 177 11/07/2012 SJ Web Edition</li><li class="info_message">Info: Processing started: Wed Mar 06 16:03:46 2013</li></ul></li><li class="info_message">Info: Command: quartus_map --read_settings_files=on --write_settings_files=off mod_sim_exp -c mod_sim_exp_core</li><li class="warning_message">Warning (20028): Parallel compilation is not licensed and has been disabled</li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operand_ram_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operand_ram_asym-Behavioral</li><li class="info_message">Info (12023): Found entity 1: operand_ram_asym</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/tdpramblock_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: tdpramblock_asym-structural</li><li class="info_message">Info (12023): Found entity 1: tdpramblock_asym</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/tdpram_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: tdpram_asym-behavorial</li><li class="info_message">Info (12023): Found entity 1: tdpram_asym</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/modulus_ram_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: modulus_ram_asym-structural</li><li class="info_message">Info (12023): Found entity 1: modulus_ram_asym</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/dpramblock_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: dpramblock_asym-structural</li><li class="info_message">Info (12023): Found entity 1: dpramblock_asym</li></ul></li><li class="warning_message">Warning (10335): Unrecognized synthesis attribute &quot;ram_style&quot; at ../SVN/mod_sim_exp/rtl/vhdl/ram/dpram_asym.vhd(89)</li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/dpram_asym.vhd<ul><li class="info_message">Info (12022): Found design unit 1: dpram_asym-behavorial</li><li class="info_message">Info (12023): Found entity 1: dpram_asym</li></ul></li><li class="warning_message">Warning (10335): Unrecognized synthesis attribute &quot;ram_style&quot; at ../SVN/mod_sim_exp/rtl/vhdl/ram/tdpram_generic.vhd(81)</li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/tdpram_generic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: tdpram_generic-behavorial</li><li class="info_message">Info (12023): Found entity 1: tdpram_generic</li></ul></li><li class="warning_message">Warning (10335): Unrecognized synthesis attribute &quot;ram_style&quot; at ../SVN/mod_sim_exp/rtl/vhdl/ram/dpram_generic.vhd(77)</li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/ram/dpram_generic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: dpram_generic-behavorial</li><li class="info_message">Info (12023): Found entity 1: dpram_generic</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 0 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/std_functions.vhd<ul><li class="info_message">Info (12022): Found design unit 1: std_functions (mod_sim_exp)</li><li class="info_message">Info (12022): Found design unit 2: std_functions-body</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operand_ram_gen.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operand_ram_gen-Behavioral</li><li class="info_message">Info (12023): Found entity 1: operand_ram_gen</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/modulus_ram_gen.vhd<ul><li class="info_message">Info (12022): Found design unit 1: modulus_ram_gen-Behavioral</li><li class="info_message">Info (12023): Found entity 1: modulus_ram_gen</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/adder_block.vhd<ul><li class="info_message">Info (12022): Found design unit 1: adder_block-Structural</li><li class="info_message">Info (12023): Found entity 1: adder_block</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/autorun_cntrl.vhd<ul><li class="info_message">Info (12022): Found design unit 1: autorun_cntrl-Behavioral</li><li class="info_message">Info (12023): Found entity 1: autorun_cntrl</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/cell_1b.vhd<ul><li class="info_message">Info (12022): Found design unit 1: cell_1b-Structural</li><li class="info_message">Info (12023): Found entity 1: cell_1b</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/cell_1b_adder.vhd<ul><li class="info_message">Info (12022): Found design unit 1: cell_1b_adder-Behavioral</li><li class="info_message">Info (12023): Found entity 1: cell_1b_adder</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/cell_1b_mux.vhd<ul><li class="info_message">Info (12022): Found design unit 1: cell_1b_mux-Behavioral</li><li class="info_message">Info (12023): Found entity 1: cell_1b_mux</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/counter_sync.vhd<ul><li class="info_message">Info (12022): Found design unit 1: counter_sync-Behavioral</li><li class="info_message">Info (12023): Found entity 1: counter_sync</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/d_flip_flop.vhd<ul><li class="info_message">Info (12022): Found design unit 1: d_flip_flop-Behavorial</li><li class="info_message">Info (12023): Found entity 1: d_flip_flop</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/fifo_generic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: fifo_generic-arch</li><li class="info_message">Info (12023): Found entity 1: fifo_generic</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/mod_sim_exp_core.vhd<ul><li class="info_message">Info (12022): Found design unit 1: mod_sim_exp_core-Structural</li><li class="info_message">Info (12023): Found entity 1: mod_sim_exp_core</li></ul></li><li class="info_message">Info (12021): Found 1 design units, including 0 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/mod_sim_exp_pkg.vhd<ul><li class="info_message">Info (12022): Found design unit 1: mod_sim_exp_pkg (mod_sim_exp)</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/mont_ctrl.vhd<ul><li class="info_message">Info (12022): Found design unit 1: mont_ctrl-Behavioral</li><li class="info_message">Info (12023): Found entity 1: mont_ctrl</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/mont_multiplier.vhd<ul><li class="info_message">Info (12022): Found design unit 1: mont_multiplier-Structural</li><li class="info_message">Info (12023): Found entity 1: mont_multiplier</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operand_dp.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operand_dp-operand_dp_a</li><li class="info_message">Info (12023): Found entity 1: operand_dp</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operand_mem.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operand_mem-structural</li><li class="info_message">Info (12023): Found entity 1: operand_mem</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operand_ram.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operand_ram-Behavioral</li><li class="info_message">Info (12023): Found entity 1: operand_ram</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/operands_sp.vhd<ul><li class="info_message">Info (12022): Found design unit 1: operands_sp-operands_sp_a</li><li class="info_message">Info (12023): Found entity 1: operands_sp</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/register_1b.vhd<ul><li class="info_message">Info (12022): Found design unit 1: register_1b-Behavorial</li><li class="info_message">Info (12023): Found entity 1: register_1b</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/register_n.vhd<ul><li class="info_message">Info (12022): Found design unit 1: register_n-Behavorial</li><li class="info_message">Info (12023): Found entity 1: register_n</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/standard_cell_block.vhd<ul><li class="info_message">Info (12022): Found design unit 1: standard_cell_block-Structural</li><li class="info_message">Info (12023): Found entity 1: standard_cell_block</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/stepping_logic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: stepping_logic-Behavioral</li><li class="info_message">Info (12023): Found entity 1: stepping_logic</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/sys_first_cell_logic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: sys_first_cell_logic-Behavorial</li><li class="info_message">Info (12023): Found entity 1: sys_first_cell_logic</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/sys_last_cell_logic.vhd<ul><li class="info_message">Info (12022): Found design unit 1: sys_last_cell_logic-Behavorial</li><li class="info_message">Info (12023): Found entity 1: sys_last_cell_logic</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/sys_pipeline.vhd<ul><li class="info_message">Info (12022): Found design unit 1: sys_pipeline-Structural</li><li class="info_message">Info (12023): Found entity 1: sys_pipeline</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/sys_stage.vhd<ul><li class="info_message">Info (12022): Found design unit 1: sys_stage-Structural</li><li class="info_message">Info (12023): Found entity 1: sys_stage</li></ul></li><li class="info_message">Info (12021): Found 2 design units, including 1 entities, in source file /dropbox/svn/mod_sim_exp/rtl/vhdl/core/x_shift_reg.vhd<ul><li class="info_message">Info (12022): Found design unit 1: x_shift_reg-Behavioral</li><li class="info_message">Info (12023): Found entity 1: x_shift_reg</li></ul></li><li class="info_message">Info (12127): Elaborating entity &quot;operand_mem&quot; for the top level hierarchy</li><li class="info_message">Info (12128): Elaborating entity &quot;operand_ram_asym&quot; for hierarchy &quot;operand_ram_asym:\asym_RAM:xy_ram_asym&quot;</li><li class="warning_message">Warning (10873): Using initial value X (don&apos;t care) for net &quot;multiple_full_blocks:doutA_RAM[3]&quot; at operand_ram_asym.vhd(145)</li><li class="info_message">Info (12128): Elaborating entity &quot;tdpramblock_asym&quot; for hierarchy &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full&quot;</li><li class="info_message">Info (12128): Elaborating entity &quot;tdpram_asym&quot; for hierarchy &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock&quot;</li><li class="info_message">Info (12128): Elaborating entity &quot;modulus_ram_asym&quot; for hierarchy &quot;modulus_ram_asym:\asym_RAM:m_ram_asym&quot;</li><li class="info_message">Info (12128): Elaborating entity &quot;dpramblock_asym&quot; for hierarchy &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full&quot;</li><li class="info_message">Info (12128): Elaborating entity &quot;dpram_asym&quot; for hierarchy &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock&quot;</li><li class="info_message">Info (19000): Inferred 96 megafunctions from design logic<ul><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|tdpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|tdpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 6</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 4</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 64</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_A set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_PORT_B set to OLD_DATA</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:1:full_ones:ramblock_full|dpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:1:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:2:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:3:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:4:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:5:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:6:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:7:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:8:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:9:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:10:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:11:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:12:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:13:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:14:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li><li class="info_message">Info (276029): Inferred altsyncram megafunction from the following design logic: &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|dpram_asym:\ramblocks:15:ramblock|\altera_device:ram_rtl_0&quot; <ul><li class="info_message">Info (286033): Parameter OPERATION_MODE set to DUAL_PORT</li><li class="info_message">Info (286033): Parameter WIDTH_A set to 2</li><li class="info_message">Info (286033): Parameter WIDTHAD_A set to 5</li><li class="info_message">Info (286033): Parameter NUMWORDS_A set to 32</li><li class="info_message">Info (286033): Parameter WIDTH_B set to 32</li><li class="info_message">Info (286033): Parameter WIDTHAD_B set to 1</li><li class="info_message">Info (286033): Parameter NUMWORDS_B set to 2</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED</li><li class="info_message">Info (286033): Parameter ADDRESS_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter OUTDATA_ACLR_B set to NONE</li><li class="info_message">Info (286033): Parameter ADDRESS_REG_B set to CLOCK0</li><li class="info_message">Info (286033): Parameter INDATA_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter WRCONTROL_ACLR_A set to NONE</li><li class="info_message">Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA</li></ul></li></ul></li><li class="info_message">Info (12130): Elaborated megafunction instantiation &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock|altsyncram:\altera_device:ram_rtl_0&quot;</li><li class="info_message">Info (12133): Instantiated megafunction &quot;operand_ram_asym:\asym_RAM:xy_ram_asym|tdpramblock_asym:\multiple_full_blocks:ramblocks_full:2:full_ones:ramblock_full|tdpram_asym:\ramblocks:0:ramblock|altsyncram:\altera_device:ram_rtl_0&quot; with the following parameter:<ul><li class="info_message">Info (12134): Parameter &quot;OPERATION_MODE&quot; = &quot;BIDIR_DUAL_PORT&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTH_A&quot; = &quot;32&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTH_B&quot; = &quot;2&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTHAD_A&quot; = &quot;2&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTHAD_B&quot; = &quot;6&quot;</li><li class="info_message">Info (12134): Parameter &quot;NUMWORDS_A&quot; = &quot;4&quot;</li><li class="info_message">Info (12134): Parameter &quot;NUMWORDS_B&quot; = &quot;64&quot;</li><li class="info_message">Info (12134): Parameter &quot;OUTDATA_REG_A&quot; = &quot;UNREGISTERED&quot;</li><li class="info_message">Info (12134): Parameter &quot;OUTDATA_REG_B&quot; = &quot;UNREGISTERED&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_REG_B&quot; = &quot;CLOCK0&quot;</li><li class="info_message">Info (12134): Parameter &quot;INDATA_REG_B&quot; = &quot;CLOCK0&quot;</li><li class="info_message">Info (12134): Parameter &quot;WRCONTROL_WRADDRESS_REG_B&quot; = &quot;CLOCK0&quot;</li><li class="info_message">Info (12134): Parameter &quot;INDATA_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;WRCONTROL_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_ACLR_B&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;OUTDATA_ACLR_B&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;READ_DURING_WRITE_MODE_PORT_A&quot; = &quot;OLD_DATA&quot;</li><li class="info_message">Info (12134): Parameter &quot;READ_DURING_WRITE_MODE_PORT_B&quot; = &quot;OLD_DATA&quot;</li><li class="info_message">Info (12134): Parameter &quot;READ_DURING_WRITE_MODE_MIXED_PORTS&quot; = &quot;OLD_DATA&quot;</li></ul></li><li class="info_message">Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o032.tdf<ul><li class="info_message">Info (12023): Found entity 1: altsyncram_o032</li></ul></li><li class="info_message">Info (12130): Elaborated megafunction instantiation &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock|altsyncram:\altera_device:ram_rtl_0&quot;</li><li class="info_message">Info (12133): Instantiated megafunction &quot;modulus_ram_asym:\asym_RAM:m_ram_asym|dpramblock_asym:\multiple_full_blocks:ramblocks_full:0:full_ones:ramblock_full|dpram_asym:\ramblocks:0:ramblock|altsyncram:\altera_device:ram_rtl_0&quot; with the following parameter:<ul><li class="info_message">Info (12134): Parameter &quot;OPERATION_MODE&quot; = &quot;DUAL_PORT&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTH_A&quot; = &quot;2&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTHAD_A&quot; = &quot;5&quot;</li><li class="info_message">Info (12134): Parameter &quot;NUMWORDS_A&quot; = &quot;32&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTH_B&quot; = &quot;32&quot;</li><li class="info_message">Info (12134): Parameter &quot;WIDTHAD_B&quot; = &quot;1&quot;</li><li class="info_message">Info (12134): Parameter &quot;NUMWORDS_B&quot; = &quot;2&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;OUTDATA_REG_B&quot; = &quot;UNREGISTERED&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_ACLR_B&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;OUTDATA_ACLR_B&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;ADDRESS_REG_B&quot; = &quot;CLOCK0&quot;</li><li class="info_message">Info (12134): Parameter &quot;INDATA_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;WRCONTROL_ACLR_A&quot; = &quot;NONE&quot;</li><li class="info_message">Info (12134): Parameter &quot;READ_DURING_WRITE_MODE_MIXED_PORTS&quot; = &quot;OLD_DATA&quot;</li></ul></li><li class="info_message">Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_usg1.tdf<ul><li class="info_message">Info (12023): Found entity 1: altsyncram_usg1</li></ul></li><li class="info_message">Info (16010): Generating hard_block partition &quot;hard_block:auto_generated_inst&quot;<ul><li class="info_message">Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL</li></ul></li><li class="info_message">Info (21057): Implemented 4956 device resources after synthesis - the final resource count might be different<ul><li class="info_message">Info (21058): Implemented 1585 input pins</li><li class="info_message">Info (21059): Implemented 3105 output pins</li><li class="info_message">Info (21061): Implemented 74 logic cells</li><li class="info_message">Info (21064): Implemented 192 RAM segments</li></ul></li><li class="info_message">Info: Quartus II 32-bit Analysis &amp; Synthesis was successful. 0 errors, 5 warnings<ul><li class="info_message">Info: Peak virtual memory: 441 megabytes</li><li class="info_message">Info: Processing ended: Wed Mar 06 16:03:55 2013</li><li class="info_message">Info: Elapsed time: 00:00:09</li><li class="info_message">Info: Total CPU time (on all processors): 00:00:09</li></ul></li></ul></div>
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