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[/] [modular_oscilloscope/] [trunk/] [hdl/] [epp/] [eppwbn_16bit_test_tbench_text.vhd] - Blame information for rev 19

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Line No. Rev Author Line
1 19 budinero
-------------------------------------------------------------------------------------------------100
2
--| Modular Oscilloscope
3
--| UNSL - Argentine
4
--|
5
--| File: eppwbn_16bit_test_tbench_text.vhd
6
--| Version: 0.01
7
--| Tested in: Actel APA300
8
--|-------------------------------------------------------------------------------------------------
9
--| Description:
10
--|   EPP - Wishbone bridge. 
11
--|   This file is only for test purposes. Testing eppwbn 16 bit. Test bench.
12
--|   It may not work for other than Actel Libero software.
13
--|-------------------------------------------------------------------------------------------------
14
--| File history:
15
--|   0.01  | mar-2009 | First release
16
----------------------------------------------------------------------------------------------------
17
--| Copyright ® 2009, Facundo Aguilera.
18
--|
19
--| This VHDL design file is an open design; you can redistribute it and/or
20
--| modify it and/or implement it after contacting the author.
21
----------------------------------------------------------------------------------------------------
22
 
23
 
24
-- NOTE:  It may not work for other than Actel Libero software.
25
--        You can download Libero for free from Actel website.
26
 
27
 
28
 
29
 
30
 
31
-- Generated by WaveFormer Lite Version 12.30a at 12:26:42 on 3/13/2009
32
-- Stimulator for stimulus
33
 
34
-- Generation Settings:
35
--   Export type: Stimulus only (reactive export not enabled)
36
--                Delays, Samples, Markers, etc will not generate code.
37
 
38
-- Clock Domains:
39
 
40
--   Unclocked
41
--   ---------
42
--     Signals:
43
--       rst
44
--       nSelectIn
45
--       Data
46
--       nAutoFd
47
--       nStrobe
48
--       nInit
49
 
50
library ieee, std;
51
use ieee.std_logic_1164.all;
52
library syncad_vhdl_lib;
53
use syncad_vhdl_lib.TBDefinitions.all;
54
-- Additional libraries used by Model Under Test.
55
library IEEE;
56
use work.eppwbn_pgk.all;
57
-- End Additional libraries used by Model Under Test.
58
 
59
entity stimulus is
60
  port (
61
    clk : inout std_logic := '0';
62
    rst : inout std_logic := '0';
63
    nSelectIn : inout std_logic := '0';
64
    Data : inout std_logic_vector(7 downto 0) := "00000000";
65
    nAutoFd : inout std_logic := '1';
66
    nStrobe : inout std_logic := '0';
67
    nInit : inout std_logic := '1');
68
 
69
end stimulus;
70
 
71
architecture STIMULATOR of stimulus is
72
 
73
  -- Control Signal Declarations
74
  signal tb_status : TStatus;
75
  signal tb_ParameterInitFlag : boolean := false;
76
 
77
  -- Parm Declarations
78
  signal clk_MinHL : time := 0 ns;
79
  signal clk_MaxHL : time := 0 ns;
80
  signal clk_MinLH : time := 0 ns;
81
  signal clk_MaxLH : time := 0 ns;
82
  signal clk_JFall : time := 0 ns;
83
  signal clk_JRise : time := 0 ns;
84
  signal clk_Duty : real := 0.0;
85
  signal clk_Period : time := 0 ns;
86
  signal clk_Offset : time := 0 ns;
87
 
88
  -- Status Control block.
89
 
90
begin
91
 
92
  process
93
    variable good : boolean;
94
  begin
95
    wait until tb_ParameterInitFlag;
96
    tb_status <= TB_ONCE;
97
    wait for 360000 ns;
98
    tb_status <= TB_DONE;
99
    wait;
100
  end process;
101
 
102
  -- Parm Assignment Block
103
  AssignParms : process
104
    variable clk_MinHL_real : real;
105
    variable clk_MaxHL_real : real;
106
    variable clk_MinLH_real : real;
107
    variable clk_MaxLH_real : real;
108
    variable clk_JFall_real : real;
109
    variable clk_JRise_real : real;
110
    variable clk_Duty_real : real;
111
    variable clk_Period_real : real;
112
    variable clk_Offset_real : real;
113
  begin
114
    clk_MinHL_real := 0.0;
115
    clk_MinHL <= clk_MinHL_real * 1 ns;
116
    clk_MaxHL_real := 0.0;
117
    clk_MaxHL <= clk_MaxHL_real * 1 ns;
118
    clk_MinLH_real := 0.0;
119
    clk_MinLH <= clk_MinLH_real * 1 ns;
120
    clk_MaxLH_real := 0.0;
121
    clk_MaxLH <= clk_MaxLH_real * 1 ns;
122
    clk_JFall_real := 0.0;
123
    clk_JFall <= clk_JFall_real * 1 ns;
124
    clk_JRise_real := 0.0;
125
    clk_JRise <= clk_JRise_real * 1 ns;
126
    clk_Duty_real := 50.0;
127
    clk_Duty <= clk_Duty_real;
128
    clk_Period_real := 100.0;
129
    clk_Period <= clk_Period_real * 1 ns;
130
    clk_Offset_real := 0.0;
131
    clk_Offset <= clk_Offset_real * 1 ns;
132
    tb_ParameterInitFlag <= true;
133
    wait;
134
  end process;
135
 
136
  -- Clocks
137
 
138
  -- Clock Instantiation
139
  tb_clk : entity syncad_vhdl_lib.tb_clock_minmax
140
    generic map (name => "tb_clk",
141
                initialize => true,
142
                state1 => '1',
143
                state2 => '0')
144
    port map (tb_status,
145
              clk,
146
              clk_MinLH,
147
              clk_MaxLH,
148
              clk_MinHL,
149
              clk_MaxHL,
150
              clk_Offset,
151
              clk_Period,
152
              clk_Duty,
153
              clk_JRise,
154
              clk_JFall);
155
 
156
  -- Clocked Sequences
157
 
158
  -- Sequence: Unclocked
159
  Unclocked : process
160
  begin
161
    -- Initial Reset
162
    wait for 700 ns;
163
    rst <= '1';
164
    wait for 800 ns;
165
    rst <= '0';
166
 
167
 
168
    -------------------- Test Negotiation
169
    -- Negotiation
170
    --  st0
171
    wait for 800 ns;
172
    Data <= x"40";
173
    nStrobe <= '1';
174
    --  st1
175
    wait for 800 ns;
176
    nSelectIn <= '1';
177
    nAutoFd <= '0';
178
    --  st3
179
    wait for 800 ns;
180
    nStrobe <= '0';
181
    --  st4
182
    wait for 800 ns;
183
    nAutoFd <= '1';
184
    nStrobe <= '1';
185
 
186
    -------------------- Test write add 0x10 data 0x1234
187
    -- Add WR
188
    wait for 800 ns;
189
    Data <= x"10";    -- DATA
190
    nSelectIn <= '0'; -- AddSTB
191
    nStrobe <= '0';   -- WR
192
    wait for 800 ns;
193
    nSelectIn <= '1';
194
    wait for 800 ns;
195
    nStrobe <= '1';
196
 
197
    -- Data WR
198
    wait for 800 ns;
199
    Data <= x"12";    -- DATA
200
    nAutoFd <= '0';   -- DataSTB
201
    nStrobe <= '0';   -- WR
202
    wait for 800 ns;
203
    nAutoFd <= '1';
204
    wait for 800 ns;
205
    nStrobe <= '1';
206
 
207
    -- Data WR
208
    wait for 800 ns;
209
    Data <= x"34";    -- DATA
210
    nAutoFd <= '0';   -- DataSTB
211
    nStrobe <= '0';   -- WR
212
    wait for 800 ns;
213
    nAutoFd <= '1';
214
    wait for 800 ns;
215
    nStrobe <= '1';
216
 
217
    -------------------- Test write add 0x55 data 0x4321
218
    -- Add WR
219
    wait for 800 ns;
220
    Data <= x"55";    -- DATA
221
    nSelectIn <= '0'; -- AddSTB
222
    nStrobe <= '0';   -- WR
223
    wait for 800 ns;
224
    nSelectIn <= '1';
225
    wait for 800 ns;
226
    nStrobe <= '1';
227
 
228
    -- Data WR
229
    wait for 800 ns;
230
    Data <= x"43";    -- DATA
231
    nAutoFd <= '0';   -- DataSTB
232
    nStrobe <= '0';   -- WR
233
    wait for 800 ns;
234
    nAutoFd <= '1';
235
    wait for 800 ns;
236
    nStrobe <= '1';
237
 
238
    -- Data WR
239
    wait for 400 ns;
240
    Data <= x"21";    -- DATA
241
    nAutoFd <= '0';   -- DataSTB
242
    nStrobe <= '0';   -- WR
243
    wait for 800 ns;
244
    nAutoFd <= '1';
245
    wait for 800 ns;
246
    nStrobe <= '1';
247
 
248
    -------------------- Test write add changed (fist 56 then 57) data 0x1122
249
    -- Add WR
250
    wait for 800 ns;
251
    Data <= x"56";    -- DATA
252
    nSelectIn <= '0'; -- AddSTB
253
    nStrobe <= '0';   -- WR
254
    wait for 800 ns;
255
    nSelectIn <= '1';
256
    wait for 800 ns;
257
    nStrobe <= '1';
258
 
259
    -- Data WR
260
    wait for 800 ns;
261
    Data <= x"33";    -- DATA
262
    nAutoFd <= '0';   -- DataSTB
263
    nStrobe <= '0';   -- WR
264
    wait for 800 ns;
265
    nAutoFd <= '1';
266
    wait for 800 ns;
267
    nStrobe <= '1';
268
 
269
    -- Add WR
270
    wait for 800 ns;
271
    Data <= x"57";
272
    nSelectIn <= '0';
273
    nStrobe <= '0';
274
    wait for 800 ns;
275
    nSelectIn <= '1';
276
    wait for 800 ns;
277
    nStrobe <= '1';
278
 
279
    -- Data WR
280
    wait for 800 ns;
281
    Data <= x"11";    -- DATA
282
    nAutoFd <= '0';   -- DataSTB
283
    nStrobe <= '0';   -- WR
284
    wait for 800 ns;
285
    nAutoFd <= '1';
286
    wait for 800 ns;
287
    nStrobe <= '1';
288
 
289
    -- Data WR
290
    wait for 800 ns;
291
    Data <= x"22";    -- DATA
292
    nAutoFd <= '0';   -- DataSTB
293
    nStrobe <= '0';   -- WR
294
    wait for 800 ns;
295
    nAutoFd <= '1';
296
    wait for 800 ns;
297
    nStrobe <= '1';
298
 
299
    -------------------- Test write add 0x58 data 0x99 with timeout
300
    wait for 800 ns;
301
    Data <= x"58";    -- DATA
302
    nSelectIn <= '0'; -- AddSTB
303
    nStrobe <= '0';   -- WR
304
    wait for 800 ns;
305
    nSelectIn <= '1';
306
    wait for 800 ns;
307
    nStrobe <= '1';
308
 
309
    -- Data WR
310
    wait for 800 ns;
311
    Data <= x"99";    -- DATA
312
    nAutoFd <= '0';   -- DataSTB
313
    nStrobe <= '0';   -- WR
314
    wait for 800 ns;
315
    nAutoFd <= '1';
316
    wait for 800 ns;
317
    nStrobe <= '1';
318
 
319
    wait for 120000 ns;
320
 
321
   -------------------- Test write add 0x59 data 0x5678
322
    -- Add WR
323
    wait for 800 ns;
324
    Data <= x"59";    -- DATA
325
    nSelectIn <= '0'; -- AddSTB
326
    nStrobe <= '0';   -- WR
327
    wait for 800 ns;
328
    nSelectIn <= '1';
329
    wait for 800 ns;
330
    nStrobe <= '1';
331
 
332
    -- Data WR
333
    wait for 800 ns;
334
    Data <= x"56";    -- DATA
335
    nAutoFd <= '0';   -- DataSTB
336
    nStrobe <= '0';   -- WR
337
    wait for 800 ns;
338
    nAutoFd <= '1';
339
    wait for 800 ns;
340
    nStrobe <= '1';
341
 
342
    -- Data WR
343
    wait for 800 ns;
344
    Data <= x"78";    -- DATA
345
    nAutoFd <= '0';   -- DataSTB
346
    nStrobe <= '0';   -- WR
347
    wait for 800 ns;
348
    nAutoFd <= '1';
349
    wait for 800 ns;
350
    nStrobe <= '1';
351
 
352
    -------------------- Test add read (it must be 0x59)
353
    -- Adr RE
354
    wait for 800 ns;
355
    Data <= "ZZZZZZZZ";   -- DATA ('Z...')
356
    wait for 800 ns;
357
    nSelectIn <= '0';       -- DataSTB
358
    wait for 800 ns;
359
    nSelectIn <= '1';
360
 
361
 
362
    -------------------- Test data read add 0x10 (it must be 0x1234)
363
    -- Add WR
364
    wait for 800 ns;
365
    Data <= x"10";    -- DATA
366
    nSelectIn <= '0'; -- AddSTB
367
    nStrobe <= '0';   -- WR
368
    wait for 800 ns;
369
    nSelectIn <= '1';
370
    wait for 800 ns;
371
    nStrobe <= '1';
372
 
373
    -- Data RE
374
    wait for 400 ns;
375
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
376
    nAutoFd <= '0';    -- DataSTB
377
    wait for 200 ns;
378
    nAutoFd <= '1';
379
 
380
    -- Data RE
381
    wait for 200 ns;
382
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
383
    nAutoFd <= '0';    -- DataSTB
384
    wait for 400 ns;
385
    nAutoFd <= '1';
386
 
387
    -------------------- Test data read add 0x55 (it must be 0x4321)
388
    -- Add WR
389
    wait for 800 ns;
390
    Data <= x"55";    -- DATA
391
    nSelectIn <= '0'; -- AddSTB
392
    nStrobe <= '0';   -- WR
393
    wait for 800 ns;
394
    nSelectIn <= '1';
395
    wait for 800 ns;
396
    nStrobe <= '1';
397
 
398
    -- Data RE
399
    wait for 400 ns;
400
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
401
    wait for 800 ns;
402
    nAutoFd <= '0';    -- DataSTB
403
    wait for 800 ns;
404
    nAutoFd <= '1';
405
 
406
    -- Data RE
407
    wait for 400 ns;
408
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
409
    wait for 800 ns;
410
    nAutoFd <= '0';    -- DataSTB
411
    wait for 800 ns;
412
    nAutoFd <= '1';
413
 
414
 
415
    -------------------- Test data read add 0x56 (it must be 0x0000)
416
    -- Add WR
417
    wait for 800 ns;
418
    Data <= x"56";    -- DATA
419
    nSelectIn <= '0'; -- AddSTB
420
    nStrobe <= '0';   -- WR
421
    wait for 800 ns;
422
    nSelectIn <= '1';
423
    wait for 800 ns;
424
    nStrobe <= '1';
425
 
426
    -- Data RE
427
    wait for 400 ns;
428
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
429
    wait for 800 ns;
430
    nAutoFd <= '0';    -- DataSTB
431
    wait for 800 ns;
432
    nAutoFd <= '1';
433
 
434
    -- Data RE
435
    wait for 400 ns;
436
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
437
    wait for 800 ns;
438
    nAutoFd <= '0';    -- DataSTB
439
    wait for 800 ns;
440
    nAutoFd <= '1';
441
 
442
    -------------------- Test data read add 0x57 (it must be 0x1122)
443
    -- Add WR
444
    wait for 800 ns;
445
    Data <= x"57";    -- DATA
446
    nSelectIn <= '0'; -- AddSTB
447
    nStrobe <= '0';   -- WR
448
    wait for 800 ns;
449
    nSelectIn <= '1';
450
    wait for 800 ns;
451
    nStrobe <= '1';
452
 
453
    -- Data RE
454
    wait for 400 ns;
455
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
456
    wait for 800 ns;
457
    nAutoFd <= '0';    -- DataSTB
458
    wait for 800 ns;
459
    nAutoFd <= '1';
460
 
461
    -- Data RE
462
    wait for 400 ns;
463
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
464
    wait for 800 ns;
465
    nAutoFd <= '0';    -- DataSTB
466
    wait for 800 ns;
467
    nAutoFd <= '1';
468
 
469
    -------------------- Test data read add 0x57 (it must be 0x1122)
470
    -- Add WR
471
    wait for 800 ns;
472
    Data <= x"57";    -- DATA
473
    nSelectIn <= '0'; -- AddSTB
474
    nStrobe <= '0';   -- WR
475
    wait for 800 ns;
476
    nSelectIn <= '1';
477
    wait for 800 ns;
478
    nStrobe <= '1';
479
 
480
    -- Data RE
481
    wait for 400 ns;
482
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
483
    wait for 800 ns;
484
    nAutoFd <= '0';    -- DataSTB
485
    wait for 800 ns;
486
    nAutoFd <= '1';
487
 
488
    -- Data RE
489
    wait for 400 ns;
490
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
491
    wait for 800 ns;
492
    nAutoFd <= '0';    -- DataSTB
493
    wait for 800 ns;
494
    nAutoFd <= '1';
495
 
496
    -------------------- Test data read add 0x58 (it must be 0x0000)
497
    -- Add WR
498
    wait for 800 ns;
499
    Data <= x"58";    -- DATA
500
    nSelectIn <= '0'; -- AddSTB
501
    nStrobe <= '0';   -- WR
502
    wait for 800 ns;
503
    nSelectIn <= '1';
504
    wait for 800 ns;
505
    nStrobe <= '1';
506
 
507
    -- Data RE
508
    wait for 400 ns;
509
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
510
    wait for 800 ns;
511
    nAutoFd <= '0';    -- DataSTB
512
    wait for 800 ns;
513
    nAutoFd <= '1';
514
 
515
    -- Data RE
516
    wait for 400 ns;
517
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
518
    wait for 800 ns;
519
    nAutoFd <= '0';    -- DataSTB
520
    wait for 800 ns;
521
    nAutoFd <= '1';
522
 
523
    -------------------- Test data read add 0x59 (it must be 0x5678)
524
    -- Add WR
525
    wait for 800 ns;
526
    Data <= x"59";    -- DATA
527
    nSelectIn <= '0'; -- AddSTB
528
    nStrobe <= '0';   -- WR
529
    wait for 800 ns;
530
    nSelectIn <= '1';
531
    wait for 800 ns;
532
    nStrobe <= '1';
533
 
534
    -- Data RE
535
    wait for 400 ns;
536
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
537
    wait for 800 ns;
538
    nAutoFd <= '0';    -- DataSTB
539
    wait for 800 ns;
540
    nAutoFd <= '1';
541
 
542
    -- Data RE
543
    wait for 400 ns;
544
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
545
    wait for 800 ns;
546
    nAutoFd <= '0';    -- DataSTB
547
    wait for 800 ns;
548
    nAutoFd <= '1';
549
 
550
    -------------------- Test data read add 0x55 then 0x10 (it must be 0x1234)
551
    -- Add WR
552
    wait for 800 ns;
553
    Data <= x"55";    -- DATA
554
    nSelectIn <= '0'; -- AddSTB
555
    nStrobe <= '0';   -- WR
556
    wait for 800 ns;
557
    nSelectIn <= '1';
558
    wait for 800 ns;
559
    nStrobe <= '1';
560
 
561
    -- Data RE
562
    wait for 400 ns;
563
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
564
    wait for 800 ns;
565
    nAutoFd <= '0';    -- DataSTB
566
    wait for 800 ns;
567
    nAutoFd <= '1';
568
 
569
    -- Add WR
570
    wait for 800 ns;
571
    Data <= x"10";    -- DATA
572
    nSelectIn <= '0'; -- AddSTB
573
    nStrobe <= '0';   -- WR
574
    wait for 800 ns;
575
    nSelectIn <= '1';
576
    wait for 800 ns;
577
    nStrobe <= '1';
578
 
579
    -- Data RE
580
    wait for 400 ns;
581
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
582
    wait for 800 ns;
583
    nAutoFd <= '0';    -- DataSTB
584
    wait for 1600 ns;
585
    nAutoFd <= '1';
586
 
587
    -- Data RE
588
    wait for 400 ns;
589
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
590
    wait for 800 ns;
591
    nAutoFd <= '0';    -- DataSTB
592
    wait for 800 ns;
593
    nAutoFd <= '1';
594
 
595
    -------------------- Test data read add 0x55 with timeout then 0x59 (it must be 0x5678)
596
    -- Add WR
597
    wait for 800 ns;
598
    Data <= x"55";    -- DATA
599
    nSelectIn <= '0'; -- AddSTB
600
    nStrobe <= '0';   -- WR
601
    wait for 800 ns;
602
    nSelectIn <= '1';
603
    wait for 800 ns;
604
    nStrobe <= '1';
605
 
606
    -- Data RE
607
    wait for 400 ns;
608
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
609
    wait for 800 ns;
610
    nAutoFd <= '0';    -- DataSTB
611
    wait for 800 ns;
612
    nAutoFd <= '1';
613
 
614
    wait for 120000 ns;
615
 
616
    -- Add WR
617
    wait for 800 ns;
618
    Data <= x"59";    -- DATA
619
    nSelectIn <= '0'; -- AddSTB
620
    nStrobe <= '0';   -- WR
621
    wait for 800 ns;
622
    nSelectIn <= '1';
623
    wait for 800 ns;
624
    nStrobe <= '1';
625
 
626
    -- Data RE
627
    wait for 400 ns;
628
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
629
    wait for 800 ns;
630
    nAutoFd <= '0';    -- DataSTB
631
    wait for 800 ns;
632
    nAutoFd <= '1';
633
 
634
    -- Data RE
635
    wait for 400 ns;
636
    Data <= "ZZZZZZZZ";-- DATA ('Z...')
637
    wait for 800 ns;
638
    nAutoFd <= '0';    -- DataSTB
639
    wait for 800 ns;
640
    nAutoFd <= '1';
641
 
642
 
643
    wait;
644
  end process;
645
end STIMULATOR;
646
 
647
-- Test Bench wrapper for stimulus and Model Under Test
648
library ieee, std;
649
use ieee.std_logic_1164.all;
650
library syncad_vhdl_lib;
651
use syncad_vhdl_lib.TBDefinitions.all;
652
-- Additional libraries used by Model Under Test.
653
library IEEE;
654
use work.eppwbn_pgk.all;
655
-- End Additional libraries used by Model Under Test.
656
 
657
entity testbench is
658
end testbench;
659
architecture tbGeneratedCode of testbench is
660
  signal clk : std_logic;
661
  signal rst : std_logic;
662
  signal nSelectIn : std_logic;
663
  signal Data : std_logic_vector(7 downto 0);
664
  signal nAutoFd : std_logic;
665
  signal nStrobe : std_logic;
666
  signal nInit : std_logic;
667
  signal nAck : std_logic;
668
  signal busy : std_logic;
669
  signal PError : std_logic;
670
  signal Sel : std_logic;
671
  signal PeriphLogicH : std_logic;
672
  signal nFault : std_logic;
673
 
674
  -- Stimulator instance
675
 
676
begin
677
 
678
  stimulus_0 : entity work.stimulus
679
    port map (clk => clk,
680
              rst => rst,
681
              nSelectIn => nSelectIn,
682
              Data => Data,
683
              nAutoFd => nAutoFd,
684
              nStrobe => nStrobe,
685
              nInit => nInit);
686
 
687
  -- Instantiation of Model Under Test.
688
  eppwbn_16bit_test_0 : entity work.eppwbn_16bit_test
689
    port map (nStrobe => nStrobe,
690
              Data => Data,
691
              nAck => nAck,
692
              busy => busy,
693
              PError => PError,
694
              Sel => Sel,
695
              nAutoFd => nAutoFd,
696
              PeriphLogicH => PeriphLogicH,
697
              nInit => nInit,
698
              nFault => nFault,
699
              nSelectIn => nSelectIn,
700
              rst => rst,
701
              clk => clk);
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end tbGeneratedCode;

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