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eejlny |
----------------------------------------------------------------------------
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-- This file is a part of the LM VHDL IP LIBRARY
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-- Copyright (C) 2009 Jose Nunez-Yanez
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- See the file COPYING for the full details of the license.
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--
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-- The license allows free and unlimited use of the library and tools for research and education purposes.
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-- The full LM core supports many more advanced motion estimation features and it is available under a
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-- low-cost commercial license. See the readme file to learn more or contact us at
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-- eejlny@byacom.co.uk or www.byacom.co.uk
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-----------------------------------------------------------------------------
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-- File: me_engine.vhd
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-- Author: Jose Luis Nunez-Yanez
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-- Description: me entities
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package me_engine is
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component me_top
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port ( clk : in std_logic;
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clear : in std_logic;
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reset : in std_logic;
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register_file_address : in std_logic_vector(4 downto 0); -- 32 general purpose registers
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register_file_write : in std_logic;
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register_file_data_in : in std_logic_vector(31 downto 0);
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register_file_data_out : out std_logic_vector(31 downto 0);
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done_interrupt : out std_logic; -- high when macroblock processing has completed
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best_sad_debug : out std_logic_vector(15 downto 0); --debugging ports
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best_mv_debug : out std_logic_vector(15 downto 0);
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best_eu_debug : out std_logic_vector(3 downto 0);
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partition_mode_debug : out std_logic_vector(3 downto 0);
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qp_on_debug : out std_logic; --running qp
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dma_rm_re_debug : in std_logic; --set to one to enable reading the reference area
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dma_rm_debug : out std_logic_vector(63 downto 0); -- reference area data out
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dma_address : in std_logic_vector(10 downto 0); -- next reference memory address
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dma_data_in : in std_logic_vector(63 downto 0); -- pixel in for reference memory or macroblock memory
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dma_rm_we : in std_logic; --enable writing to reference memory
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dma_cm_we : in std_logic; --enable writing to current macroblock memory
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dma_pom_we : in std_logic; -- enable writing to point memory
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dma_prm_we : in std_logic; -- enable writing to program memory
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dma_residue_out : out std_logic_vector(63 downto 0); -- get residue from winner mv
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dma_re_re : in std_logic -- enable reading residue
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);
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end component;
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end;
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