OpenCores
URL https://opencores.org/ocsvn/mpmc8/mpmc8/trunk

Subversion Repositories mpmc8

[/] [mpmc8/] [trunk/] [rtl/] [mpmc10/] [mpmc10_pkg.sv] - Blame information for rev 9

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 robfinch
// ============================================================================
2
//        __
3
//   \\__/ o\    (C) 2022  Robert Finch, Waterloo
4
//    \  __ /    All rights reserved.
5
//     \/_//     robfinch@finitron.ca
6
//       ||
7
//
8
// BSD 3-Clause License
9
// Redistribution and use in source and binary forms, with or without
10
// modification, are permitted provided that the following conditions are met:
11
//
12
// 1. Redistributions of source code must retain the above copyright notice, this
13
//    list of conditions and the following disclaimer.
14
//
15
// 2. Redistributions in binary form must reproduce the above copyright notice,
16
//    this list of conditions and the following disclaimer in the documentation
17
//    and/or other materials provided with the distribution.
18
//
19
// 3. Neither the name of the copyright holder nor the names of its
20
//    contributors may be used to endorse or promote products derived from
21
//    this software without specific prior written permission.
22
//
23
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
//
34
// ============================================================================
35
//
36
package mpmc10_pkg;
37
 
38
parameter CACHE_ASSOC = 4;
39
 
40
parameter RMW = 0;
41
parameter NAR = 2;
42
parameter AMSB = 28;
43
parameter TRUE = 1'b1;
44
parameter FALSE = 1'b0;
45
parameter CMD_READ = 3'b001;
46
parameter CMD_WRITE = 3'b000;
47 9 robfinch
 
48 5 robfinch
// State machine states
49 9 robfinch
typedef enum logic [3:0] {
50
        IDLE = 4'd0,
51
        PRESET1 = 4'd1,
52
        PRESET2 = 4'd2,
53
        WRITE_DATA0 = 4'd3,
54
        WRITE_DATA1 = 4'd4,
55
        WRITE_DATA2 = 4'd5,
56
        WRITE_DATA3 = 4'd6,
57
        READ_DATA = 4'd7,
58
        READ_DATA0 = 4'd8,
59
        READ_DATA1 = 4'd9,
60
        READ_DATA2 = 4'd10,
61
        WAIT_NACK = 4'd11,
62
        WRITE_TRAMP = 4'd12,    // write trampoline
63
        WRITE_TRAMP1 = 4'd13,
64
        PRESET3 = 4'd14
65
} mpmc10_state_t;
66 5 robfinch
 
67
typedef struct packed
68
{
69 9 robfinch
        logic [31:4] tag;
70 5 robfinch
        logic modified;
71
        logic [127:0] data;
72
} mpmc10_cache_line_t;
73
 
74
typedef struct packed
75
{
76
        mpmc10_cache_line_t [CACHE_ASSOC-1:0] lines;
77
} mpmc10_quad_cache_line_t;
78
 
79
endpackage

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.