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[/] [mytwoqcache/] [trunk/] [2QCache.vhd] - Blame information for rev 9

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Line No. Rev Author Line
1 9 gerhardhoh
INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/Cache.vhd" into library work
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INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" into library work
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ERROR:HDLCompiler:806 - "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" Line 40: Syntax error near "Address".
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ERROR:HDLCompiler:806 - "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" Line 69: Syntax error near "Address".
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ERROR:ProjectMgmt - 2 error(s) found while parsing design hierarchy.
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INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/Cache.vhd" into library work
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INFO:ProjectMgmt - Parsing design hierarchy completed successfully.

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