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[/] [natalius_8bit_risc/] [trunk/] [assembler/] [example.asm] - Blame information for rev 10

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                csr negro
end             jmp     end
 
negro   stm r0,32
                ldi r1,80
                ldi r2,60
                ldi r3,0
                ldi r4,0
nextc   cmp r4,r1
                jpz inc_fil
                stm r3,64
                stm r4,32
                adi r4,1
                jmp nextc
inc_fil ldi r4,0
                cmp r3,r2
                jpz fneg
                adi r3,1
                jmp nextc
fneg    ret
 
 

Line No.	Rev	Author	Line
1	2	fabioandre	`csr negro`
2			`end jmp end`
3
4			`negro stm r0,32`
5			`ldi r1,80`
6			`ldi r2,60`
7			`ldi r3,0`
8			`ldi r4,0`
9			`nextc cmp r4,r1`
10			`jpz inc_fil`
11			`stm r3,64`
12			`stm r4,32`
13			`adi r4,1`
14			`jmp nextc`
15			`inc_fil ldi r4,0`
16			`cmp r3,r2`
17			`jpz fneg`
18			`adi r3,1`
19			`jmp nextc`
20			`fneg ret`
21
22

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[/] [natalius_8bit_risc/] [trunk/] [assembler/] [example.asm] - Blame information for rev 10