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[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_imem.adoc] - Blame information for rev 60
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zero_gravi |
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==== Instruction Memory (IMEM)
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[cols="<3,<3,<4"]
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[frame="topbot",grid="none"]
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|=======================
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| Hardware source file(s): | neorv32_imem.vhd |
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| Software driver file(s): | none | _implicitly used_
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| Top entity port: | none |
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| Configuration generics: | _MEM_INT_IMEM_EN_ | implement processor-internal IMEM when _true_
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| | _MEM_INT_IMEM_SIZE_ | IMEM size in bytes
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| | _MEM_INT_IMEM_ROM_ | implement IMEM as ROM when _true_
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| CPU interrupts: | none |
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|=======================
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Implementation of the processor-internal instruction memory is enabled via the processor's
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_MEM_INT_IMEM_EN_ generic. The size in bytes is defined via the _MEM_INT_IMEM_SIZE_ generic. If the
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IMEM is implemented, the memory is mapped into the instruction memory space and located right at the
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beginning of the instruction memory space (default `ispace_base_c` = 0x00000000).
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By default, the IMEM is implemented as RAM, so the content can be modified during run time. This is
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required when using a bootloader that can update the content of the IMEM at any time. If you do not need
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the bootloader anymore – since your application development has completed and you want the program to
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permanently reside in the internal instruction memory – the IMEM can also be implemented as true _read-only_
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memory. In this case set the _MEM_INT_IMEM_ROM_ generic of the processor's top entity to _true_.
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When the IMEM is implemented as ROM, it will be initialized during synthesis with the actual application
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program image. The compiler toolchain will generate a VHDL initialization
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file `rtl/core/neorv32_application_image.vhd`, which is automatically inserted into the IMEM. If
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the IMEM is implemented as RAM (default), the memory will **not be initialized** at all.
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