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== General Software Framework Setup
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To allow executables to be _actually executed_ on the NEORV32 Processor the configuration of the software framework
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has to be aware to the hardware configuration. This guide focuses on the memory configuration. To enabled
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certain CPU ISA features refer to the <<_enabling_risc_v_cpu_extensions>> section.
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[TIP]
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If you have **not** changed the _default_ memory configuration in section <<_general_hardware_setup>>
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you are already done and you can skip the rest of this guide.
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[start=1]
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. Open the NEORV32 linker script `sw/common/neorv32.ld` with a text editor. Right at the
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beginning of this script you will find the `MEMORY` configuration listing the different memory section:
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.Cut-out of the linker script `neorv32.ld`: `ram` memory section configuration
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[source,c]
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----
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MEMORY
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{
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  ram  (rwx) : ORIGIN = 0x80000000, LENGTH = DEFINED(make_bootloader) ? 512 : 8*1024 <1>
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...
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----
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<1> Size of the data memory address space (right-most value) (internal/external DMEM); here 8kB
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[start=2]
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. We only need to change the `ram` section, which presents the available data address space.
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If you have changed the DMEM (_MEM_INT_DMEM_SIZE_ generic) size adapt the `LENGTH` parameter of the `ram`
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section (here: `8*1024`) so it is equal to your DMEM hardware configuration.
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[IMPORTANT]
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Make sure you only modify the _right-most_ value (here: 8*1024)! +
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The "`512`" are not relevant for the application.
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[start=3]
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. Done! Save your changes and close the linker script.
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.Advanced: Section base address and size
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[IMPORTANT]
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More information can be found in the datasheet section https://stnolting.github.io/neorv32/#_address_space[Address Space].

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