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[/] [neorv32/] [trunk/] [rtl/] [README.md] - Blame information for rev 57

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## VHDL Source Folders
 
### [`core`](https://github.com/stnolting/neorv32/tree/master/rtl/core)
 
This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor. When creating a new synthesis/simulation project make
sure that all `*.vhd` files from this folder are added to a *new design library* called `neorv32`.
 
### [`top_templates`](https://github.com/stnolting/neorv32/tree/master/rtl/top_templates)
 
Alternative top entities for the NEORV32 Processor. Actually, these *alternative* top entities are wrappers, which instantiate the *real* top entity of
processor/CPU and provide a different interface.

Line No.	Rev	Author	Line
1	57	zero_gravi	`## VHDL Source Folders`
2	22	zero_gravi
3	35	zero_gravi	### [`core`](https://github.com/stnolting/neorv32/tree/master/rtl/core)
4	22	zero_gravi
5	57	zero_gravi	`This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor. When creating a new synthesis/simulation project make`
6			sure that all `.vhd` files from this folder are added to a new design library* called `neorv32`.
7	22	zero_gravi
8	35	zero_gravi	### [`top_templates`](https://github.com/stnolting/neorv32/tree/master/rtl/top_templates)
9	22	zero_gravi
10	57	zero_gravi	`Alternative top entities for the NEORV32 Processor. Actually, these alternative top entities are wrappers, which instantiate the real top entity of`
11	22	zero_gravi	`processor/CPU and provide a different interface.`

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[/] [neorv32/] [trunk/] [rtl/] [README.md] - Blame information for rev 57