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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_boot_rom.vhd] - Blame information for rev 72

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-- #################################################################################################
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-- # << NEORV32 - Processor-internal bootloader ROM (BOOTROM) >>                                   #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License                                                                          #
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-- #                                                                                               #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved.                                     #
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-- #                                                                                               #
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-- # Redistribution and use in source and binary forms, with or without modification, are          #
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-- # permitted provided that the following conditions are met:                                     #
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-- #                                                                                               #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of        #
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-- #    conditions and the following disclaimer.                                                   #
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-- #                                                                                               #
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-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
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-- #    conditions and the following disclaimer in the documentation and/or other materials        #
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-- #    provided with the distribution.                                                            #
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-- #                                                                                               #
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-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
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-- #    endorse or promote products derived from this software without specific prior written      #
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-- #    permission.                                                                                #
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-- #                                                                                               #
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-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
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-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
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-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
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-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
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-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
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-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
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-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
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-- # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
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-- # ********************************************************************************************* #
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-- # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
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-- #################################################################################################
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library neorv32;
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use neorv32.neorv32_package.all;
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use neorv32.neorv32_bootloader_image.all; -- this file is generated by the image generator
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entity neorv32_boot_rom is
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  generic (
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    BOOTROM_BASE : std_ulogic_vector(31 downto 0) -- boot ROM base address
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  );
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  port (
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    clk_i  : in  std_ulogic; -- global clock line
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    rden_i : in  std_ulogic; -- read enable
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    wren_i : in  std_ulogic; -- write enable
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    addr_i : in  std_ulogic_vector(31 downto 0); -- address
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    data_o : out std_ulogic_vector(31 downto 0); -- data out
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    ack_o  : out std_ulogic; -- transfer acknowledge
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    err_o  : out std_ulogic  -- transfer error
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  );
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end neorv32_boot_rom;
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architecture neorv32_boot_rom_rtl of neorv32_boot_rom is
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  -- determine required ROM size in bytes (expand to next power of two) --
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  constant boot_rom_size_index_c : natural := index_size_f((bootloader_init_image'length)); -- address with (32-bit entries)
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  constant boot_rom_size_c       : natural := (2**boot_rom_size_index_c)*4; -- size in bytes
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  -- IO space: module base address --
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  constant hi_abb_c : natural := 31; -- high address boundary bit
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  constant lo_abb_c : natural := index_size_f(boot_rom_max_size_c); -- low address boundary bit
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  -- local signals --
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  signal acc_en : std_ulogic;
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  signal rden   : std_ulogic;
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  signal rdata  : std_ulogic_vector(31 downto 0);
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  signal addr   : std_ulogic_vector(boot_rom_size_index_c-1 downto 0);
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  -- ROM - initialized with executable code --
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  constant mem_rom : mem32_t(0 to boot_rom_size_c/4-1) := mem32_init_f(bootloader_init_image, boot_rom_size_c/4);
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begin
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  -- Sanity Checks --------------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  assert false report "NEORV32 PROCESSOR CONFIG NOTE: Implementing internal bootloader ROM (" & natural'image(boot_rom_size_c) & " bytes)." severity note;
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  assert not (boot_rom_size_c > boot_rom_max_size_c) report "NEORV32 PROCESSOR CONFIG ERROR! Boot ROM size out of range! Max "& natural'image(boot_rom_max_size_c) & " bytes." severity error;
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  -- Access Control -------------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  acc_en <= '1' when (addr_i(hi_abb_c downto lo_abb_c) = BOOTROM_BASE(hi_abb_c downto lo_abb_c)) else '0';
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  addr   <= addr_i(boot_rom_size_index_c+1 downto 2); -- word aligned
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  -- Memory Access --------------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  mem_file_access: process(clk_i)
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  begin
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    if rising_edge(clk_i) then
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      rden  <= acc_en and rden_i;
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      err_o <= acc_en and wren_i;
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      if (acc_en = '1') then -- reduce switching activity when not accessed
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        rdata <= mem_rom(to_integer(unsigned(addr)));
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      end if;
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    end if;
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  end process mem_file_access;
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  -- output gate --
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  data_o <= rdata when (rden = '1') else (others => '0');
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  ack_o  <= rden;
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end neorv32_boot_rom_rtl;

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