OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_bus_keeper.vhd] - Blame information for rev 57

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 57 zero_gravi
-- #################################################################################################
2
-- # << NEORV32 - Bus Keeper (BUSKEEPER) >>                                                        #
3
-- # ********************************************************************************************* #
4
-- # This unit monitors the processor-internal bus. If the accesses INTERNAL (IMEM if enabled,     #
5
-- # DMEM if enabled, BOOTROM + IO region) module does not respond within the defined number of    #
6
-- # cycles (VHDL package: max_proc_int_response_time_c) it asserts the error signal to inform the #
7
-- # CPU / bus driver. This timeout does not track accesses via the processor-external bus         #
8
-- # interface!                                                                                    #
9
-- # ********************************************************************************************* #
10
-- # BSD 3-Clause License                                                                          #
11
-- #                                                                                               #
12
-- # Copyright (c) 2021, Stephan Nolting. All rights reserved.                                     #
13
-- #                                                                                               #
14
-- # Redistribution and use in source and binary forms, with or without modification, are          #
15
-- # permitted provided that the following conditions are met:                                     #
16
-- #                                                                                               #
17
-- # 1. Redistributions of source code must retain the above copyright notice, this list of        #
18
-- #    conditions and the following disclaimer.                                                   #
19
-- #                                                                                               #
20
-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
21
-- #    conditions and the following disclaimer in the documentation and/or other materials        #
22
-- #    provided with the distribution.                                                            #
23
-- #                                                                                               #
24
-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
25
-- #    endorse or promote products derived from this software without specific prior written      #
26
-- #    permission.                                                                                #
27
-- #                                                                                               #
28
-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
29
-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
30
-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
31
-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
32
-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
33
-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
34
-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
35
-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
36
-- # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
37
-- # ********************************************************************************************* #
38
-- # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
39
-- #################################################################################################
40
 
41
library ieee;
42
use ieee.std_logic_1164.all;
43
use ieee.numeric_std.all;
44
 
45
library neorv32;
46
use neorv32.neorv32_package.all;
47
 
48
entity neorv32_bus_keeper is
49
  generic (
50
    -- Internal instruction memory --
51
    MEM_INT_IMEM_EN   : boolean := true;   -- implement processor-internal instruction memory
52
    MEM_INT_IMEM_SIZE : natural := 8*1024; -- size of processor-internal instruction memory in bytes
53
    -- Internal data memory --
54
    MEM_INT_DMEM_EN   : boolean := true;   -- implement processor-internal data memory
55
    MEM_INT_DMEM_SIZE : natural := 8*1024  -- size of processor-internal data memory in bytes
56
  );
57
  port (
58
    -- host access --
59
    clk_i  : in  std_ulogic; -- global clock line
60
    rstn_i : in  std_ulogic; -- global reset line, low-active
61
    addr_i : in  std_ulogic_vector(31 downto 0); -- address
62
    rden_i : in  std_ulogic; -- read enable
63
    wren_i : in  std_ulogic; -- write enable
64
    ack_i  : in  std_ulogic; -- transfer acknowledge from bus system
65
    err_i  : in  std_ulogic; -- transfer error from bus system
66
    err_o  : out std_ulogic  -- bus error
67
  );
68
end neorv32_bus_keeper;
69
 
70
architecture neorv32_bus_keeper_rtl of neorv32_bus_keeper is
71
 
72
  -- access check --
73
  type access_check_t is record
74
    int_imem       : std_ulogic;
75
    int_dmem       : std_ulogic;
76
    int_bootrom_io : std_ulogic;
77
    valid          : std_ulogic;
78
  end record;
79
  signal access_check : access_check_t;
80
 
81
  -- controller --
82
  type control_t is record
83
    pending : std_ulogic;
84
    timeout : std_ulogic_vector(index_size_f(max_proc_int_response_time_c)-1 downto 0);
85
    bus_err : std_ulogic;
86
  end record;
87
  signal control : control_t;
88
 
89
begin
90
 
91
  -- Sanity Check --------------------------------------------------------------------------
92
  -- -------------------------------------------------------------------------------------------
93
  assert not (max_proc_int_response_time_c < 2) report "NEORV32 PROCESSOR CONFIG ERROR! Processor-internal bus timeout <max_proc_int_response_time_c> has to >= 2." severity error;
94
 
95
 
96
  -- Access Control -------------------------------------------------------------------------
97
  -- -------------------------------------------------------------------------------------------
98
  -- access to processor-internal IMEM or DMEM? --
99
  access_check.int_imem <= '1' when (addr_i(31 downto index_size_f(MEM_INT_IMEM_SIZE)) = imem_base_c(31 downto index_size_f(MEM_INT_IMEM_SIZE))) and (MEM_INT_IMEM_EN = true) else '0';
100
  access_check.int_dmem <= '1' when (addr_i(31 downto index_size_f(MEM_INT_DMEM_SIZE)) = dmem_base_c(31 downto index_size_f(MEM_INT_DMEM_SIZE))) and (MEM_INT_DMEM_EN = true) else '0';
101
  -- access to processor-internal BOOTROM or IO devices? --
102
  access_check.int_bootrom_io <= '1' when (addr_i(31 downto 16) = boot_rom_base_c(31 downto 16)) else '0'; -- hacky!
103
  -- actual internal bus access? --
104
  access_check.valid <= access_check.int_imem or access_check.int_dmem or access_check.int_bootrom_io;
105
 
106
 
107
  -- Keeper ---------------------------------------------------------------------------------
108
  -- -------------------------------------------------------------------------------------------
109
  keeper_control: process(rstn_i, clk_i)
110
  begin
111
    if (rstn_i = '0') then
112
      control.pending <= '0';
113
      control.bus_err <= '0';
114
      control.timeout <= (others => def_rst_val_c);
115
    elsif rising_edge(clk_i) then
116
 
117
      -- pending access? --
118
      control.bus_err <= '0';
119
      if (control.pending = '0') then -- idle
120
        if ((rden_i or wren_i) = '1') and (access_check.valid = '1') then
121
          control.pending <= '1';
122
        end if;
123
      else -- pending
124
        if (ack_i = '1') or (err_i = '1') then -- termination by bus system
125
          control.pending <= '0';
126
        elsif (or_all_f(control.timeout) = '0') then -- timeout! terminate bus transfer
127
          control.pending <= '0';
128
          control.bus_err <= '1';
129
        end if;
130
      end if;
131
 
132
      -- timeout counter --
133
      if (control.pending = '0') then
134
        control.timeout <= std_ulogic_vector(to_unsigned(max_proc_int_response_time_c, index_size_f(max_proc_int_response_time_c)));
135
      else
136
        control.timeout <= std_ulogic_vector(unsigned(control.timeout) - 1); -- countdown timer
137
      end if;
138
    end if;
139
  end process keeper_control;
140
 
141
  err_o <= control.bus_err;
142
 
143
 
144
end neorv32_bus_keeper_rtl;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.