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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_sysinfo.vhd] - Blame information for rev 23

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-- #################################################################################################
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-- # << NEORV32 - System/Processor Configuration Information Memory (SYSINFO) >>                   #
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-- # ********************************************************************************************* #
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-- # This unit provides information regarding the 'processor system' configuration -               #
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-- # mostly derived from the top's configuration generics.                                         #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License                                                                          #
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-- #                                                                                               #
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-- # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
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-- #                                                                                               #
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-- # Redistribution and use in source and binary forms, with or without modification, are          #
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-- # permitted provided that the following conditions are met:                                     #
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-- #                                                                                               #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of        #
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-- #    conditions and the following disclaimer.                                                   #
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-- #                                                                                               #
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-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
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-- #    conditions and the following disclaimer in the documentation and/or other materials        #
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-- #    provided with the distribution.                                                            #
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-- #                                                                                               #
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-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
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-- #    endorse or promote products derived from this software without specific prior written      #
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-- #    permission.                                                                                #
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-- #                                                                                               #
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-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
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-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
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-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
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-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
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-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
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-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
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-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
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-- # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
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-- # ********************************************************************************************* #
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-- # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
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-- #################################################################################################
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library neorv32;
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use neorv32.neorv32_package.all;
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entity neorv32_sysinfo is
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  generic (
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    -- General --
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    CLOCK_FREQUENCY   : natural := 0;      -- clock frequency of clk_i in Hz
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    BOOTLOADER_USE    : boolean := true;   -- implement processor-internal bootloader?
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    USER_CODE         : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
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    -- Internal Instruction memory --
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    MEM_INT_IMEM_USE  : boolean := true;   -- implement processor-internal instruction memory
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    MEM_INT_IMEM_SIZE : natural := 8*1024; -- size of processor-internal instruction memory in bytes
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    MEM_INT_IMEM_ROM  : boolean := false;  -- implement processor-internal instruction memory as ROM
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    -- Internal Data memory --
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    MEM_INT_DMEM_USE  : boolean := true;   -- implement processor-internal data memory
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    MEM_INT_DMEM_SIZE : natural := 4*1024; -- size of processor-internal data memory in bytes
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    -- External memory interface --
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    MEM_EXT_USE       : boolean := false;  -- implement external memory bus interface?
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    -- Processor peripherals --
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    IO_GPIO_USE       : boolean := true;   -- implement general purpose input/output port unit (GPIO)?
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    IO_MTIME_USE      : boolean := true;   -- implement machine system timer (MTIME)?
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    IO_UART_USE       : boolean := true;   -- implement universal asynchronous receiver/transmitter (UART)?
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    IO_SPI_USE        : boolean := true;   -- implement serial peripheral interface (SPI)?
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    IO_TWI_USE        : boolean := true;   -- implement two-wire interface (TWI)?
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    IO_PWM_USE        : boolean := true;   -- implement pulse-width modulation unit (PWM)?
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    IO_WDT_USE        : boolean := true;   -- implement watch dog timer (WDT)?
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    IO_TRNG_USE       : boolean := true;   -- implement true random number generator (TRNG)?
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    IO_DEVNULL_USE    : boolean := true;   -- implement dummy device (DEVNULL)?
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    IO_CFU_USE        : boolean := true    -- implement custom functions unit (CFU)?
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  );
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  port (
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    -- host access --
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    clk_i  : in  std_ulogic; -- global clock line
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    addr_i : in  std_ulogic_vector(31 downto 0); -- address
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    rden_i : in  std_ulogic; -- read enable
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    data_o : out std_ulogic_vector(31 downto 0); -- data out
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    ack_o  : out std_ulogic  -- transfer acknowledge
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  );
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end neorv32_sysinfo;
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architecture neorv32_sysinfo_rtl of neorv32_sysinfo is
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  -- IO space: module base address --
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  constant hi_abb_c : natural := index_size_f(io_size_c)-1; -- high address boundary bit
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  constant lo_abb_c : natural := index_size_f(sysinfo_size_c); -- low address boundary bit
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  -- access control --
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  signal acc_en    : std_ulogic; -- module access enable
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  signal addr      : std_ulogic_vector(31 downto 0);
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  signal rden      : std_ulogic;
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  signal info_addr : std_ulogic_vector(02 downto 0);
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  -- system information ROM --
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  type info_mem_t is array (0 to 7) of std_ulogic_vector(31 downto 0);
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  signal sysinfo_mem : info_mem_t;
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begin
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  -- Access Control -------------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  acc_en    <= '1' when (addr_i(hi_abb_c downto lo_abb_c) = sysinfo_base_c(hi_abb_c downto lo_abb_c)) else '0';
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  rden      <= acc_en and rden_i; -- valid read access
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  addr      <= sysinfo_base_c(31 downto lo_abb_c) & addr_i(lo_abb_c-1 downto 2) & "00"; -- word aligned
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  info_addr <= addr(index_size_f(sysinfo_size_c)-1 downto 2);
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  -- Construct Info ROM ---------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  -- SYSINFO(0): Processor (primary) clock frequency --
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  sysinfo_mem(0) <= std_ulogic_vector(to_unsigned(CLOCK_FREQUENCY, 32));
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  -- SYSINFO(1): Custom user code/ID --
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  sysinfo_mem(1) <= USER_CODE;
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  -- SYSINFO(2): Implemented processor devices/features --
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  -- Memory --
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  sysinfo_mem(2)(00) <= bool_to_ulogic_f(BOOTLOADER_USE);   -- processor-internal bootloader implemented?
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  sysinfo_mem(2)(01) <= bool_to_ulogic_f(MEM_EXT_USE);      -- external memory bus interface implemented?
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  sysinfo_mem(2)(02) <= bool_to_ulogic_f(MEM_INT_IMEM_USE); -- processor-internal instruction memory implemented?
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  sysinfo_mem(2)(03) <= bool_to_ulogic_f(MEM_INT_IMEM_ROM); -- processor-internal instruction memory implemented as ROM?
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  sysinfo_mem(2)(04) <= bool_to_ulogic_f(MEM_INT_DMEM_USE); -- processor-internal data memory implemented?
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  --
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  sysinfo_mem(2)(15 downto 05) <= (others => '0'); -- reserved
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  -- IO --
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  sysinfo_mem(2)(16) <= bool_to_ulogic_f(IO_GPIO_USE);      -- general purpose input/output port unit (GPIO) implemented?
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  sysinfo_mem(2)(17) <= bool_to_ulogic_f(IO_MTIME_USE);     -- machine system timer (MTIME) implemented?
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  sysinfo_mem(2)(18) <= bool_to_ulogic_f(IO_UART_USE);      -- universal asynchronous receiver/transmitter (UART) implemented?
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  sysinfo_mem(2)(19) <= bool_to_ulogic_f(IO_SPI_USE);       -- serial peripheral interface (SPI) implemented?
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  sysinfo_mem(2)(20) <= bool_to_ulogic_f(IO_TWI_USE);       -- two-wire interface (TWI) implemented?
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  sysinfo_mem(2)(21) <= bool_to_ulogic_f(IO_PWM_USE);       -- pulse-width modulation unit (PWM) implemented?
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  sysinfo_mem(2)(22) <= bool_to_ulogic_f(IO_WDT_USE);       -- watch dog timer (WDT) implemented?
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  sysinfo_mem(2)(23) <= bool_to_ulogic_f(IO_CFU_USE);       -- custom functions unit (CFU) implemented?
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  sysinfo_mem(2)(24) <= bool_to_ulogic_f(IO_TRNG_USE);      -- true random number generator (TRNG) implemented?
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  sysinfo_mem(2)(25) <= bool_to_ulogic_f(IO_DEVNULL_USE);   -- dummy device (DEVNULL) implemented?
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  --
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  sysinfo_mem(2)(31 downto 26) <= (others => '0'); -- reserved
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  -- SYSINFO(3): reserved --
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  sysinfo_mem(3) <= (others => '0'); -- reserved
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  -- SYSINFO(4): Base address of instruction memory space --
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  sysinfo_mem(4) <= ispace_base_c; -- defined in neorv32_package.vhd file
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  -- SYSINFO(5): Base address of data memory space --
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  sysinfo_mem(5) <= dspace_base_c; -- defined in neorv32_package.vhd file
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  -- SYSINFO(6): Size of IMEM in bytes --
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  sysinfo_mem(6) <= std_ulogic_vector(to_unsigned(MEM_INT_IMEM_SIZE, 32)) when (MEM_INT_IMEM_USE = true) else (others => '0');
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  -- SYSINFO(7): Size of DMEM in bytes --
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  sysinfo_mem(7) <= std_ulogic_vector(to_unsigned(MEM_INT_DMEM_SIZE, 32)) when (MEM_INT_DMEM_USE = true) else (others => '0');
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  -- Read Access ----------------------------------------------------------------------------
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  -- -------------------------------------------------------------------------------------------
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  read_access: process(clk_i)
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  begin
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    if rising_edge(clk_i) then
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      ack_o  <= rden;
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      data_o <= (others => '0');
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      if (rden = '1') then
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        data_o <= sysinfo_mem(to_integer(unsigned(info_addr)));
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      end if;
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    end if;
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  end process read_access;
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end neorv32_sysinfo_rtl;

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