OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sim/] [uart_rx.vhd] - Blame information for rev 61

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 61 zero_gravi
library ieee;
2
use ieee.std_logic_1164.all;
3
use ieee.numeric_std.all;
4
use ieee.math_real.all;
5
 
6
use std.textio.all;
7
 
8
library vunit_lib;
9
context vunit_lib.vunit_context;
10
context vunit_lib.com_context;
11
context vunit_lib.vc_context;
12
 
13
use work.uart_rx_pkg.all;
14
 
15
entity uart_rx is
16
  generic (handle : uart_rx_t);
17
  port (
18
    clk : in std_ulogic;
19
    uart_txd : in std_ulogic
20
    );
21
end entity;
22
 
23
architecture a of uart_rx is
24
  signal uart_rx_sync : std_ulogic_vector(04 downto 0) := (others => '1');
25
  signal uart_rx_busy : std_ulogic := '0';
26
  signal uart_rx_sreg : std_ulogic_vector(08 downto 0) := (others => '0');
27
  signal uart_rx_baud_cnt : real;
28
  signal uart_rx_bitcnt : natural;
29
 
30
  file file_uart_tx_out : text open write_mode is "neorv32.testbench_" & get_name(handle.p_logger) & ".out";
31
  constant checker : checker_t := new_checker(handle.p_logger);
32
  constant character_queue : queue_t := new_queue;
33
 
34
begin
35
  control : process
36
    variable request_msg, reply_msg : msg_t;
37
    variable msg_type : msg_type_t;
38
 
39
    procedure put_characters_in_queue(s : string) is
40
    begin
41
      for idx in s'range loop
42
        push(character_queue, s(idx));
43
      end loop;
44
    end procedure put_characters_in_queue;
45
  begin
46
    receive(net, handle.p_actor, request_msg);
47
    msg_type := message_type(request_msg);
48
 
49
    -- Standard handling of standard wait_for_time messages = wait for the given time
50
    -- before proceeeding
51
    handle_wait_for_time(net, msg_type, request_msg);
52
 
53
    if msg_type = check_uart_msg then
54
      put_characters_in_queue(pop(request_msg));
55
 
56
    -- Custom handling of standard wait_until_idle message
57
    elsif msg_type = wait_until_idle_msg then
58
      while not is_empty(character_queue) loop
59
        wait until rising_edge(clk);
60
      end loop;
61
      reply_msg := new_msg(wait_until_idle_reply_msg);
62
      reply(net, request_msg, reply_msg);
63
 
64
    else
65
      unexpected_msg_type(msg_type);
66
    end if;
67
  end process;
68
 
69
  uart_rx_console : process(clk)
70
    variable i : integer;
71
    variable l : line;
72
    variable expected_character : character;
73
  begin
74
    -- "UART" --
75
    if rising_edge(clk) then
76
      -- synchronizer --
77
      uart_rx_sync <= uart_rx_sync(3 downto 0) & uart_txd;
78
      -- arbiter --
79
      if (uart_rx_busy = '0') then  -- idle
80
        uart_rx_busy <= '0';
81
        uart_rx_baud_cnt <= round(0.5 * handle.p_baud_val);
82
        uart_rx_bitcnt <= 9;
83
        if (uart_rx_sync(4 downto 1) = "1100") then  -- start bit? (falling edge)
84
          uart_rx_busy <= '1';
85
        end if;
86
      else
87
        if (uart_rx_baud_cnt <= 0.0) then
88
          if (uart_rx_bitcnt = 1) then
89
            uart_rx_baud_cnt <= round(0.5 * handle.p_baud_val);
90
          else
91
            uart_rx_baud_cnt <= round(handle.p_baud_val);
92
          end if;
93
          if (uart_rx_bitcnt = 0) then
94
            uart_rx_busy <= '0';  -- done
95
            i := to_integer(unsigned(uart_rx_sreg(8 downto 1)));
96
 
97
            if is_empty(character_queue) then
98
              check_failed(checker, "Extra characters received");
99
            else
100
              expected_character := pop(character_queue);
101
              check_equal(checker, character'val(i), expected_character);
102
            end if;
103
 
104
            if (i = 10) then  -- Linux line break
105
              writeline(file_uart_tx_out, l);
106
            elsif (i /= 13) then  -- Remove additional carriage return
107
              write(l, character'val(i));
108
            end if;
109
          else
110
            uart_rx_sreg <= uart_rx_sync(4) & uart_rx_sreg(8 downto 1);
111
            uart_rx_bitcnt <= uart_rx_bitcnt - 1;
112
          end if;
113
        else
114
          uart_rx_baud_cnt <= uart_rx_baud_cnt - 1.0;
115
        end if;
116
      end if;
117
    end if;
118
  end process uart_rx_console;
119
end architecture;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.