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[/] [neorv32/] [trunk/] [sw/] [bootloader/] [bootloader.c] - Blame information for rev 34

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Line No. Rev Author Line
1 2 zero_gravi
// #################################################################################################
2
// # << NEORV32 - Bootloader >>                                                                    #
3
// # ********************************************************************************************* #
4 33 zero_gravi
// # In order to run the bootloader on any CPU configuration, the bootloader should be compiled    #
5
// # unsing the base ISA (rv32i/rv32e) only.                                                       #
6 2 zero_gravi
// # ********************************************************************************************* #
7
// # Boot from (internal) instruction memory, UART or SPI Flash.                                   #
8
// #                                                                                               #
9 33 zero_gravi
// # UART configuration: 8 data bits, no parity bit, 1 stop bit, 19200 baud                        #
10 2 zero_gravi
// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0)         #
11 33 zero_gravi
// # neorv32.gpio_o(0) is used as high-active status LED (can be disabled via #STATUS_LED_EN).     #
12 2 zero_gravi
// #                                                                                               #
13 33 zero_gravi
// # Auto boot sequence (can be disabled via #AUTOBOOT_EN) after timeout (via #AUTOBOOT_TIMEOUT):  #
14 2 zero_gravi
// #  -> Try booting from SPI flash at spi_csn_o(0).                                               #
15 33 zero_gravi
// #  -> Permanently light up status led and stall CPU if SPI flash booting attempt fails.         #
16 2 zero_gravi
// # ********************************************************************************************* #
17
// # BSD 3-Clause License                                                                          #
18
// #                                                                                               #
19
// # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
20
// #                                                                                               #
21
// # Redistribution and use in source and binary forms, with or without modification, are          #
22
// # permitted provided that the following conditions are met:                                     #
23
// #                                                                                               #
24
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
25
// #    conditions and the following disclaimer.                                                   #
26
// #                                                                                               #
27
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
28
// #    conditions and the following disclaimer in the documentation and/or other materials        #
29
// #    provided with the distribution.                                                            #
30
// #                                                                                               #
31
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
32
// #    endorse or promote products derived from this software without specific prior written      #
33
// #    permission.                                                                                #
34
// #                                                                                               #
35
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
36
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
37
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
38
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
39
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
40
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
41
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
42
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
43
// # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
44
// # ********************************************************************************************* #
45
// # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
46
// #################################################################################################
47
 
48
 
49
/**********************************************************************//**
50
 * @file bootloader.c
51
 * @author Stephan Nolting
52 33 zero_gravi
 * @brief Default NEORV32 bootloader.
53 2 zero_gravi
 **************************************************************************/
54
 
55
// Libraries
56
#include <stdint.h>
57
#include <neorv32.h>
58
 
59
 
60
/**********************************************************************//**
61
 * @name User configuration
62
 **************************************************************************/
63
/**@{*/
64
/** UART BAUD rate */
65
#define BAUD_RATE              (19200)
66 33 zero_gravi
/** Enable auto-boot sequence if != 0 */
67
#define AUTOBOOT_EN            (1)
68 2 zero_gravi
/** Time until the auto-boot sequence starts (in seconds) */
69 9 zero_gravi
#define AUTOBOOT_TIMEOUT       8
70 22 zero_gravi
/** Set to 0 to disable bootloader status LED */
71
#define STATUS_LED_EN          (1)
72
/** Bootloader status LED at GPIO output port */
73 2 zero_gravi
#define STATUS_LED             (0)
74 33 zero_gravi
/** SPI flash boot image base address (warning! address might wrap-around!) */
75 11 zero_gravi
#define SPI_FLASH_BOOT_ADR     (0x00800000)
76 33 zero_gravi
/** SPI flash chip select line at spi_csn_o */
77 2 zero_gravi
#define SPI_FLASH_CS           (0)
78 33 zero_gravi
/** Default SPI flash clock prescaler */
79 2 zero_gravi
#define SPI_FLASH_CLK_PRSC     (CLK_PRSC_8)
80 33 zero_gravi
/** SPI flash sector size in bytes (default = 64kb) */
81 2 zero_gravi
#define SPI_FLASH_SECTOR_SIZE  (64*1024)
82 34 zero_gravi
/** ASCII char to start fast executable upload process (for use with automatic upload scripts) */
83
#define FAST_UPLOAD_CMD        '#'
84 2 zero_gravi
/**@}*/
85
 
86
 
87
/**********************************************************************//**
88
  Executable stream source select
89
 **************************************************************************/
90
enum EXE_STREAM_SOURCE {
91
  EXE_STREAM_UART  = 0, /**< Get executable via UART */
92
  EXE_STREAM_FLASH = 1  /**< Get executable via SPI flash */
93
};
94
 
95
 
96
/**********************************************************************//**
97
 * Error codes
98
 **************************************************************************/
99
enum ERROR_CODES {
100
  ERROR_SIGNATURE = 0, /**< 0: Wrong signature in executable */
101
  ERROR_SIZE      = 1, /**< 1: Insufficient instruction memory capacity */
102
  ERROR_CHECKSUM  = 2, /**< 2: Checksum error in executable */
103
  ERROR_FLASH     = 3, /**< 3: SPI flash access error */
104
  ERROR_ROM       = 4, /**< 4: Instruction memory is marked as read-only */
105
  ERROR_SYSTEM    = 5  /**< 5: System exception */
106
};
107
 
108
 
109
/**********************************************************************//**
110
 * SPI flash commands
111
 **************************************************************************/
112
enum SPI_FLASH_CMD {
113
  SPI_FLASH_CMD_PAGE_PROGRAM = 0x02, /**< Program page */
114
  SPI_FLASH_CMD_READ         = 0x03, /**< Read data */
115
  SPI_FLASH_CMD_READ_STATUS  = 0x05, /**< Get status register */
116
  SPI_FLASH_CMD_WRITE_ENABLE = 0x06, /**< Allow write access */
117
  SPI_FLASH_CMD_READ_ID      = 0x9E, /**< Read manufacturer ID */
118
  SPI_FLASH_CMD_SECTOR_ERASE = 0xD8  /**< Erase complete sector */
119
};
120
 
121
 
122
/**********************************************************************//**
123
 * NEORV32 executable
124
 **************************************************************************/
125
enum NEORV32_EXECUTABLE {
126
  EXE_OFFSET_SIGNATURE =  0, /**< Offset in bytes from start to signature (32-bit) */
127
  EXE_OFFSET_SIZE      =  4, /**< Offset in bytes from start to size (32-bit) */
128
  EXE_OFFSET_CHECKSUM  =  8, /**< Offset in bytes from start to checksum (32-bit) */
129
  EXE_OFFSET_DATA      = 12, /**< Offset in bytes from start to data (32-bit) */
130
};
131
 
132
 
133
/**********************************************************************//**
134
 * Valid executable identification signature.
135
 **************************************************************************/
136
#define EXE_SIGNATURE 0x4788CAFE
137
 
138
 
139
/**********************************************************************//**
140
 * String output helper macros.
141
 **************************************************************************/
142
/**@{*/
143
/* Actual define-to-string helper */
144
#define xstr(a) str(a)
145
/* Internal helper macro */
146
#define str(a) #a
147
/**@}*/
148
 
149
 
150 22 zero_gravi
/**********************************************************************//**
151
 * This global variable keeps the size of the available executable in bytes.
152
 * If =0 no executable is available (yet).
153
 **************************************************************************/
154
uint32_t exe_available = 0;
155
 
156
 
157 2 zero_gravi
// Function prototypes
158 22 zero_gravi
void __attribute__((__interrupt__)) bootloader_trap_handler(void);
159 34 zero_gravi
void fast_upload(int src);
160 2 zero_gravi
void print_help(void);
161
void start_app(void);
162
void get_exe(int src);
163
void save_exe(void);
164
uint32_t get_exe_word(int src, uint32_t addr);
165
void system_error(uint8_t err_code);
166
void print_hex_word(uint32_t num);
167
 
168
// SPI flash access
169
uint8_t spi_flash_read_byte(uint32_t addr);
170
void spi_flash_write_byte(uint32_t addr, uint8_t wdata);
171
void spi_flash_write_word(uint32_t addr, uint32_t wdata);
172
void spi_flash_erase_sector(uint32_t addr);
173
uint8_t spi_flash_read_status(void);
174
uint8_t spi_flash_read_1st_id(void);
175 4 zero_gravi
void spi_flash_write_enable(void);
176
void spi_flash_write_addr(uint32_t addr);
177 2 zero_gravi
 
178
 
179
/**********************************************************************//**
180
 * Bootloader main.
181
 **************************************************************************/
182
int main(void) {
183
 
184
  // ------------------------------------------------
185
  // Processor hardware initialization
186 22 zero_gravi
  // - all IO devices are reset and disabled by the crt0 code
187 2 zero_gravi
  // ------------------------------------------------
188
 
189
  // get clock speed (in Hz)
190 12 zero_gravi
  uint32_t clock_speed = SYSINFO_CLK;
191 2 zero_gravi
 
192
  // init SPI for 8-bit, clock-mode 0, MSB-first, no interrupt
193
  if (clock_speed < 40000000) {
194
    neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0, 0, 0);
195
  }
196
  else {
197
    neorv32_spi_setup(CLK_PRSC_128, 0, 0, 0, 0);
198
  }
199
 
200
  // init UART (no interrupts)
201
  neorv32_uart_setup(BAUD_RATE, 0, 0);
202
 
203
  // Configure machine system timer interrupt for ~2Hz
204
  neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
205
 
206 22 zero_gravi
  // confiure trap handler (bare-metal, no neorv32 rte available)
207
  neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
208
 
209 2 zero_gravi
  neorv32_cpu_csr_write(CSR_MIE, 1 << CPU_MIE_MTIE); // activate MTIME IRQ source
210
  neorv32_cpu_eint(); // enable global interrupts
211
 
212 22 zero_gravi
  if (STATUS_LED_EN == 1) {
213
    // activate status LED, clear all others
214
    neorv32_gpio_port_set(1 << STATUS_LED);
215
  }
216 2 zero_gravi
 
217 22 zero_gravi
  // global variable to executable size; 0 means there is no exe available
218
  exe_available = 0;
219 2 zero_gravi
 
220
 
221
  // ------------------------------------------------
222
  // Show bootloader intro and system info
223
  // ------------------------------------------------
224
  neorv32_uart_print("\n\n\n\n<< NEORV32 Bootloader >>\n\n"
225
                     "BLDV: "__DATE__"\nHWV:  ");
226 12 zero_gravi
  neorv32_rte_print_hw_version();
227 2 zero_gravi
  neorv32_uart_print("\nCLK:  ");
228 12 zero_gravi
  print_hex_word(SYSINFO_CLK);
229
  neorv32_uart_print(" Hz\nUSER: ");
230
  print_hex_word(SYSINFO_USER_CODE);
231 6 zero_gravi
  neorv32_uart_print("\nMISA: ");
232 2 zero_gravi
  print_hex_word(neorv32_cpu_csr_read(CSR_MISA));
233 27 zero_gravi
  neorv32_uart_print("\nPROC: ");
234 12 zero_gravi
  print_hex_word(SYSINFO_FEATURES);
235 2 zero_gravi
  neorv32_uart_print("\nIMEM: ");
236 23 zero_gravi
  print_hex_word(SYSINFO_IMEM_SIZE);
237 2 zero_gravi
  neorv32_uart_print(" bytes @ ");
238 12 zero_gravi
  print_hex_word(SYSINFO_ISPACE_BASE);
239 2 zero_gravi
  neorv32_uart_print("\nDMEM: ");
240 23 zero_gravi
  print_hex_word(SYSINFO_DMEM_SIZE);
241 2 zero_gravi
  neorv32_uart_print(" bytes @ ");
242 12 zero_gravi
  print_hex_word(SYSINFO_DSPACE_BASE);
243 2 zero_gravi
 
244
 
245
  // ------------------------------------------------
246
  // Auto boot sequence
247
  // ------------------------------------------------
248 24 zero_gravi
#if (AUTOBOOT_EN != 0)
249 2 zero_gravi
  neorv32_uart_print("\n\nAutoboot in "xstr(AUTOBOOT_TIMEOUT)"s. Press key to abort.\n");
250
 
251 13 zero_gravi
  uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTOBOOT_TIMEOUT * clock_speed);
252
 
253 22 zero_gravi
  while ((UART_DATA & (1 << UART_DATA_AVAIL)) == 0) { // wait for any key to be pressed
254 2 zero_gravi
 
255
    if (neorv32_mtime_get_time() >= timeout_time) { // timeout? start auto boot sequence
256 34 zero_gravi
      fast_upload(EXE_STREAM_FLASH); // try booting from flash
257 2 zero_gravi
    }
258
  }
259
  neorv32_uart_print("Aborted.\n\n");
260 34 zero_gravi
 
261
  // fast executable upload?
262
  if (neorv32_uart_char_received_get() == FAST_UPLOAD_CMD) {
263
    fast_upload(EXE_STREAM_UART);
264
  }
265 24 zero_gravi
#else
266
  neorv32_uart_print("\n\n");
267
#endif
268
 
269 2 zero_gravi
  print_help();
270
 
271
 
272
  // ------------------------------------------------
273
  // Bootloader console
274
  // ------------------------------------------------
275
  while (1) {
276
 
277
    neorv32_uart_print("\nCMD:> ");
278
    char c = neorv32_uart_getc();
279
    neorv32_uart_putc(c); // echo
280
    neorv32_uart_print("\n");
281
 
282 34 zero_gravi
    if (c == FAST_UPLOAD_CMD) { // fast executable upload
283
      fast_upload(EXE_STREAM_UART);
284
    }
285
    else if (c == 'r') { // restart bootloader
286 22 zero_gravi
      asm volatile ("li t0, %[input_i]; jr t0" :  : [input_i] "i" (BOOTLOADER_BASE_ADDRESS)); // jump to beginning of boot ROM
287 2 zero_gravi
    }
288
    else if (c == 'h') { // help menu
289
      print_help();
290
    }
291
    else if (c == 'u') { // get executable via UART
292
      get_exe(EXE_STREAM_UART);
293
    }
294 24 zero_gravi
    else if (c == 's') { // program flash from memory (IMEM)
295 2 zero_gravi
      save_exe();
296
    }
297
    else if (c == 'l') { // get executable from flash
298
      get_exe(EXE_STREAM_FLASH);
299
    }
300
    else if (c == 'e') { // start application program
301
      start_app();
302
    }
303 22 zero_gravi
    else if (c == '?') {
304 2 zero_gravi
      neorv32_uart_print("by Stephan Nolting");
305
    }
306
    else { // unknown command
307
      neorv32_uart_print("Invalid CMD");
308
    }
309
  }
310
 
311 12 zero_gravi
  return 0; // bootloader should never return
312 2 zero_gravi
}
313
 
314
 
315
/**********************************************************************//**
316 34 zero_gravi
 * Get executable stream and execute it.
317
 *
318
 * @param src Source of executable stream data. See #EXE_STREAM_SOURCE.
319
 **************************************************************************/
320
void fast_upload(int src) {
321
 
322
  get_exe(src);
323
  neorv32_uart_print("\n");
324
  start_app();
325
  while(1);
326
}
327
 
328
 
329
/**********************************************************************//**
330 2 zero_gravi
 * Print help menu.
331
 **************************************************************************/
332
void print_help(void) {
333
 
334
  neorv32_uart_print("Available CMDs:\n"
335
                     " h: Help\n"
336
                     " r: Restart\n"
337
                     " u: Upload\n"
338
                     " s: Store to flash\n"
339
                     " l: Load from flash\n"
340
                     " e: Execute");
341
}
342
 
343
 
344
/**********************************************************************//**
345
 * Start application program at the beginning of instruction space.
346
 **************************************************************************/
347
void start_app(void) {
348
 
349 4 zero_gravi
  // executable available?
350 22 zero_gravi
  if (exe_available == 0) {
351 4 zero_gravi
    neorv32_uart_print("No executable available.");
352
    return;
353
  }
354
 
355 23 zero_gravi
  // no need to shut down or reset the used peripherals
356
  // no need to disable interrupt sources
357 2 zero_gravi
  // -> this will be done by application's crt0
358
 
359 23 zero_gravi
  // deactivate global IRQs
360 2 zero_gravi
  neorv32_cpu_dint();
361
 
362
  neorv32_uart_print("Booting...\n\n");
363
 
364
  // wait for UART to finish transmitting
365
  while ((UART_CT & (1<<UART_CT_TX_BUSY)) != 0);
366
 
367 12 zero_gravi
  // reset performance counters (to benchmark actual application)
368 23 zero_gravi
  asm volatile ("csrw mcycle,    zero"); // also clears 'cycle'
369
  asm volatile ("csrw mcycleh,   zero"); // also clears 'cycleh'
370
  asm volatile ("csrw minstret,  zero"); // also clears 'instret'
371
  asm volatile ("csrw minstreth, zero"); // also clears 'instreth'
372 12 zero_gravi
 
373 2 zero_gravi
  // start app at instruction space base address
374 14 zero_gravi
  register uint32_t app_base = SYSINFO_ISPACE_BASE;
375
  asm volatile ("jalr zero, %0" : : "r" (app_base));
376
  while (1);
377 2 zero_gravi
}
378
 
379
 
380
/**********************************************************************//**
381 23 zero_gravi
 * Bootloader trap handler. Used for the MTIME tick and to capture any other traps.
382 2 zero_gravi
 * @warning Since we have no runtime environment, we have to use the interrupt attribute here. Here, and only here!
383
 **************************************************************************/
384 22 zero_gravi
void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
385 2 zero_gravi
 
386
  // make sure this was caused by MTIME IRQ
387
  uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
388 23 zero_gravi
  if (cause == TRAP_CODE_MTI) { // raw exception code for MTI
389 22 zero_gravi
    if (STATUS_LED_EN == 1) {
390
      // toggle status LED
391
      neorv32_gpio_pin_toggle(STATUS_LED);
392
    }
393 2 zero_gravi
    // set time for next IRQ
394 12 zero_gravi
    neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
395 2 zero_gravi
  }
396 23 zero_gravi
 
397
  else if (cause == TRAP_CODE_S_ACCESS) { // seems like executable is too large
398
    system_error(ERROR_SIZE);
399
  }
400
 
401
  else {
402 34 zero_gravi
    neorv32_uart_print("\n\nEXC (");
403 23 zero_gravi
    print_hex_word(cause);
404
    neorv32_uart_print(") @ 0x");
405
    print_hex_word(neorv32_cpu_csr_read(CSR_MEPC));
406
    system_error(ERROR_SYSTEM);
407
  }
408 2 zero_gravi
}
409
 
410
 
411
/**********************************************************************//**
412
 * Get executable stream.
413
 *
414
 * @param src Source of executable stream data. See #EXE_STREAM_SOURCE.
415
 **************************************************************************/
416
void get_exe(int src) {
417
 
418 22 zero_gravi
  // is instruction memory (IMEM) read-only?
419 12 zero_gravi
  if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM_ROM)) {
420 2 zero_gravi
    system_error(ERROR_ROM);
421
  }
422
 
423
  // flash image base address
424
  uint32_t addr = SPI_FLASH_BOOT_ADR;
425
 
426
  // get image from flash?
427
  if (src == EXE_STREAM_UART) {
428
    neorv32_uart_print("Awaiting neorv32_exe.bin... ");
429
  }
430
  else {
431
    neorv32_uart_print("Loading... ");
432
 
433
    // check if flash ready (or available at all)
434
    if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
435
      system_error(ERROR_FLASH);
436
    }
437
  }
438
 
439
  // check if valid image
440
  uint32_t signature = get_exe_word(src, addr + EXE_OFFSET_SIGNATURE);
441
  if (signature != EXE_SIGNATURE) { // signature
442
    system_error(ERROR_SIGNATURE);
443
  }
444
 
445
  // image size and checksum
446
  uint32_t size  = get_exe_word(src, addr + EXE_OFFSET_SIZE); // size in bytes
447
  uint32_t check = get_exe_word(src, addr + EXE_OFFSET_CHECKSUM); // complement sum checksum
448
 
449
  // transfer program data
450 12 zero_gravi
  uint32_t *pnt = (uint32_t*)SYSINFO_ISPACE_BASE;
451 2 zero_gravi
  uint32_t checksum = 0;
452
  uint32_t d = 0, i = 0;
453
  addr = addr + EXE_OFFSET_DATA;
454
  while (i < (size/4)) { // in words
455
    d = get_exe_word(src, addr);
456
    checksum += d;
457
    pnt[i++] = d;
458
    addr += 4;
459
  }
460
 
461
  // error during transfer?
462
  if ((checksum + check) != 0) {
463
    system_error(ERROR_CHECKSUM);
464
  }
465
  else {
466
    neorv32_uart_print("OK");
467 22 zero_gravi
    exe_available = size; // store exe size
468 2 zero_gravi
  }
469
}
470
 
471
 
472
/**********************************************************************//**
473
 * Store content of instruction memory to SPI flash.
474
 **************************************************************************/
475
void save_exe(void) {
476
 
477
  // size of last uploaded executable
478 22 zero_gravi
  uint32_t size = exe_available;
479 2 zero_gravi
 
480
  if (size == 0) {
481
    neorv32_uart_print("No executable available.");
482
    return;
483
  }
484
 
485
  uint32_t addr = SPI_FLASH_BOOT_ADR;
486
 
487
  // info and prompt
488
  neorv32_uart_print("Write 0x");
489
  print_hex_word(size);
490
  neorv32_uart_print(" bytes to SPI flash @ 0x");
491
  print_hex_word(addr);
492
  neorv32_uart_print("? (y/n) ");
493
 
494
  char c = neorv32_uart_getc();
495
  neorv32_uart_putc(c);
496
  if (c != 'y') {
497
    return;
498
  }
499
 
500
  // check if flash ready (or available at all)
501
  if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
502
    system_error(ERROR_FLASH);
503
  }
504
 
505
  neorv32_uart_print("\nFlashing... ");
506
 
507
  // clear memory before writing
508
  uint32_t num_sectors = (size / SPI_FLASH_SECTOR_SIZE) + 1; // clear at least 1 sector
509
  uint32_t sector = SPI_FLASH_BOOT_ADR;
510
  while (num_sectors--) {
511
    spi_flash_erase_sector(sector);
512
    sector += SPI_FLASH_SECTOR_SIZE;
513
  }
514
 
515
  // write EXE signature
516
  spi_flash_write_word(addr + EXE_OFFSET_SIGNATURE, EXE_SIGNATURE);
517
 
518
  // write size
519
  spi_flash_write_word(addr + EXE_OFFSET_SIZE, size);
520
 
521
  // store data from instruction memory and update checksum
522
  uint32_t checksum = 0;
523 12 zero_gravi
  uint32_t *pnt = (uint32_t*)SYSINFO_ISPACE_BASE;
524 2 zero_gravi
  addr = addr + EXE_OFFSET_DATA;
525
  uint32_t i = 0;
526
  while (i < (size/4)) { // in words
527
    uint32_t d = (uint32_t)*pnt++;
528
    checksum += d;
529
    spi_flash_write_word(addr, d);
530
    addr += 4;
531
    i++;
532
  }
533
 
534
  // write checksum (sum complement)
535
  checksum = (~checksum) + 1;
536
  spi_flash_write_word(SPI_FLASH_BOOT_ADR + EXE_OFFSET_CHECKSUM, checksum);
537
 
538
  neorv32_uart_print("OK");
539
}
540
 
541
 
542
/**********************************************************************//**
543
 * Get word from executable stream
544
 *
545
 * @param src Source of executable stream data. See #EXE_STREAM_SOURCE.
546
 * @param addr Address when accessing SPI flash.
547
 * @return 32-bit data word from stream.
548
 **************************************************************************/
549
uint32_t get_exe_word(int src, uint32_t addr) {
550
 
551
  union {
552
    uint32_t uint32;
553
    uint8_t  uint8[sizeof(uint32_t)];
554
  } data;
555
 
556
  uint32_t i;
557
  for (i=0; i<4; i++) {
558
    if (src == EXE_STREAM_UART) {
559
      data.uint8[3-i] = (uint8_t)neorv32_uart_getc();
560
    }
561
    else {
562
      data.uint8[3-i] = spi_flash_read_byte(addr + i);
563
    }
564
  }
565
 
566
  return data.uint32;
567
}
568
 
569
 
570
/**********************************************************************//**
571
 * Output system error ID and stall.
572
 *
573
 * @param[in] err_code Error code. See #ERROR_CODES.
574
 **************************************************************************/
575
void system_error(uint8_t err_code) {
576
 
577 23 zero_gravi
  neorv32_uart_print("\a\nERROR_"); // output error code with annoying bell sound
578 22 zero_gravi
  neorv32_uart_putc('0' + ((char)err_code)); // FIXME err_code should/must be below 10
579 2 zero_gravi
 
580
  neorv32_cpu_dint(); // deactivate IRQs
581 22 zero_gravi
  if (STATUS_LED_EN == 1) {
582
    neorv32_gpio_port_set(1 << STATUS_LED); // permanently light up status LED
583
  }
584 2 zero_gravi
 
585
  while(1); // freeze
586
}
587
 
588
 
589
/**********************************************************************//**
590
 * Print 32-bit number as 8-digit hexadecimal value (with "0x" suffix).
591
 *
592
 * @param[in] num Number to print as hexadecimal.
593
 **************************************************************************/
594
void print_hex_word(uint32_t num) {
595
 
596
  static const char hex_symbols[16] = "0123456789ABCDEF";
597
 
598
  neorv32_uart_print("0x");
599
 
600
  int i;
601
  for (i=0; i<8; i++) {
602
    uint32_t index = (num >> (28 - 4*i)) & 0xF;
603
    neorv32_uart_putc(hex_symbols[index]);
604
  }
605
}
606
 
607
 
608
 
609
// -------------------------------------------------------------------------------------
610
// SPI flash functions
611
// -------------------------------------------------------------------------------------
612
 
613
/**********************************************************************//**
614
 * Read byte from SPI flash.
615
 *
616
 * @param[in] addr Flash read address.
617
 * @return Read byte from SPI flash.
618
 **************************************************************************/
619
uint8_t spi_flash_read_byte(uint32_t addr) {
620
 
621
  neorv32_spi_cs_en(SPI_FLASH_CS);
622
 
623
  neorv32_spi_trans(SPI_FLASH_CMD_READ);
624 4 zero_gravi
  spi_flash_write_addr(addr);
625 2 zero_gravi
  uint8_t rdata = (uint8_t)neorv32_spi_trans(0);
626
 
627
  neorv32_spi_cs_dis(SPI_FLASH_CS);
628
 
629
  return rdata;
630
}
631
 
632
 
633
/**********************************************************************//**
634
 * Write byte to SPI flash.
635
 *
636
 * @param[in] addr SPI flash read address.
637
 * @param[in] wdata SPI flash read data.
638
 **************************************************************************/
639
void spi_flash_write_byte(uint32_t addr, uint8_t wdata) {
640
 
641 4 zero_gravi
  spi_flash_write_enable(); // allow write-access
642 2 zero_gravi
 
643
  neorv32_spi_cs_en(SPI_FLASH_CS);
644
 
645
  neorv32_spi_trans(SPI_FLASH_CMD_PAGE_PROGRAM);
646 4 zero_gravi
  spi_flash_write_addr(addr);
647 2 zero_gravi
  neorv32_spi_trans(wdata);
648
 
649
  neorv32_spi_cs_dis(SPI_FLASH_CS);
650
 
651
  while (1) {
652
    uint8_t tmp = spi_flash_read_status();
653
    if ((tmp & 0x01) == 0) { // write in progress flag cleared?
654
      break;
655
    }
656
  }
657
}
658
 
659
 
660
/**********************************************************************//**
661
 * Write word to SPI flash.
662
 *
663
 * @param addr SPI flash write address.
664
 * @param wdata SPI flash write data.
665
 **************************************************************************/
666
void spi_flash_write_word(uint32_t addr, uint32_t wdata) {
667
 
668
  union {
669
    uint32_t uint32;
670
    uint8_t  uint8[sizeof(uint32_t)];
671
  } data;
672
 
673
  data.uint32 = wdata;
674
 
675
  uint32_t i;
676
  for (i=0; i<4; i++) {
677
    spi_flash_write_byte(addr + i, data.uint8[3-i]);
678
  }
679
}
680
 
681
 
682
/**********************************************************************//**
683
 * Erase sector (64kB) at base adress.
684
 *
685
 * @param[in] addr Base address of sector to erase.
686
 **************************************************************************/
687
void spi_flash_erase_sector(uint32_t addr) {
688
 
689 4 zero_gravi
  spi_flash_write_enable(); // allow write-access
690 2 zero_gravi
 
691
  neorv32_spi_cs_en(SPI_FLASH_CS);
692
 
693
  neorv32_spi_trans(SPI_FLASH_CMD_SECTOR_ERASE);
694 4 zero_gravi
  spi_flash_write_addr(addr);
695 2 zero_gravi
 
696
  neorv32_spi_cs_dis(SPI_FLASH_CS);
697
 
698
  while (1) {
699
    uint8_t tmp = spi_flash_read_status();
700
    if ((tmp & 0x01) == 0) { // write in progress flag cleared?
701
      break;
702
    }
703
  }
704
}
705
 
706
 
707
/**********************************************************************//**
708
 * Read status register.
709
 *
710
 * @return Status register.
711
 **************************************************************************/
712
uint8_t spi_flash_read_status(void) {
713
 
714
  neorv32_spi_cs_en(SPI_FLASH_CS);
715
 
716
  neorv32_spi_trans(SPI_FLASH_CMD_READ_STATUS);
717
  uint8_t status = (uint8_t)neorv32_spi_trans(0);
718
 
719
  neorv32_spi_cs_dis(SPI_FLASH_CS);
720
 
721
  return status;
722
}
723
 
724
 
725
/**********************************************************************//**
726
 * Read first byte of ID (manufacturer ID), should be != 0x00.
727
 *
728
 * @note The first bit of the manufacturer ID is used to detect if a Flash is connected at all.
729
 *
730
 * @return First byte of ID.
731
 **************************************************************************/
732
uint8_t spi_flash_read_1st_id(void) {
733
 
734
  neorv32_spi_cs_en(SPI_FLASH_CS);
735
 
736
  neorv32_spi_trans(SPI_FLASH_CMD_READ_ID);
737
  uint8_t id = (uint8_t)neorv32_spi_trans(0);
738
 
739
  neorv32_spi_cs_dis(SPI_FLASH_CS);
740
 
741
  return id;
742
}
743
 
744
 
745
/**********************************************************************//**
746 4 zero_gravi
 * Enable flash write access.
747 2 zero_gravi
 **************************************************************************/
748 4 zero_gravi
void spi_flash_write_enable(void) {
749 2 zero_gravi
 
750
  neorv32_spi_cs_en(SPI_FLASH_CS);
751 4 zero_gravi
  neorv32_spi_trans(SPI_FLASH_CMD_WRITE_ENABLE);
752
  neorv32_spi_cs_dis(SPI_FLASH_CS);
753
}
754 2 zero_gravi
 
755
 
756 4 zero_gravi
/**********************************************************************//**
757
 * Send address word to flash.
758
 *
759
 * @param[in] addr Address word.
760
 **************************************************************************/
761
void spi_flash_write_addr(uint32_t addr) {
762
 
763
  union {
764
    uint32_t uint32;
765
    uint8_t  uint8[sizeof(uint32_t)];
766
  } address;
767
 
768
  address.uint32 = addr;
769
 
770
  neorv32_spi_trans(address.uint8[2]);
771
  neorv32_spi_trans(address.uint8[1]);
772
  neorv32_spi_trans(address.uint8[0]);
773 2 zero_gravi
}
774
 

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