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Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [example/] [demo_freeRTOS/] [full_demo/] [RegTest.s] - Blame information for rev 62

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/*
 * FreeRTOS Kernel V10.3.0
 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy of
 * this software and associated documentation files (the "Software"), to deal in
 * the Software without restriction, including without limitation the rights to
 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 * the Software, and to permit persons to whom the Software is furnished to do so,
 * subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in all
 * copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * http://www.FreeRTOS.org
 * http://aws.amazon.com/freertos
 *
 * 1 tab == 4 spaces!
 */
 
        .extern ulRegTest1LoopCounter
        .extern ulRegTest2LoopCounter
 
        .global vRegTest1Implementation
        .global vRegTest2Implementation
 
/*-----------------------------------------------------------*/
 
/*
 * The register check tasks are described in the comments at the top of
 * main_full.c.
 */
 
.align( 4 )
vRegTest1Implementation:
 
        /* Fill the core registers with known values. */
        li x5, 0x5
        li x6, 0x6
        li x7, 0x7
        li x8, 0x8
        li x9, 0x9
        li x10, 0xa
        li x11, 0xb
        li x12, 0xc
        li x13, 0xd
        li x14, 0xe
        li x15, 0xf
        li x16, 0x10
        li x17, 0x11
        li x18, 0x12
        li x19, 0x13
        li x20, 0x14
        li x21, 0x15
        li x22, 0x16
        li x23, 0x17
        li x24, 0x18
        li x25, 0x19
        li x26, 0x1a
        li x27, 0x1b
        li x28, 0x1c
        li x29, 0x1d
        li x30, 0x1e
 
reg1_loop:
 
        /* Check each register still contains the expected known value.
        vRegTest1Implementation uses x31 as the temporary, vRegTest2Implementation
        uses x5 as the temporary. */
        li x31, 0x5
        bne x31, x5, reg1_error_loop
        li x31, 0x6
        bne x31, x6, reg1_error_loop
        li x31, 0x7
        bne x31, x7, reg1_error_loop
        li x31, 0x8
        bne x31, x8, reg1_error_loop
        li x31, 0x9
        bne x31, x9, reg1_error_loop
        li x31, 0xa
        bne x31, x10, reg1_error_loop
        li x31, 0xb
        bne x31, x11, reg1_error_loop
        li x31, 0xc
        bne x31, x12, reg1_error_loop
        li x31, 0xd
        bne x31, x13, reg1_error_loop
        li x31, 0xe
        bne x31, x14, reg1_error_loop
        li x31, 0xf
        bne x31, x15, reg1_error_loop
        li x31, 0x10
        bne x31, x16, reg1_error_loop
        li x31, 0x11
        bne x31, x17, reg1_error_loop
        li x31, 0x12
        bne x31, x18, reg1_error_loop
        li x31, 0x13
        bne x31, x19, reg1_error_loop
        li x31, 0x14
        bne x31, x20, reg1_error_loop
        li x31, 0x15
        bne x31, x21, reg1_error_loop
        li x31, 0x16
        bne x31, x22, reg1_error_loop
        li x31, 0x17
        bne x31, x23, reg1_error_loop
        li x31, 0x18
        bne x31, x24, reg1_error_loop
        li x31, 0x19
        bne x31, x25, reg1_error_loop
        li x31, 0x1a
        bne x31, x26, reg1_error_loop
        li x31, 0x1b
        bne x31, x27, reg1_error_loop
        li x31, 0x1c
        bne x31, x28, reg1_error_loop
        li x31, 0x1d
        bne x31, x29, reg1_error_loop
        li x31, 0x1e
        bne x31, x30, reg1_error_loop
 
        /* Everything passed, increment the loop counter. */
        lw x31, ulRegTest1LoopCounterConst
        lw x30, 0(x31)
        addi x30, x30, 1
        sw x30, 0(x31)
 
        /* Restore clobbered register reading for next loop. */
        li x30, 0x1e
 
        /* Yield to increase code coverage. */
        ecall
 
        /* Start again. */
        jal reg1_loop
 
reg1_error_loop:
        /* Jump here if a register contains an uxpected value.  This stops the loop
        counter being incremented so the check task knows an error was found. */
        ebreak
        jal reg1_error_loop
 
.align( 4 )
ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter
 
/*-----------------------------------------------------------*/
 
.align( 4 )
vRegTest2Implementation:
 
        /* Fill the core registers with known values. */
        li x6, 0x61
        li x7, 0x71
        li x8, 0x81
        li x9, 0x91
        li x10, 0xa1
        li x11, 0xb1
        li x12, 0xc1
        li x13, 0xd1
        li x14, 0xe1
        li x15, 0xf1
        li x16, 0x20
        li x17, 0x21
        li x18, 0x22
        li x19, 0x23
        li x20, 0x24
        li x21, 0x25
        li x22, 0x26
        li x23, 0x27
        li x24, 0x28
        li x25, 0x29
        li x26, 0x2a
        li x27, 0x2b
        li x28, 0x2c
        li x29, 0x2d
        li x30, 0x2e
        li x31, 0x2f
 
Reg2_loop:
 
        /* Check each register still contains the expected known value.
        vRegTest2Implementation uses x5 as the temporary, vRegTest1Implementation
        uses x31 as the temporary. */
        li x5, 0x61
        bne x5, x6, reg2_error_loop
        li x5, 0x71
        bne x5, x7, reg2_error_loop
        li x5, 0x81
        bne x5, x8, reg2_error_loop
        li x5, 0x91
        bne x5, x9, reg2_error_loop
        li x5, 0xa1
        bne x5, x10, reg2_error_loop
        li x5, 0xb1
        bne x5, x11, reg2_error_loop
        li x5, 0xc1
        bne x5, x12, reg2_error_loop
        li x5, 0xd1
        bne x5, x13, reg2_error_loop
        li x5, 0xe1
        bne x5, x14, reg2_error_loop
        li x5, 0xf1
        bne x5, x15, reg2_error_loop
        li x5, 0x20
        bne x5, x16, reg2_error_loop
        li x5, 0x21
        bne x5, x17, reg2_error_loop
        li x5, 0x22
        bne x5, x18, reg2_error_loop
        li x5, 0x23
        bne x5, x19, reg2_error_loop
        li x5, 0x24
        bne x5, x20, reg2_error_loop
        li x5, 0x25
        bne x5, x21, reg2_error_loop
        li x5, 0x26
        bne x5, x22, reg2_error_loop
        li x5, 0x27
        bne x5, x23, reg2_error_loop
        li x5, 0x28
        bne x5, x24, reg2_error_loop
        li x5, 0x29
        bne x5, x25, reg2_error_loop
        li x5, 0x2a
        bne x5, x26, reg2_error_loop
        li x5, 0x2b
        bne x5, x27, reg2_error_loop
        li x5, 0x2c
        bne x5, x28, reg2_error_loop
        li x5, 0x2d
        bne x5, x29, reg2_error_loop
        li x5, 0x2e
        bne x5, x30, reg2_error_loop
        li x5, 0x2f
        bne x5, x31, reg2_error_loop
 
        /* Everything passed, increment the loop counter. */
        lw x5, ulRegTest2LoopCounterConst
        lw x6, 0(x5)
        addi x6, x6, 1
        sw x6, 0(x5)
 
        /* Restore clobbered register reading for next loop. */
        li x6, 0x61
 
        /* Start again. */
        jal Reg2_loop
 
reg2_error_loop:
        /* Jump here if a register contains an uxpected value.  This stops the loop
        counter being incremented so the check task knows an error was found. */
        ebreak
        jal reg2_error_loop
 
.align( 4 )
ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter
 
 

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Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [example/] [demo_freeRTOS/] [full_demo/] [RegTest.s] - Blame information for rev 62

Line No.	Rev	Author	Line
1	36	zero_gravi	`/*`
2			`* FreeRTOS Kernel V10.3.0`
3			`* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.`
4			`*`
5			`* Permission is hereby granted, free of charge, to any person obtaining a copy of`
6			`* this software and associated documentation files (the "Software"), to deal in`
7			`* the Software without restriction, including without limitation the rights to`
8			`* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of`
9			`* the Software, and to permit persons to whom the Software is furnished to do so,`
10			`* subject to the following conditions:`
11			`*`
12			`* The above copyright notice and this permission notice shall be included in all`
13			`* copies or substantial portions of the Software.`
14			`*`
15			`* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR`
16			`* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS`
17			`* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR`
18			`* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER`
19			`* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN`
20			`* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.`
21			`*`
22			`* http://www.FreeRTOS.org`
23			`* http://aws.amazon.com/freertos`
24			`*`
25			`* 1 tab == 4 spaces!`
26			`*/`
27
28			`.extern ulRegTest1LoopCounter`
29			`.extern ulRegTest2LoopCounter`
30
31			`.global vRegTest1Implementation`
32			`.global vRegTest2Implementation`
33
34			`/-----------------------------------------------------------/`
35
36			`/*`
37			`* The register check tasks are described in the comments at the top of`
38			`* main_full.c.`
39			`*/`
40
41			`.align( 4 )`
42			`vRegTest1Implementation:`
43
44			`/* Fill the core registers with known values. */`
45			`li x5, 0x5`
46			`li x6, 0x6`
47			`li x7, 0x7`
48			`li x8, 0x8`
49			`li x9, 0x9`
50			`li x10, 0xa`
51			`li x11, 0xb`
52			`li x12, 0xc`
53			`li x13, 0xd`
54			`li x14, 0xe`
55			`li x15, 0xf`
56			`li x16, 0x10`
57			`li x17, 0x11`
58			`li x18, 0x12`
59			`li x19, 0x13`
60			`li x20, 0x14`
61			`li x21, 0x15`
62			`li x22, 0x16`
63			`li x23, 0x17`
64			`li x24, 0x18`
65			`li x25, 0x19`
66			`li x26, 0x1a`
67			`li x27, 0x1b`
68			`li x28, 0x1c`
69			`li x29, 0x1d`
70			`li x30, 0x1e`
71
72			`reg1_loop:`
73
74			`/* Check each register still contains the expected known value.`
75			`vRegTest1Implementation uses x31 as the temporary, vRegTest2Implementation`
76			`uses x5 as the temporary. */`
77			`li x31, 0x5`
78			`bne x31, x5, reg1_error_loop`
79			`li x31, 0x6`
80			`bne x31, x6, reg1_error_loop`
81			`li x31, 0x7`
82			`bne x31, x7, reg1_error_loop`
83			`li x31, 0x8`
84			`bne x31, x8, reg1_error_loop`
85			`li x31, 0x9`
86			`bne x31, x9, reg1_error_loop`
87			`li x31, 0xa`
88			`bne x31, x10, reg1_error_loop`
89			`li x31, 0xb`
90			`bne x31, x11, reg1_error_loop`
91			`li x31, 0xc`
92			`bne x31, x12, reg1_error_loop`
93			`li x31, 0xd`
94			`bne x31, x13, reg1_error_loop`
95			`li x31, 0xe`
96			`bne x31, x14, reg1_error_loop`
97			`li x31, 0xf`
98			`bne x31, x15, reg1_error_loop`
99			`li x31, 0x10`
100			`bne x31, x16, reg1_error_loop`
101			`li x31, 0x11`
102			`bne x31, x17, reg1_error_loop`
103			`li x31, 0x12`
104			`bne x31, x18, reg1_error_loop`
105			`li x31, 0x13`
106			`bne x31, x19, reg1_error_loop`
107			`li x31, 0x14`
108			`bne x31, x20, reg1_error_loop`
109			`li x31, 0x15`
110			`bne x31, x21, reg1_error_loop`
111			`li x31, 0x16`
112			`bne x31, x22, reg1_error_loop`
113			`li x31, 0x17`
114			`bne x31, x23, reg1_error_loop`
115			`li x31, 0x18`
116			`bne x31, x24, reg1_error_loop`
117			`li x31, 0x19`
118			`bne x31, x25, reg1_error_loop`
119			`li x31, 0x1a`
120			`bne x31, x26, reg1_error_loop`
121			`li x31, 0x1b`
122			`bne x31, x27, reg1_error_loop`
123			`li x31, 0x1c`
124			`bne x31, x28, reg1_error_loop`
125			`li x31, 0x1d`
126			`bne x31, x29, reg1_error_loop`
127			`li x31, 0x1e`
128			`bne x31, x30, reg1_error_loop`
129
130			`/* Everything passed, increment the loop counter. */`
131			`lw x31, ulRegTest1LoopCounterConst`
132			`lw x30, 0(x31)`
133			`addi x30, x30, 1`
134			`sw x30, 0(x31)`
135
136			`/* Restore clobbered register reading for next loop. */`
137			`li x30, 0x1e`
138
139			`/* Yield to increase code coverage. */`
140			`ecall`
141
142			`/* Start again. */`
143			`jal reg1_loop`
144
145			`reg1_error_loop:`
146			`/* Jump here if a register contains an uxpected value. This stops the loop`
147			`counter being incremented so the check task knows an error was found. */`
148			`ebreak`
149			`jal reg1_error_loop`
150
151			`.align( 4 )`
152			`ulRegTest1LoopCounterConst: .word ulRegTest1LoopCounter`
153
154			`/-----------------------------------------------------------/`
155
156			`.align( 4 )`
157			`vRegTest2Implementation:`
158
159			`/* Fill the core registers with known values. */`
160			`li x6, 0x61`
161			`li x7, 0x71`
162			`li x8, 0x81`
163			`li x9, 0x91`
164			`li x10, 0xa1`
165			`li x11, 0xb1`
166			`li x12, 0xc1`
167			`li x13, 0xd1`
168			`li x14, 0xe1`
169			`li x15, 0xf1`
170			`li x16, 0x20`
171			`li x17, 0x21`
172			`li x18, 0x22`
173			`li x19, 0x23`
174			`li x20, 0x24`
175			`li x21, 0x25`
176			`li x22, 0x26`
177			`li x23, 0x27`
178			`li x24, 0x28`
179			`li x25, 0x29`
180			`li x26, 0x2a`
181			`li x27, 0x2b`
182			`li x28, 0x2c`
183			`li x29, 0x2d`
184			`li x30, 0x2e`
185			`li x31, 0x2f`
186
187			`Reg2_loop:`
188
189			`/* Check each register still contains the expected known value.`
190			`vRegTest2Implementation uses x5 as the temporary, vRegTest1Implementation`
191			`uses x31 as the temporary. */`
192			`li x5, 0x61`
193			`bne x5, x6, reg2_error_loop`
194			`li x5, 0x71`
195			`bne x5, x7, reg2_error_loop`
196			`li x5, 0x81`
197			`bne x5, x8, reg2_error_loop`
198			`li x5, 0x91`
199			`bne x5, x9, reg2_error_loop`
200			`li x5, 0xa1`
201			`bne x5, x10, reg2_error_loop`
202			`li x5, 0xb1`
203			`bne x5, x11, reg2_error_loop`
204			`li x5, 0xc1`
205			`bne x5, x12, reg2_error_loop`
206			`li x5, 0xd1`
207			`bne x5, x13, reg2_error_loop`
208			`li x5, 0xe1`
209			`bne x5, x14, reg2_error_loop`
210			`li x5, 0xf1`
211			`bne x5, x15, reg2_error_loop`
212			`li x5, 0x20`
213			`bne x5, x16, reg2_error_loop`
214			`li x5, 0x21`
215			`bne x5, x17, reg2_error_loop`
216			`li x5, 0x22`
217			`bne x5, x18, reg2_error_loop`
218			`li x5, 0x23`
219			`bne x5, x19, reg2_error_loop`
220			`li x5, 0x24`
221			`bne x5, x20, reg2_error_loop`
222			`li x5, 0x25`
223			`bne x5, x21, reg2_error_loop`
224			`li x5, 0x26`
225			`bne x5, x22, reg2_error_loop`
226			`li x5, 0x27`
227			`bne x5, x23, reg2_error_loop`
228			`li x5, 0x28`
229			`bne x5, x24, reg2_error_loop`
230			`li x5, 0x29`
231			`bne x5, x25, reg2_error_loop`
232			`li x5, 0x2a`
233			`bne x5, x26, reg2_error_loop`
234			`li x5, 0x2b`
235			`bne x5, x27, reg2_error_loop`
236			`li x5, 0x2c`
237			`bne x5, x28, reg2_error_loop`
238			`li x5, 0x2d`
239			`bne x5, x29, reg2_error_loop`
240			`li x5, 0x2e`
241			`bne x5, x30, reg2_error_loop`
242			`li x5, 0x2f`
243			`bne x5, x31, reg2_error_loop`
244
245			`/* Everything passed, increment the loop counter. */`
246			`lw x5, ulRegTest2LoopCounterConst`
247			`lw x6, 0(x5)`
248			`addi x6, x6, 1`
249			`sw x6, 0(x5)`
250
251			`/* Restore clobbered register reading for next loop. */`
252			`li x6, 0x61`
253
254			`/* Start again. */`
255			`jal Reg2_loop`
256
257			`reg2_error_loop:`
258			`/* Jump here if a register contains an uxpected value. This stops the loop`
259			`counter being incremented so the check task knows an error was found. */`
260			`ebreak`
261			`jal reg2_error_loop`
262
263			`.align( 4 )`
264			`ulRegTest2LoopCounterConst: .word ulRegTest2LoopCounter`
265
266